CN110993751A - Preparation method of micro LED chip - Google Patents
Preparation method of micro LED chip Download PDFInfo
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- CN110993751A CN110993751A CN201911391040.2A CN201911391040A CN110993751A CN 110993751 A CN110993751 A CN 110993751A CN 201911391040 A CN201911391040 A CN 201911391040A CN 110993751 A CN110993751 A CN 110993751A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 239000012188 paraffin wax Substances 0.000 claims abstract description 20
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 20
- 239000010703 silicon Substances 0.000 claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 19
- 238000005530 etching Methods 0.000 claims abstract description 11
- 238000000034 method Methods 0.000 claims abstract description 9
- 230000008018 melting Effects 0.000 claims abstract description 6
- 238000002844 melting Methods 0.000 claims abstract description 6
- 239000011248 coating agent Substances 0.000 claims abstract description 3
- 238000000576 coating method Methods 0.000 claims abstract description 3
- 238000009413 insulation Methods 0.000 claims abstract description 3
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 40
- 238000005516 engineering process Methods 0.000 description 7
- 229910052594 sapphire Inorganic materials 0.000 description 4
- 239000010980 sapphire Substances 0.000 description 4
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000005034 decoration Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 229910004541 SiN Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 230000036632 reaction speed Effects 0.000 description 1
- 230000035484 reaction time Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention provides a preparation method of a micro LED chip, which comprises the following steps: s1, sequentially preparing a GaN structure and a p-type ohmic contact layer on the surface of the silicon substrate; the GaN structure comprises an n-type GaN layer, a quantum well structure and a p-type GaN layer; s2, etching the p-type ohmic contact layer and the GaN structure at the N electrode until reaching the N-type GaN layer; s3, further etching the GaN structure at the edge of the tube core to the silicon substrate; s4 growing an insulating layer on the surface of the structure obtained in the step S3; s5, etching the insulation layers on the surfaces of the N-type GaN layer and the P-type ohmic contact layer respectively to form an N pole hole and a P pole hole, and forming an N-Pad layer and a P-Pad layer on the N pole hole and the P pole hole respectively; s6 coating a paraffin layer on the surface of the structure obtained in the step S5; s7 bonding the wafer and the substrate through the paraffin layer; s8 removing the silicon substrate and placing on the support film; s9, melting the paraffin to remove the substrate, and completing the preparation of the micro LED chip. The wafer is bonded to the substrate through paraffin, the substrate is further removed through a paraffin melting mode after the silicon substrate is removed, and the method is simple and easy to achieve.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a preparation method of a micro LED chip.
Background
The micro LED is a display technology which adopts a CMOS integrated circuit technology to manufacture a driving circuit after traditional LED structures are thinned, miniaturized and matrixed, and realizes addressing control and independent driving of each pixel point in an LED backlight source. Because various indexes such as brightness, contrast, reaction time, visual angle, resolution ratio and the like of the micro LED technology are stronger than those of the LCD and OLED technologies, the micro LED technology has attracted extensive attention together with the advantages of self-luminescence, simple structure, small volume and energy conservation.
As a new generation of display technology, the micro LED display has the characteristics of no seam, high brightness, no reflection image and the like, and can become an important part of a terminal product in the future or in future by virtue of the advantages of the product in the aspects of definition, image quality, thickness, reaction speed and the like. Currently, the micro LED is generally manufactured on a sapphire substrate, the mainstream is 4 inches, when the size of the sapphire substrate is increased to 6 inches and 8 inches, the manufacturing cost is greatly increased, and the sapphire substrate is finally removed by using a laser lift-off technology, so that the process is complex.
Disclosure of Invention
In order to overcome the defects, the invention provides a preparation method of a micro LED chip, which effectively solves the technical problems of high preparation cost, complex process and the like of the existing micro LED chip.
The technical scheme provided by the invention is as follows:
a preparation method of a micro LED chip comprises the following steps:
s1, sequentially preparing a GaN structure and a p-type ohmic contact layer on the surface of the silicon substrate; the GaN structure comprises an n-type GaN layer, a quantum well structure and a p-type GaN layer;
s2, etching the p-type ohmic contact layer and the GaN structure at the N electrode until reaching the N-type GaN layer;
s3 further etches the GaN structure at the die edge to the silicon substrate.
S4 growing an insulating layer on the surface of the structure obtained in the step S3;
s5, etching the insulation layers on the surfaces of the N-type GaN layer and the P-type ohmic contact layer respectively to form an N pole hole and a P pole hole, and forming an N-Pad layer and a P-Pad layer on the N pole hole and the P pole hole respectively;
s6 coating a paraffin layer on the surface of the structure obtained in the step S5;
s7, bonding the wafer and the substrate through the paraffin layer;
s8 removing the silicon substrate and placing the silicon substrate on a support film;
s9, melting the paraffin to remove the substrate, and completing the preparation of the micro LED chip.
In the preparation method of the micro LED chip provided by the invention, the wafer is bonded to the substrate through the paraffin, the substrate is further removed in a paraffin melting mode after the silicon substrate is removed, the process is simple and easy to realize, and the preparation of the micro LED chip on the large-size substrate (more than 4 inches) can be realized at low cost.
Drawings
FIGS. 1 to 15 are schematic views illustrating a flow chart of a method for manufacturing a micro LED chip according to the present invention;
reference numerals:
the structure comprises a 1-silicon substrate, a 2-GaN structure, a 3-P type ohmic contact layer, a 4-N type GaN layer, a 5-ISO layer, a 6-insulating layer, a 7-N pole hole, an 8-P pole hole, a 9-N-Pad layer, a 10-P-Pad layer, an 11-paraffin layer, a 12-substrate and a 13-support film.
Detailed Description
In order to more clearly illustrate the embodiment of the present invention or the technical solutions in the prior art, the following description will explain embodiments of the present invention with reference to the accompanying drawings. It is obvious that the drawings in the following description are only some examples of the invention, and that for a person skilled in the art, other drawings and embodiments can be derived from them without inventive effort.
The preparation method of the micro LED chip provided by the invention comprises the following steps:
s1 sequentially preparing a GaN structure 2 and a p-type ohmic contact layer 3 on the surface of the silicon substrate 1, as shown in fig. 1 and 2; the GaN structure 2 includes an n-type GaN layer 4, a quantum well structure, and a p-type GaN layer, and the p-type ohmic contact layer 3 may be ITO (indium tin oxide), NiAu, or the like.
S2 the p-type ohmic contact layer 3 and the GaN structure 2 are etched at the N electrode up to the N-type GaN layer 4, as shown in fig. 3. The method of etching may be photolithography or the like.
S3 is further etched into the GaN structure 2 at the die edge until the silicon substrate 1 forms the ISO isolation insulating layer 5, as shown in fig. 4.
S4 an insulating layer 6 is grown on the surface of the structure obtained in step S3, as shown in fig. 5. Specifically, the insulating layer 6 may be SiO2SiN or SiON, or SiO2An interlayer of any two or three of SiN and SiON.
S5 etching the insulating layer 6 on the surface of the N-type GaN layer 4 and the P-type ohmic contact layer 3 to form an N-pole hole 7 and a P-pole hole 8, respectively, as shown in fig. 6; and an N-Pad layer 9 and a P-Pad layer 10 are formed on the N-pole hole 7 and the P-pole hole 8, respectively, as shown in fig. 7. The method of etching may be photolithography or the like. The N-Pad layer 9 and the P-Pad layer 10 may be AuSn alloy layers (for eutectic crystals) or may be metal layers of Ti, Ni, Au, Al, Pt, Sn, or the like.
S6 the paraffin layer 11 is coated on the surface of the structure obtained in step S5, as shown in FIG. 8.
S7 bonds the wafer to the substrate 12 through the paraffin layer 11, as shown in fig. 9. The substrate 12 may be a sapphire material, a stainless steel material, or the like having a flat surface.
S8 removes the silicon substrate 1 and places it on the support film 13. Specifically, the silicon substrate 1 is thinned first, as shown in fig. 10; then, the whole wafer is placed in a chemical liquid to remove the silicon substrate 1, as shown in fig. 11; finally, the entire wafer from which the silicon substrate 1 is removed is placed on the surface of the support film 13, as shown in fig. 12, and the support film 13 may be a high temperature film, a UV film, or the like.
S9, melting the paraffin to remove the substrate 12, and completing the preparation of the micro LED chip. Specifically, as shown in fig. 13, paraffin is melted at a certain temperature and the substrate 12 is removed; then, removing the paraffin on the surface of the LED chip, as shown in FIG. 14; a plurality of micro LED chips are disposed on the surface of the support film 13, as shown in fig. 15. The micro LED chip is micro-LED or mini-LED.
It should be noted that the above embodiments can be freely combined as necessary. The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (3)
1. A preparation method of a micro LED chip is characterized by comprising the following steps:
s1, sequentially preparing a GaN structure and a p-type ohmic contact layer on the surface of the silicon substrate; the GaN structure comprises an n-type GaN layer, a quantum well structure and a p-type GaN layer;
s2, etching the p-type ohmic contact layer and the GaN structure at the N electrode until reaching the N-type GaN layer;
s3, further etching the GaN structure at the edge of the tube core to the silicon substrate;
s4 growing an insulating layer on the surface of the structure obtained in the step S3;
s5, etching the insulation layers on the surfaces of the N-type GaN layer and the P-type ohmic contact layer respectively to form an N pole hole and a P pole hole, and forming an N-Pad layer and a P-Pad layer on the N pole hole and the P pole hole respectively;
s6 coating a paraffin layer on the surface of the structure obtained in the step S5;
s7, bonding the wafer and the substrate through the paraffin layer;
s8 removing the silicon substrate and placing the silicon substrate on a support film;
s9, melting the paraffin to remove the substrate, and completing the preparation of the micro LED chip.
2. The method for manufacturing a micro LED chip according to claim 1, wherein in step S8, the support film is a high temperature film or a UV film.
3. The method for preparing a micro LED chip according to claim 1 or 2, further comprising a step of removing paraffin from the surface of the LED chip in step S9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911391040.2A CN110993751A (en) | 2019-12-30 | 2019-12-30 | Preparation method of micro LED chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911391040.2A CN110993751A (en) | 2019-12-30 | 2019-12-30 | Preparation method of micro LED chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110993751A true CN110993751A (en) | 2020-04-10 |
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|---|---|---|---|
| CN201911391040.2A Pending CN110993751A (en) | 2019-12-30 | 2019-12-30 | Preparation method of micro LED chip |
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| CN (1) | CN110993751A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101188259A (en) * | 2006-11-15 | 2008-05-28 | 杭州士兰明芯科技有限公司 | Low thermal resisting LED chip and making method |
| CN101442099A (en) * | 2008-12-09 | 2009-05-27 | 武汉华灿光电有限公司 | Structure of low thermal resistance LED and method for producing the same |
| CN103178200A (en) * | 2011-12-23 | 2013-06-26 | 财团法人工业技术研究院 | Light emitting chip and method for manufacturing light emitting chip |
| CN107452763A (en) * | 2016-04-08 | 2017-12-08 | 三星电子株式会社 | Semiconductor devices |
-
2019
- 2019-12-30 CN CN201911391040.2A patent/CN110993751A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101188259A (en) * | 2006-11-15 | 2008-05-28 | 杭州士兰明芯科技有限公司 | Low thermal resisting LED chip and making method |
| CN101442099A (en) * | 2008-12-09 | 2009-05-27 | 武汉华灿光电有限公司 | Structure of low thermal resistance LED and method for producing the same |
| CN103178200A (en) * | 2011-12-23 | 2013-06-26 | 财团法人工业技术研究院 | Light emitting chip and method for manufacturing light emitting chip |
| CN107452763A (en) * | 2016-04-08 | 2017-12-08 | 三星电子株式会社 | Semiconductor devices |
Non-Patent Citations (1)
| Title |
|---|
| 张玉龙等: "《半导体分立元器件集成电路装调职业技能鉴定指南》", 北京：中国科学技术出版社；北京希望电子出版社, pages: 88 - 33 * |
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Address after: 330096 No. 699, Aixi Hubei Road, Nanchang High-tech Development Zone, Jiangxi Province Applicant after: Jingneng optoelectronics Co.,Ltd. Address before: 330096 No. 699, Aixi Hubei Road, Nanchang High-tech Development Zone, Jiangxi Province Applicant before: LATTICE POWER (JIANGXI) Corp. |
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Application publication date: 20200410 |