CN110993511A - Semiconductor device with double-sided heat dissipation structure, packaging tool and packaging method - Google Patents
Semiconductor device with double-sided heat dissipation structure, packaging tool and packaging method Download PDFInfo
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- CN110993511A CN110993511A CN201911174967.0A CN201911174967A CN110993511A CN 110993511 A CN110993511 A CN 110993511A CN 201911174967 A CN201911174967 A CN 201911174967A CN 110993511 A CN110993511 A CN 110993511A
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- 230000017525 heat dissipation Effects 0.000 title claims abstract description 127
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 103
- 239000004065 semiconductor Substances 0.000 title claims abstract description 53
- 238000000034 method Methods 0.000 title claims abstract description 19
- 239000003292 glue Substances 0.000 claims description 54
- 238000002347 injection Methods 0.000 claims description 36
- 239000007924 injection Substances 0.000 claims description 36
- 238000010438 heat treatment Methods 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 230000008569 process Effects 0.000 abstract description 10
- 238000012858 packaging process Methods 0.000 abstract description 8
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 238000005476 soldering Methods 0.000 abstract description 4
- 238000005538 encapsulation Methods 0.000 description 10
- 239000000758 substrate Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000003825 pressing Methods 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001125 extrusion Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
Abstract
The application discloses a semiconductor device with a double-sided heat dissipation structure, a packaging device and a packaging method, wherein a heat dissipation plate is warped by reflow soldering for many times when the heat dissipation structure of a semiconductor is arranged, flash is generated at the warped position of the heat dissipation surface in the packaging process, and can influence the heat dissipation of the heat dissipation plate, so that the flash is required to be removed, and the production cost is increased; through the cooperation of the first cover plate and the second cover plate with the first boss and the second boss, the warping of the heat dissipation plate is restrained, so that the first cover plate and the second cover plate are in close contact with the heat dissipation plate, the flash on the heat dissipation surface of the heat dissipation plate in the packaging process is prevented, and the process of removing the flash is reduced.
Description
Technical Field
The present application relates generally to the field of semiconductor multi-chip power packaging, and more particularly to a semiconductor device with a double-sided heat dissipation structure, a packaging apparatus and a packaging method.
Background
The conventional heat dissipation of power module packaging generally adopts a method of arranging a heat dissipation substrate on a semiconductor device for heat dissipation, but the heat dissipation substrate is subjected to a plurality of reflow soldering processes when arranged, the reflow soldering causes deformation of the heat dissipation substrate, and the heat dissipation surface of the heat dissipation substrate generates flash in the subsequent plastic packaging process due to deformation and warping of the substrate, and the flash needs to be removed, so that the complexity of the process is increased, and the cost is not favorable for mass production.
Disclosure of Invention
In view of the above-mentioned drawbacks and deficiencies of the prior art, the present application provides a packaged device with a semiconductor double-sided heat dissipation structure.
In a first aspect, the present application provides a package for a semiconductor double-sided heat dissipation structure, including: the packaging frame is formed with a packaging cavity, the packaging frame comprises a first retaining wall and a second retaining wall which are arranged in a buckling manner, at least one first boss is inwards formed on the side wall of the first retaining wall, the first boss is provided with a first supporting surface used for supporting a first heating panel and a second supporting surface used for supporting a second heating panel, at least one second boss is inwards formed on the side wall of the second retaining wall opposite to the first boss, the second boss is provided with a first supporting surface used for supporting the first heating panel and a second supporting surface used for supporting the second heating panel,
the glue injection hole is arranged on the side wall of one side of the packaging frame and is communicated with the packaging cavity,
the exhaust hole is arranged on the side wall of one side of the packaging frame opposite to the glue injection hole and is communicated with the packaging cavity,
a first cover plate attached to the package frame for cooperating with the first support surface to suppress warpage of the first heat sink plate, an opening region formed in the middle of the first cover plate,
and the second cover plate is attached to the packaging frame and used for being matched with the second supporting surface to inhibit the warping of the second radiating plate, and an opening area is formed in the middle of the second cover plate.
Further, the present application also provides a packaging method for packaging a semiconductor device using the above-mentioned packaged device, including: providing a double-sided heat dissipation semiconductor device, wherein the double-sided heat dissipation semiconductor device comprises a first heat dissipation plate and a second heat dissipation plate, and at least one chip is arranged on the upper surface of the first heat dissipation plate or/and the lower surface of the second heat dissipation plate; the chip is connected with a plurality of pins;
providing a packaging frame, wherein the packaging frame is formed with a packaging cavity, the double-sided heat dissipation semiconductor device is arranged in the packaging cavity, the packaging frame comprises a first retaining wall and a second retaining wall which are arranged in a buckling manner, the side wall of the first retaining wall is inwards formed with at least one first boss, the first boss is formed with a first supporting surface used for supporting a first heating panel and a second supporting surface used for supporting a second heating panel, the second retaining wall is opposite to the first retaining wall, the side wall of the first boss is inwards formed with at least one second boss, the second boss is formed with a third supporting surface used for supporting the first heating panel and a fourth supporting surface used for supporting the second heating panel,
a first cover plate is arranged and attached to the packaging frame and used for being matched with the first supporting surface and the third supporting surface to restrain and dissipate the warping of the first radiating plate, an opening area is formed in the middle of the first cover plate,
a second cover plate is arranged and attached to the packaging frame and used for being matched with the second supporting surface and the fourth supporting surface to inhibit the warping of the second radiating plate, and an opening area is formed in the middle of the second cover plate
Injecting packaging glue into the glue injection hole, wherein the glue injection hole is arranged on the side wall of one side of the packaging frame and is communicated with the packaging cavity,
and after the packaging glue is cured, removing the upper cover and the lower cover to obtain the packaged semiconductor device.
Further, the present invention also provides a semiconductor package device with double-sided heat dissipation, comprising: the packaging frame comprises a first retaining wall and a second retaining wall which are oppositely arranged, wherein at least one boss is inwards arranged on the first retaining wall, at least one boss is inwards arranged on the second retaining wall,
a first heat dissipation plate disposed inside the package frame and located under the first and second bosses,
a second heat dissipation plate disposed inside the package frame and located above the first boss and the second boss,
a semiconductor chip disposed on the upper surface of the first heat sink and/or the lower surface of the second heat sink,
a plurality of leads having one end connected to the semiconductor chip and the other end extending to the outside of the package frame,
and the packaging main body is formed among the packaging frame, the upper surface of the first heat dissipation plate and the lower surface of the second heat dissipation plate.
The beneficial effect of this application is: the application arranges a packaging frame which comprises a first retaining wall and a second retaining wall, wherein the side walls of the first retaining wall and the second retaining wall are oppositely provided with at least one first boss and at least one second boss, a semiconductor device to be packaged is arranged in the packaging frame, the first supporting surface and the second supporting surface of the first boss and the second boss respectively support a first heat dissipation plate and a second heat dissipation plate, a first cover plate and a second cover plate are attached on the surface of the packaging frame, because of the matching relationship of the first boss and the second boss with the first cover plate and the second cover plate, the first supporting surface, the second supporting surface, the third supporting surface and the fourth supporting surface can generate supporting force towards the outer side of the packaging frame for the heat dissipation plate, the first cover plate and the second cover plate generate pressing force towards the inner side of the packaging frame for the heat dissipation plate, and the warped heat dissipation plate is flattened under the action of two forces, the first cover plate and the second cover plate are in close contact with the heat dissipation plate, the opening areas are arranged between the first cover plate and the second cover plate, the heat dissipation plate and the area corresponding to the opening areas are located outside the packaging cavity, the technical effect that flash is not generated on the heat dissipation surface of the heat dissipation plate is achieved, the process of removing the flash is reduced, the production steps are simplified, and the cost is saved.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:
fig. 1 is a schematic structural diagram of a first barrier wall of an embodiment of a package device of the present application;
FIG. 2 is a front view of FIG. 1;
fig. 3 is a schematic structural diagram of a second barrier of an embodiment of the packaged device of the invention.
FIG. 4 is a rear view of FIG. 3;
FIG. 5 is a schematic diagram of a semiconductor device;
FIG. 6 is a schematic diagram of a packaged semiconductor device according to the present application;
FIG. 7 is a front view of a first cover plate and a second cover plate of the packaged device of the present application;
FIG. 8 is a schematic structural diagram of a packaged semiconductor device of the present application;
FIG. 9 is a cross-sectional view of FIG. 8;
fig. 10 is a flow chart of packaging a semiconductor device with the packaged device of the present application.
Detailed Description
The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and not restrictive of the invention. It should be noted that, for convenience of description, only the portions related to the present invention are shown in the drawings.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
As shown in fig. 1 to 4, 6 and 8, a package for a semiconductor double-sided heat dissipation structure according to an embodiment of the present application includes: the package frame 100 is formed with a package cavity, the package frame 100 includes a first retaining wall 10 and a second retaining wall 20 which are arranged in a buckling manner, at least one first boss 11 is formed inwards on a side wall of the first retaining wall 10, the first boss 11 is formed with a first supporting surface 111 for supporting the first heat dissipation plate 51 and a second supporting surface 112 for supporting the second heat dissipation plate 52, at least one second boss 21 is formed inwards on a side wall of the second retaining wall 20 opposite to the first boss 11, the second boss 21 is formed with a third supporting surface 211 for supporting the first heat dissipation plate 51 and a fourth supporting surface 212 for supporting the second heat dissipation plate 52,
the glue injection hole 22 is arranged on the side wall of one side of the packaging frame 100, the glue injection hole 22 is communicated with the packaging cavity,
the exhaust hole 23 is arranged on the side wall of the packaging frame 100 opposite to the glue injection hole 22, the exhaust hole 23 is communicated with the packaging cavity,
a first cover plate 30 attached to the package frame 100 to cooperate with the first support surface 111 and the third support surface 211 to suppress warpage of the first heat sink plate 51, the first cover plate 30 having an opening area formed in the middle thereof,
a second cover plate 40 attached to the package frame 100, for cooperating with the second supporting surface 112 and the fourth supporting surface 212 to suppress warping of the second heat dissipation plate 52, wherein an opening area is formed in the middle of the second cover plate 40: in operation, the first retaining wall 10 and the second retaining wall 20 are buckled with each other to form a package cavity, the semiconductor heat dissipation device 50 is disposed in the package cavity, the first boss 11 and the second boss 21 are disposed between the first heat dissipation plate 51 and the second heat dissipation plate 52, the first cover plate 30 and the second cover plate 40 are attached to the upper and lower surfaces of the package frame 100, and the first cover plate 30 and the second cover plate 40 are matched with the first supporting surface 111, the third supporting surface 211, the second supporting surface 112 and the fourth supporting surface 212 to generate a pressing force on the first heat dissipation plate 51 and the second heat dissipation plate 52, so as to flatten the warped heat dissipation plates, so that the heat dissipation surfaces of the first heat dissipation plate 51 and the second heat dissipation plate 52 can be in close contact with the first cover plate 30 and the second cover plate 41, in addition, the middle portions of the first cover plate 30 and the second cover plate 40 are both provided with opening areas, and the size of the openings can be set according to the size of the heat dissipation plates, the opening area can expose most of the heat dissipation surfaces of the first heat dissipation plate 51 and the second heat dissipation plate 52, so that the heat dissipation surfaces are positioned outside the packaging cavity in the packaging process; then inject into the encapsulation through the injecting glue hole to the encapsulation intracavity and glue, the gas in the encapsulation intracavity can in time be got rid of in setting up of exhaust hole, prevents to form the bubble at the in-process of encapsulation, and this application simple structure has restrained the warpage of radiator plate through the combination of boss and apron to through set up the opening on the apron, thereby guaranteed not to form the flash at the heat dissipation surface, reduced the process of getting rid of heat dissipation surface flash, reduced manufacturing cost.
Further, as a preferred embodiment, the inward extending surfaces of the first supporting surface 111 and the second supporting surface 112 intersect, and the inward extending surfaces of the third supporting surface 211 and the fourth supporting surface 212 intersect.
Specifically, as shown in fig. 9, at least one of the first supporting surface 111 and the second supporting surface 112 is disposed obliquely, at least one of the third supporting surface 211 and the fourth supporting surface 212 is disposed obliquely, and the third supporting surface 211 is disposed obliquely when the first supporting surface 111 is disposed obliquely; the fourth supporting surface 212 is disposed obliquely when the second supporting surface 112 is disposed obliquely, and the advantage of disposing obliquely through the supporting surfaces is: when the packaging frame works, the first retaining wall 10 and the second retaining wall 20 can move a certain distance into the packaging frame 100 by installing the first cover plate and the second cover plate into the packaging frame, the design of the inclined supporting surface can increase the extrusion amplitude of the heat dissipation plate when the retaining walls move inwards, the warping of the heat dissipation plate can be effectively inhibited, the first cover plate 30 and the second cover plate 40 are ensured to be in close contact with the heat dissipation surfaces of the first heat dissipation plate 51 and the second heat dissipation plate 52, the overflowing in the packaging process is prevented, furthermore, the first boss 11 and the second boss 21 are both supported in an inclined mode, and the effect is better;
in addition, when the intersecting lines of the first supporting surface 111, the second supporting surface 112, the third supporting surface 211 and the fourth supporting surface 212 and the package frame 100 are all parallel to the upper and lower surfaces of the package frame 100, the contact surface between each supporting surface and the heat dissipation plate when the bent heat dissipation plate is pressed and the heat dissipation plate is large enough, and the damage of the heat dissipation plate caused by concentrated pressing stress is avoided.
Further, the first bosses 10 are symmetrically arranged with respect to a vertical symmetry plane of the package frame 100 perpendicular to the side wall where the first bosses 10 are located; the second bosses 20 are symmetrically arranged with respect to a vertical symmetry plane of the package frame perpendicular to the sidewall where the first bosses 10 are located.
Specifically, as shown in fig. 1 and 2, as a preferred technical solution: two first bosses 11 are arranged on the side wall of the first retaining wall 10, the first bosses 11 are symmetrically arranged about the vertical central line of the first retaining wall 10, as shown in fig. 3, two second bosses 21 are arranged on the side wall of the second retaining wall 20 opposite to the first retaining wall 10, and the second bosses 21 are arranged about the vertical central line of the second retaining wall 20: the arrangement of the two bosses can enable the bent heat dissipation plate to be sufficiently stressed when being extruded, in addition, the projection of the first boss 11 on the second retaining wall 21 is not overlapped with the second retaining wall 20, so that the bent heat dissipation plate can be stressed in a segmented manner, the technical effect of suppressing warping can be better achieved, in addition, the number of the first bosses 10 and the number of the second bosses 20 are not limited to two, the number of the bosses can be designed as required, and the technical personnel can understand.
The second barrier 20 is provided with a glue injection hole 22 and an exhaust hole 23, the glue injection hole 22 and the exhaust hole 23 are respectively positioned on two opposite side walls of the packaging frame 100, and the exhaust hole 23 is arranged above the packaging cavity in the packaging process; so set up and can make when pouring into the encapsulation through annotating gluey hole 23 in the encapsulation cavity, the encapsulation is glued and is slowly filled the encapsulation cavity from the lower part of encapsulation cavity, and gas can be followed the exhaust hole 23 that sets up above and discharged, avoids producing the bubble in the encapsulation process.
Further, as shown in fig. 3, as a preferred embodiment, the glue injection hole 22 and the air outlet hole 23 are disposed on a side wall different from the side wall where the first boss 111 and the second boss 112 are located, in addition, a plurality of first via holes 13 are disposed on the side wall on the same side as the first boss 10 for the first pins 53 to pass through, and a plurality of second via holes 26 are further disposed on the side wall on the same side as the second boss 20 for the second pins 54 to pass through, and the first pins, the first via holes, the second pins and the second pins are disposed in a sealing manner, so that the overflow of the package glue during the packaging process can be avoided; the glue injection hole 22 and the air outlet hole 23 which are arranged differently from the lug boss can avoid the processing difficulty in the process of processing the retaining wall, and in addition, the design which is different from the lug boss can reduce the blocking of the lug boss and the pin to the packaging glue in the glue injection process, so that the packaging glue can stably enter the packaging cavity.
As shown in fig. 3 and 6, the glue injection hole 22 and the air vent 23 are both disposed on the upper surface of the package frame, and a second glue injection hole 31 and a second air vent 32 corresponding to the glue injection hole 22 and the air vent 23 are formed on the first cover plate 30 or the second cover plate 40.
As shown in fig. 3, the upper surface of the two opposite side walls of the second retaining wall 20 is provided with three glue injection holes 22 and an exhaust hole 23, as shown in fig. 6, the first cover plate 30 is provided with a second glue injection hole 31 and a second exhaust hole 32 corresponding to the glue injection hole 22 and the exhaust hole 23, the design can enable the packaging frame 100 to be horizontally placed, packaging glue is injected through the glue injection holes, the packaging glue flows from one side of the packaging cavity to the other side stably, gas is discharged from the exhaust holes, when the packaging glue is filled in the packaging cavity, the packaging glue is discharged from the exhaust holes, glue injection is stopped, the arrangement of the three glue injection holes is more beneficial to the packaging glue to be uniformly filled in the packaging cavity, glue injection time can be shortened, and efficiency is improved.
As shown in fig. 1, 3, and 7, the upper surface and the lower surface of the side wall of the first retaining wall 10 on the same side as the first boss 11 are both provided with a first fixing groove 12 extending along the length direction of the first retaining wall 10, the first fixing groove 12 may be configured such that one end thereof is penetrated or both ends thereof are penetrated, the upper surface and the lower surface of the side wall of the second retaining wall 20 are both provided with a second fixing groove 24 parallel to the first fixing groove 12, the second fixing groove 24 is penetrated with respect to one end of the first fixing groove 12, or both ends thereof are penetrated, and the first fixing groove and the second fixing groove may be configured as dovetail grooves, T-shaped grooves, L-shaped grooves, or the like.
The first cover plate 30 and the second cover plate 40 are respectively provided with a sliding table 33/43 which is matched with the first fixing groove 12 and the second fixing groove 24, the sliding table can be a dovetail boss, a T-shaped boss, an L-shaped boss and the like, when the packaging frame works, the sliding tables 33 and 43 can be inserted into the first fixing groove 12 and the second fixing groove 24 from one end of the first cover plate 30 and the second cover plate 40, and through the matching of the sliding tables and the first fixing groove and the second fixing groove, the packaging frame 100 is attached to the upper surface and the lower surface of the packaging frame and pressing force is applied to the heat dissipation plate.
As shown in fig. 1, 2, and 3, in order to ensure the reliability of the package, a protrusion 14 or a groove 25 is disposed at a position where the first retaining wall 10 and the second retaining wall 20 are buckled with each other, and a groove 25 or a protrusion 14 cooperating with the protrusion 14 or the groove 25 is disposed at a position where the second retaining wall 20 and the first retaining wall 10 are buckled with each other, so that the protrusion 14 cooperates with the groove 25 during the package process, thereby ensuring the buckling strength of the first retaining wall 10 and the second retaining wall 20 and preventing the material from overflowing from the buckling position during the package process.
In addition, a plurality of first via holes 13 and second via holes 26 are further disposed on the first retaining wall 10 and the second retaining wall 20, so as to allow the pins 53/54 of the semiconductor device to pass through, as shown in fig. 2 and 4, the first via holes 13 are disposed on the same side as the first bosses 11, and the second via holes 26 are disposed on the same side as the second bosses 21, so that the inward displacement direction of the first retaining wall 10 and the second retaining wall 20 is consistent with the direction of the pins during the packaging process, and the packaging is not affected.
As shown in fig. 10, the method of packaging a semiconductor device with the above-described packaged device includes:
s101: providing a double-sided heat dissipation semiconductor device, as shown in fig. 5 and 9, wherein the double-sided heat dissipation semiconductor device 50 includes a first heat dissipation plate 51 and a second heat dissipation plate 52, and at least one chip 60 is disposed on an upper surface of the first heat dissipation plate 51 or/and a lower surface of the second heat dissipation plate; a plurality of pins 53/54 are connected to the chip 60;
s102: 100, the package frame 100 is formed with a package cavity, the double-sided heat dissipation semiconductor device is disposed in the package cavity, the package frame includes a first retaining wall 10 and a second retaining wall 20 which are disposed in an opposite manner, a sidewall of the first retaining wall 10 is inwardly formed with at least one first boss 11, the first boss 11 is formed with a first supporting surface 111 for supporting the first heat dissipation plate 51 and a second supporting surface 112 for supporting the second heat dissipation plate 52, a sidewall of the second retaining wall 20 opposite to the first boss 11 is inwardly formed with at least one second boss 21, the second boss 21 is formed with a first supporting surface 211 for supporting the first heat dissipation plate 51 and a second supporting surface 212 for supporting the second heat dissipation plate 52, specifically: the pin 53 is passed through the via hole 13 of the first retaining wall 10, the first retaining wall is disposed on one side of the double-sided heat dissipation semiconductor device, then the pin 54 is passed through the second retaining wall via hole 26, the second retaining wall is disposed on the other side of the double-sided heat dissipation semiconductor device, and the first retaining wall 10 and the second retaining wall 20 together surround the double-sided heat dissipation semiconductor device.
S103: a first cover plate 30 is arranged, is attached to the packaging frame 100 and is used for cooperating with the first supporting surfaces 111 and 211 to inhibit the first heat dissipation plate 51 from warping, an opening area is formed in the middle of the first cover plate 30, and the heat dissipation surface of the first heat dissipation plate 51 is partially exposed out of the opening area of the first cover plate;
s104: and a second cover plate 40 is arranged and attached to the package frame 100 and is used for cooperating with the second supporting surfaces 112 and 212 to restrain the warping of the second heat dissipation plate 52, an opening area is formed in the middle of the second cover plate 40, and the heat dissipation surface of the second heat dissipation plate 52 is partially exposed out of the opening area of the second cover plate, specifically, the sliding table 33/43 is inserted into the first fixing groove 12 and the second fixing groove 24 from one end of the first cover plate 30 and the second cover plate 40, and is attached to the upper surface and the lower surface of the package frame and applies pressing force to the heat dissipation plate through the cooperation of the sliding table and the first fixing groove and the second fixing groove, in addition, the second glue injection hole and the glue injection hole are correspondingly overlapped, and the second exhaust port and the exhaust.
S105: and injecting the packaging glue into the glue injection hole, wherein the glue injection hole is formed in the side wall of one side of the packaging frame, the glue injection hole is communicated with the packaging cavity, the packaging glue is injected into the packaging cavity through the glue injection hole, and the glue injection is stopped when the packaging glue overflows from the exhaust port.
And S106, after the packaging glue is cured, the first cover plate 30 and the second cover plate 40 are removed, and the packaged semiconductor device is obtained.
The present application also provides a semiconductor device with double-sided heat dissipation, as shown in fig. 8 and 9, including: the packaging frame 100, the packaging frame 100 includes a first retaining wall and a second retaining wall which are oppositely arranged, the first retaining wall is internally provided with at least one first boss 11, the second retaining wall is internally provided with at least one second boss 21,
a first heat dissipation plate 51 disposed inside the package frame 100 and located at a lower portion of the first boss 11 and/or the second boss 21,
a second heat sink 52 disposed inside the package frame 100 and above the first boss 11 and the second boss 21,
a semiconductor chip 60 disposed on the upper surface of the first heat sink 51 and/or the lower surface of the second heat sink 52, the semiconductor chip being soldered to the heat sink by reflow soldering,
a plurality of leads 53, 54 having one end connected to the semiconductor chip 60 and the other end extending to the outside of the package frame 100,
a package body 60 formed between the package frame 100, an upper surface of the first heat dissipation plate 51, and a lower surface of the second heat dissipation plate 52;
the semiconductor heat sink further includes a spacer 70 disposed between the semiconductor chip and the heat dissipating substrate, the spacer 60 is made of a metal block and is connected to the lower surfaces of the semiconductor chip 55 and the second heat dissipating plate by solder paste, the semiconductor chip 55 is connected to the first heat dissipating plate by solder paste, and the first heat dissipating plate 51 and the second heat dissipating plate 52 are double-sided copper clad ceramic plates.
The above description is only a preferred embodiment of the application and is illustrative of the principles of the technology employed. It will be appreciated by a person skilled in the art that the scope of the invention as referred to in the present application is not limited to the embodiments with a specific combination of the above-mentioned features, but also covers other embodiments with any combination of the above-mentioned features or their equivalents without departing from the inventive concept. For example, the above features may be replaced with (but not limited to) features having similar functions disclosed in the present application.
Claims (10)
1. A package device of a semiconductor double-sided heat dissipation structure is characterized by comprising:
the packaging frame is formed with a packaging cavity, the packaging frame comprises a first retaining wall and a second retaining wall which are buckled with each other, at least one first boss is formed inwards on the side wall of the first retaining wall, the first boss is provided with a first supporting surface used for supporting a first heating panel and a second supporting surface used for supporting a second heating panel, at least one second boss is formed inwards on the side wall of the second retaining wall opposite to the first boss, the second boss is provided with a third supporting surface used for supporting the first heating panel and a fourth supporting surface used for supporting the second heating panel,
the glue injection hole is arranged on the side wall of one side of the packaging frame and is communicated with the packaging cavity,
the exhaust hole is arranged on the side wall of one side of the packaging frame opposite to the glue injection hole and is communicated with the packaging cavity,
a first cover plate attached to the package frame for cooperating with the first support surface to suppress warpage of the first heat sink plate, an opening region formed in the middle of the first cover plate,
and the second cover plate is attached to the packaging frame and used for being matched with the second supporting surface to inhibit the warping of the second radiating plate, and an opening area is formed in the middle of the second cover plate.
2. The package for a double-sided heat spreader for semiconductor devices as recited in claim 1, wherein the inwardly extending surfaces of the first and second supporting surfaces intersect, and the inwardly extending surfaces of the third and fourth supporting surfaces intersect.
3. The package apparatus of claim 1, wherein the first bosses are symmetrically disposed with respect to a vertical symmetry plane of the package frame perpendicular to a sidewall of the first bosses; the second bosses are symmetrically arranged relative to a vertical symmetrical plane of the side wall of the packaging frame, which is perpendicular to the first bosses.
4. The package device of claim 1, wherein the glue injection hole and the vent hole are disposed on a side wall different from the side wall where the first boss and the second boss are located.
5. The package device of claim 1, wherein the glue injection hole and the air exhaust hole are both disposed on the upper surface of the package frame, and a second glue injection hole and a second air exhaust hole corresponding to the glue injection hole and the air exhaust hole are formed on the first cover plate or the second cover plate.
6. The package device of a semiconductor double-sided heat dissipation structure as recited in claim 1, wherein the first retaining wall has a first fixing groove formed on both the upper surface and the lower surface thereof and extending along the length direction of the first retaining wall, at least one end of the first fixing groove is through, and the first fixing groove is disposed on the same side as the first protrusion; the upper surface and the lower surface of second barricade all are provided with the parallel the second fixed slot of first fixed slot, the second fixed slot at least for the one end that first fixed slot link up.
7. The package device of claim 6, wherein the first cover plate and the second cover plate are formed with a first sliding table and a second sliding table matching with the first fixing groove and the second fixing groove.
8. The package device of a semiconductor double-sided heat dissipation structure as defined in claim 1, wherein a protrusion is disposed at a buckling portion of the first retaining wall and the second retaining wall, and a groove matched with the protrusion is disposed at a buckling portion of the second retaining wall and the first retaining wall;
or/and the first retaining wall and the opposite buckling part of the second retaining wall are provided with grooves, and the second retaining wall and the opposite buckling part of the first retaining wall are provided with bulges matched with the bulges.
9. A method of packaging a semiconductor device with a packaged device according to claims 1-8, comprising:
providing a double-sided heat dissipation semiconductor device, wherein the double-sided heat dissipation semiconductor device comprises a first heat dissipation plate and a second heat dissipation plate;
providing a packaging frame, wherein a packaging cavity is formed in the packaging frame, the double-sided heat dissipation semiconductor device is arranged in the packaging cavity, the packaging frame comprises a first retaining wall and a second retaining wall which are arranged in a buckling mode, at least one first boss is inwards formed on the side wall of the first retaining wall, a first supporting surface used for supporting the first heat dissipation plate and a second supporting surface used for supporting the second heat dissipation plate are formed on the first boss, at least one second boss is inwards formed on the side wall, opposite to the first boss, of the second retaining wall, and a third supporting surface used for supporting the first heat dissipation plate and a fourth supporting surface used for supporting the second heat dissipation plate are formed on the second boss;
a first cover plate is arranged, is attached to the packaging frame and is used for being matched with the first supporting surface to restrain and disperse warping of the first radiating plate, and an opening area is formed in the middle of the first cover plate;
a second cover plate is arranged, is attached to the packaging frame and is used for being matched with the second supporting surface to restrain the warping of the second radiating plate, and an opening area is formed in the middle of the second cover plate;
injecting packaging glue into the packaging cavity through the glue injection hole, and forming a packaging main body among the packaging frame, the upper surface of the first heat dissipation plate and the lower surface of the second heat dissipation plate;
and after the packaging glue is cured, removing the upper cover and the lower cover to obtain the packaged semiconductor device.
10. A semiconductor device with double-sided heat dissipation, comprising:
the packaging frame comprises a first retaining wall and a second retaining wall which are oppositely arranged, wherein at least one boss is inwards arranged on the first retaining wall, at least one boss is inwards arranged on the second retaining wall,
a first heat dissipation plate disposed inside the package frame and located under the first and second bosses,
a second heat dissipation plate disposed inside the package frame and located above the first boss and the second boss,
a semiconductor chip disposed on the upper surface of the first heat dissipation plate or the lower surface of the second heat dissipation plate,
one end of the metal cushion block is connected with the surface of the chip, which is far away from the first heat dissipation plate, and the other end of the metal cushion block is connected with the lower surface of the second heat dissipation plate, or one end of the metal cushion block is connected with the surface of the chip, which is far away from the second heat dissipation plate, and the other end of the metal cushion block is connected with the upper surface of the first heat dissipation plate;
a plurality of leads having one end connected to the semiconductor chip and the other end extending to the outside of the package frame,
and the packaging main body is formed among the packaging frame, the upper surface of the first heat dissipation plate and the lower surface of the second heat dissipation plate.
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140362537A1 (en) * | 2012-10-15 | 2014-12-11 | Toyota Motor Engineering & Manufacturing North America, Inc. | Power Modules and Power Module Arrays Having A Modular Design |
CN106486437A (en) * | 2015-08-31 | 2017-03-08 | 谢彦君 | A kind of semi-conducting electrode single piece and chiller |
CN108616258A (en) * | 2018-05-31 | 2018-10-02 | 苏州同泰新能源科技有限公司 | Ultra-narrow photovoltaic junction box with micro power management module |
CN109273371A (en) * | 2018-09-28 | 2019-01-25 | 全球能源互联网研究院有限公司 | A kind of encapsulating structure of power semiconductor part and packaging method |
CN109661723A (en) * | 2017-02-22 | 2019-04-19 | Jmj韩国株式会社 | Semiconductor packages with two-side radiation structure |
CN109887889A (en) * | 2017-12-06 | 2019-06-14 | 无锡旭康微电子有限公司 | A kind of power module package and preparation method thereof |
CN209199913U (en) * | 2018-12-19 | 2019-08-02 | 天津萨图芯科技有限公司 | A kind of chip encapsulation assembly |
-
2019
- 2019-11-26 CN CN201911174967.0A patent/CN110993511B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140362537A1 (en) * | 2012-10-15 | 2014-12-11 | Toyota Motor Engineering & Manufacturing North America, Inc. | Power Modules and Power Module Arrays Having A Modular Design |
CN106486437A (en) * | 2015-08-31 | 2017-03-08 | 谢彦君 | A kind of semi-conducting electrode single piece and chiller |
CN109661723A (en) * | 2017-02-22 | 2019-04-19 | Jmj韩国株式会社 | Semiconductor packages with two-side radiation structure |
CN109887889A (en) * | 2017-12-06 | 2019-06-14 | 无锡旭康微电子有限公司 | A kind of power module package and preparation method thereof |
CN108616258A (en) * | 2018-05-31 | 2018-10-02 | 苏州同泰新能源科技有限公司 | Ultra-narrow photovoltaic junction box with micro power management module |
CN109273371A (en) * | 2018-09-28 | 2019-01-25 | 全球能源互联网研究院有限公司 | A kind of encapsulating structure of power semiconductor part and packaging method |
CN209199913U (en) * | 2018-12-19 | 2019-08-02 | 天津萨图芯科技有限公司 | A kind of chip encapsulation assembly |
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