CN110910922A - Bit line voltage applying method and device, storage device and storage medium - Google Patents
Bit line voltage applying method and device, storage device and storage medium Download PDFInfo
- Publication number
- CN110910922A CN110910922A CN201811089900.2A CN201811089900A CN110910922A CN 110910922 A CN110910922 A CN 110910922A CN 201811089900 A CN201811089900 A CN 201811089900A CN 110910922 A CN110910922 A CN 110910922A
- Authority
- CN
- China
- Prior art keywords
- programming
- bit line
- voltage
- threshold
- voltage pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
Abstract
The embodiment of the invention discloses a bit line voltage applying method, a bit line voltage applying device, storage equipment and a storage medium. The method comprises the following steps: detecting whether the conduction threshold of the programming unit in the selected word line is more than or equal to the bit line pressurization threshold and less than the programming verification voltage threshold when each programming voltage pulse in the programming voltage pulse signal applied to the selected word line is ended in the programming process; and if the conduction threshold of the programming unit is greater than or equal to the bit line voltage threshold and less than the program verification voltage threshold, simultaneously applying the first bit line voltage pulse in the bit line voltage pulse signals to the bit line corresponding to the programming unit when applying the next program voltage pulse to the selected word line. The technical scheme of the embodiment of the invention realizes the effective control of the programming speed of the fast programming storage unit, and reduces the maximum threshold difference value between the fast programming storage unit and the slow programming storage unit when the programming is finished, thereby effectively reducing the threshold voltage distribution width of a page after being programmed.
Description
Technical Field
The embodiment of the invention relates to the technical field of storage equipment, in particular to a bit line voltage applying method and device, storage equipment and a storage medium.
Background
Because the process fluctuation problem exists in the production process of the memory, the memory cell corresponding to one page in the memory has both fast programming memory cells and slow programming memory cells, and the intrinsic threshold voltage distribution of the memory cells is also in a Gaussian distribution state, when programming both fast programming memory cells and slow programming memory cells at one program verify voltage, for some programmed memory cells, especially under the condition of process dimension shrinking, it may happen that the ISPP (Incremental step pulse programming) theory is not followed, i.e., the program voltage increment is not equal to the threshold voltage increment, there is a case where the threshold voltage increment is too large, further, the distribution width of the threshold voltage of the page is wide, the reduction of Vread voltage is limited, and the read disturb effect is serious.
In the prior art, a pre-test voltage smaller than a programming success verification voltage is generally set, and when a conduction threshold of a programmed memory cell is greater than or equal to the pre-test voltage, a programming voltage pulse signal is applied to a word line of a page, and a voltage pulse signal with a fixed voltage value is applied to a bit line corresponding to the programmed memory cell at the same time, so as to reduce a voltage difference between a control gate and a channel of the programmed memory cell, thereby weakening a programming effect of the programming voltage pulse signal on the programmed memory cell, and further reducing a programming speed of the programmed memory cell.
In the process of implementing the invention, the inventor finds that the prior art has the following defects: the control effect of the programming speed of the programmed memory cell is poor, and it is difficult to effectively reduce the threshold voltage distribution width of a page after being programmed.
Disclosure of Invention
Embodiments of the present invention provide a method and an apparatus for applying a bit line voltage, a memory device and a storage medium, so as to optimize a programming method of an existing memory device.
In a first aspect, an embodiment of the present invention provides a method for applying a bit line voltage, including:
detecting whether the conduction threshold of a programming unit in a selected word line is greater than or equal to a bit line pressurization threshold and smaller than a programming verification voltage threshold when each programming voltage pulse in a programming voltage pulse signal applied to the selected word line is ended in the programming process;
if the conduction threshold of the programming unit is greater than or equal to the bit line voltage threshold and smaller than the program verification voltage threshold, simultaneously applying a first bit line voltage pulse in a bit line voltage pulse signal to a bit line corresponding to the programming unit when applying a next program voltage pulse to the selected word line;
the voltage value of each bit line voltage pulse in the bit line voltage pulse signal is sequentially increased in a progressive manner, the increasing amplitude is smaller than the increasing amplitude of the corresponding programming voltage pulse, the period and the pulse width of each bit line voltage pulse are the same as those of the corresponding programming voltage pulse, and the voltage value of the first bit line voltage pulse is smaller than the increasing amplitude of the corresponding programming voltage pulse.
In the above method, optionally, after applying a first bit line voltage pulse in a bit line voltage pulse signal to a bit line corresponding to the program cell while applying a next program voltage pulse to the selected word line if a turn-on threshold of the program cell is greater than or equal to the bit line voltage threshold and less than the program verify voltage threshold, the method further includes:
detecting whether the conduction threshold of the programming unit is larger than or equal to the programming verification voltage threshold or not when each programming voltage pulse and the bit line voltage pulse are simultaneously ended;
if the conduction threshold value of the programming unit is larger than or equal to the programming verification voltage threshold value, no bit line voltage pulse signal is applied to the bit line corresponding to the programming unit, and a cut-off voltage is applied to the bit line corresponding to the programming unit;
and if the conduction threshold of the programming unit is smaller than the programming verification voltage threshold, continuously applying the programming voltage pulse signal and the bit line voltage pulse signal to the selected word line and the bit line corresponding to the programming unit respectively, and returning to execute the operation of detecting whether the conduction threshold of the programming unit is larger than or equal to the programming verification voltage threshold or not when each programming voltage pulse and the bit line voltage pulse are simultaneously ended until the conduction threshold of the programming unit is larger than or equal to the programming verification voltage threshold.
In the above method, optionally, the method further includes:
and if the conduction threshold of the programming unit is less than the bit line voltage threshold, applying the next programming voltage pulse to the selected word line, and returning to the programming process, and detecting whether the conduction threshold of the programming unit in the selected word line is greater than or equal to the bit line pressurization threshold and less than the programming verification voltage threshold or not when each programming voltage pulse in the programming voltage pulse signal applied to the selected word line is ended.
In the above method, optionally, the method further includes:
and if the turn-on threshold of the programming unit is greater than or equal to the program verification voltage threshold, applying a turn-off voltage to a bit line corresponding to the programming unit.
In the above method, optionally, the voltage values of the bit line voltage pulses in the bit line voltage pulse signal are sequentially increased by equal amplitude.
In a second aspect, an embodiment of the present invention provides an apparatus for applying a bit line voltage, including:
the first voltage detection module is used for detecting whether the conduction threshold of the programming unit in the selected word line is more than or equal to the bit line pressurization threshold and less than the programming verification voltage threshold or not when each programming voltage pulse in the programming voltage pulse signals applied to the selected word line is ended in the programming process;
a bit line pulse applying module, configured to apply a first bit line voltage pulse in a bit line voltage pulse signal to a bit line corresponding to the program unit when a next program voltage pulse is applied to the selected word line if a turn-on threshold of the program unit is greater than or equal to the bit line voltage threshold and less than the program verify voltage threshold;
the voltage value of each bit line voltage pulse in the bit line voltage pulse signal is sequentially increased in a progressive manner, the increasing amplitude is smaller than the increasing amplitude of the corresponding programming voltage pulse, the period and the pulse width of each bit line voltage pulse are the same as those of the corresponding programming voltage pulse, and the voltage value of the first bit line voltage pulse is smaller than the increasing amplitude of the corresponding programming voltage pulse.
In the above apparatus, optionally, the apparatus further includes:
a second voltage detection module, configured to detect whether a conduction threshold of the program unit is greater than or equal to the program verify voltage threshold after a first bit line voltage pulse in a bit line voltage pulse signal is applied to a bit line corresponding to the program unit while a next program voltage pulse is applied to the selected word line if the conduction threshold of the program unit is greater than or equal to the bit line voltage threshold and less than the program verify voltage threshold, and when each program voltage pulse and each bit line voltage pulse end simultaneously;
a first off-voltage applying module, configured to apply an off-voltage to the bit line corresponding to the program cell without applying the bit line voltage pulse signal to the bit line corresponding to the program cell if the turn-on threshold of the program cell is greater than or equal to the program verify voltage threshold;
and a pulse continuous applying module, configured to continue to apply the programming voltage pulse signal and the bit line voltage pulse signal to the selected word line and the bit line corresponding to the programming unit, respectively, if the conduction threshold of the programming unit is smaller than the programming verification voltage threshold, and return to the second voltage detecting module until the conduction threshold of the programming unit is greater than or equal to the programming verification voltage threshold.
In the above apparatus, optionally, the apparatus further includes:
and a voltage continuation detection module for applying a next programming voltage pulse to the selected word line if the conduction threshold of the programming unit is less than the bit line voltage threshold, and returning to the programming process, and detecting whether the conduction threshold of the programming unit in the selected word line is greater than or equal to the bit line pressurization threshold and less than the programming verification voltage threshold when each programming voltage pulse in the programming voltage pulse signal applied to the selected word line is ended.
In a third aspect, an embodiment of the present invention provides a storage device, where the storage device includes:
one or more processors;
storage means for storing one or more programs;
when executed by the one or more processors, cause the one or more processors to implement the method of any embodiment of the invention.
In a fourth aspect, embodiments of the present invention provide a storage medium containing computer-executable instructions for performing a method according to any of the embodiments of the present invention when executed by a computer processor.
Embodiments of the present invention provide a method, an apparatus, a storage device, and a storage medium for applying a bit line voltage, in which when a turn-on threshold of a programming unit is greater than or equal to a bit line voltage threshold and less than a programming verification voltage threshold, a bit line voltage pulse signal with a gradually increasing voltage is applied to a bit line corresponding to the programming unit, so as to solve the technical defects that in the prior art, a programming speed control effect on the programmed memory unit is poor, and it is difficult to effectively reduce a threshold voltage distribution width of a page after being programmed, achieve effective control of a programming speed of a fast programming memory unit, and reduce a maximum threshold difference between the fast programming memory unit and a slow programming memory unit after programming, thereby effectively reducing the threshold voltage distribution width of the page after being programmed.
Drawings
FIG. 1a is a flow chart of a method for applying bit line voltages according to an embodiment of the present invention;
FIG. 1b is a diagram illustrating programming voltage pulses and bit line voltage pulses according to one embodiment of the present invention;
FIG. 2 is a flow chart of a method for applying bit line voltages according to a second embodiment of the present invention;
FIG. 3 is a block diagram of a bit line voltage applying apparatus according to a third embodiment of the present invention;
fig. 4 is a structural diagram of a storage device according to a fourth embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention are described in further detail below with reference to the accompanying drawings. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention.
It should be further noted that, for the convenience of description, only some but not all of the relevant aspects of the present invention are shown in the drawings. Before discussing exemplary embodiments in more detail, it should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart may describe the operations (or steps) as a sequential process, many of the operations can be performed in parallel, concurrently or simultaneously. In addition, the order of the operations may be re-arranged. The process may be terminated when its operations are completed, but may have additional steps not included in the figure. The processes may correspond to methods, functions, procedures, subroutines, and the like.
Example one
Fig. 1a is a flowchart of a method for applying a bit line voltage according to an embodiment of the present invention, where the method of the present embodiment may be performed by a device for applying a bit line voltage, and the device may be implemented by hardware and/or software, and may be generally integrated in a memory device. The method of the embodiment specifically includes:
s110, in the programming process, when each programming voltage pulse in the programming voltage pulse signals applied to the selected word line is ended, whether the conduction threshold of the programming unit in the selected word line is larger than or equal to the bit line pressurization threshold and smaller than the programming verification voltage threshold or not is detected.
In the present embodiment, the selected word line specifically refers to the currently programmed word line. The programming unit is specifically a memory cell needing to be programmed in a selected word line. The programming voltage pulse signal is specifically a voltage signal applied to the control gate of the memory cell in the selected word line, and the voltage values of the voltage pulses in the programming voltage pulse signal sequentially increase in an increasing manner, and the increasing magnitudes may be equal or different. The program verify voltage threshold specifically refers to a voltage value used for determining whether the memory cell is successfully programmed. The bit line voltage threshold is specifically a voltage value used to determine whether the bit line voltage pulse signal described in step 120 needs to be applied to the bit line corresponding to the program cell.
It will be appreciated that for a selected word line, multiple memory cells may be programmed at the same time. If there are a plurality of program cells in one selected word line, the operations of the steps in the embodiments are performed simultaneously on all the program cells in this embodiment and in the following embodiments.
Generally, in a program operation of a memory (e.g., Nand flash memory), a program voltage is applied to a selected word line in a pulse voltage manner. Since different memory cells (e.g., floating gate field effect transistors) have different programming speeds (i.e., different lengths of time for the turn-on threshold of the memory cell to rise to equal to or greater than the program verify voltage threshold), different numbers of programming voltage pulses are required for raising the turn-on threshold of the memory cell having different programming speeds to equal to or greater than the program verify voltage threshold (the voltage value used for verifying whether programming is successful).
It can be understood that, the application of the programming voltage pulse signal to the selected word line is stopped only when the conduction thresholds of all the programming units in the selected word line are greater than or equal to the program verification voltage threshold, so that at the end of the programming operation, a conduction threshold difference exists between the conduction threshold of the fast-programming memory unit and the conduction threshold of the slow-programming memory unit, and the larger the programming speed difference is, the larger the conduction threshold difference is, so that the threshold voltage distribution width of the page corresponding to the selected word line after being programmed is larger.
In this embodiment, in order to reduce the threshold voltage distribution width after the page corresponding to the selected word line is programmed, a bit line boosting threshold is set. When each program voltage pulse in the program voltage pulse signal applied to the selected word line is ended, it is not only detected whether the conduction threshold of the program cell in the selected word line is equal to or greater than the program verify voltage threshold, but it is detected whether the conduction threshold of the program cell in the selected word line is equal to or greater than the bit line stressing threshold and less than the program verify voltage threshold. Further, when the conduction threshold of the program cell in the selected word line is greater than or equal to the bit line stressing threshold and less than the program verify voltage threshold, step 120 is performed to decrease the programming speed of the program cell (i.e., decrease a program voltage pulse to increase the conduction threshold of the program cell).
It is understood that the purpose of setting the bit line stress threshold is to slow down the programming speed of the program unit after the turn-on threshold of the program unit is greater than or equal to the bit line stress threshold, thereby reducing the width of the threshold distribution of the page where the program unit is located. The number of program voltage pulses required for fast programming memory cells, the number of program voltage pulses required for slow programming memory cells, the size of the program verify voltage threshold, the magnitude of the increment of the program voltage pulse, etc. are then combined to determine the value of the bit line stress threshold.
Specifically, the larger the increment of the programming voltage pulse (in this case, if the difference between the bit line stressing threshold and the program verify voltage threshold is not large enough, it may occur that the conduction threshold of the programmed cell before the application of one programming voltage pulse is less than the bit line stressing threshold, but after the application of the one programming pulse, the conduction threshold of the programmed cell is greater than or equal to the program verify voltage threshold, in this case, the programming speed of the programmed cell cannot be reduced by step 120), or the smaller the number of programming voltage pulses required for the fast-programming memory cell, or the larger the number of programming voltage pulses required for the slow-programming memory cell, the lower the bit line stressing threshold should be set.
S120, if the conduction threshold of the programming unit is greater than or equal to the bit line voltage threshold and smaller than the programming verification voltage threshold, when the next programming voltage pulse is applied to the selected word line, a first bit line voltage pulse in the bit line voltage pulse signals is simultaneously applied to the bit line corresponding to the programming unit, wherein the voltage value of each bit line voltage pulse in the bit line voltage pulse signals sequentially increases, the increasing amplitude is smaller than the increasing amplitude of the corresponding programming voltage pulse, the period and the pulse width of each bit line voltage pulse are the same as those of the corresponding programming voltage pulse, and the voltage value of the first bit line voltage pulse is smaller than the increasing amplitude of the corresponding programming voltage pulse.
It can be understood that, when a programming voltage pulse is applied to the gate of a programming unit, if a voltage greater than or equal to zero is applied to the bit line corresponding to the programming unit at the same time, the substrate voltage of the programming unit will increase, thereby reducing the voltage difference between the gate and the substrate of the programming unit, reducing the increasing amplitude of the current programming voltage pulse to the turn-on threshold of the programming unit, and achieving the effect of slowing down the programming speed of the programming unit.
Therefore, in this embodiment, when the turn-on threshold of the program cell is greater than or equal to the bit line voltage threshold and less than the program verify voltage threshold, the first bit line voltage pulse in the bit line voltage pulse signal is applied to the bit line corresponding to the program cell while the next program voltage pulse is applied to the selected word line.
Further, in this embodiment, the voltage value of each bit line voltage pulse in the bit line voltage pulse signal is sequentially increased, and the increased amplitude is smaller than the increased amplitude of the corresponding programming voltage pulse, the period and the pulse width of each bit line voltage pulse are the same as those of the corresponding programming voltage pulse, and the voltage value of the first bit line voltage pulse is smaller than the increased amplitude of the corresponding programming voltage pulse.
It can be understood that, since the voltage values of the programming voltage pulses are sequentially increased, if the voltage values of all the pulses in the bit line voltage pulse signal are equal, the voltage difference between the bit line voltage pulse and the corresponding programming voltage pulse is larger and larger as the voltage value of the programming voltage pulse is increased, thereby reducing the effect of the bit line voltage pulse signal on the reduction of the programming speed of the programmed cell. Therefore, in the present embodiment, the voltage value of each of the bit line voltage pulses is sequentially increased, so as to better control the voltage difference between the bit line voltage pulse and the corresponding programming voltage pulse, and ensure the control effect on the programming speed of the programming unit. Of course, the sequentially increasing magnitude of the voltage value of each of the bit line voltage pulses should be smaller than the increasing magnitude of the corresponding programming voltage pulse, so as to ensure that the programming voltage pulse can perform an effective programming operation on the programming unit.
The following is illustrated by way of example in FIG. 1 b:
as shown in fig. 1b, after the program voltage pulse No. 3 is ended, it is detected that the turn-on threshold of the program cell is equal to or greater than the bit line voltage threshold and less than the program verify voltage threshold, and therefore, the bit line voltage pulse No. 7 is applied at the same time as the program voltage pulse No. 4 is applied to reduce the program speed of the program cell, the voltage value of the bit line voltage pulse No. 7 must be less than the increment amplitude of the corresponding program voltage pulse No. 4, i.e., △ 1, likewise, the increment amplitude △ 5 of the bit line voltage pulse No. 8 must be less than the increment amplitude △ 02 of the program voltage pulse No. 5, the increment amplitude △ 16 of the bit line voltage pulse No. 9 must be less than the increment amplitude △ 23 of the program voltage pulse No. 6, and, in fig. 1b, exemplarily indicated as △ 31- △ 42- △ 53, and △ 64- △ 5- △ 6, in actual operation, △ 1, △ 2 and △ 3 may be equal, or may not be equal, and also may be equal, △ 4, △ 5, 366, and △ 6 may be equal, or not equal.
As shown in FIG. 1b, when the programming voltage pulses No. 5 and No. 6 are applied, the voltage difference between the gate voltage and the substrate voltage of the programming unit is kept unchanged due to the presence of two incremental voltages No. △ and No. △ (because the bit line voltage pulses raise the substrate voltage of the programming unit by applying a voltage to the corresponding bit line of the programming unit), therefore, the control effect on the programming speed of the programming unit is ensured.
The embodiment of the invention provides a bit line voltage applying method, which applies a bit line voltage pulse signal with gradually increased voltage to a bit line corresponding to a programming unit when a conduction threshold of the programming unit is greater than or equal to a bit line voltage threshold and smaller than a programming verification voltage threshold, solves the technical defects that the programming speed control effect of the programming unit is poor and the threshold voltage distribution width of a page after being programmed is difficult to effectively reduce in the prior art, realizes effective control of the programming speed of a fast programming storage unit, reduces the maximum threshold difference value of the fast programming storage unit and a slow programming storage unit when programming is finished, and thereby effectively reduces the threshold voltage distribution width of the page after being programmed.
Example two
Fig. 2 is a flowchart of a method for applying a bit line voltage according to a second embodiment of the present invention. The present embodiment is optimized based on the above embodiments, and in the present embodiment, a specific implementation of the processing operation of increasing the pass threshold of the program cell to be less than the bit line voltage threshold and the pass threshold of the program cell to be equal to or greater than the program verify voltage threshold is given.
Correspondingly, the method of the embodiment specifically includes:
s210, in the programming process, when each programming voltage pulse in the programming voltage pulse signals applied to the selected word line is ended, detecting whether the conduction threshold value of the programming unit in the selected word line is larger than or equal to the bit line pressurization threshold value, if not, executing a step 220, and if so, executing a step 230.
In this embodiment, at the end of each program voltage in the program voltage pulse signal applied to the selected word line, it is first detected whether the conduction threshold of the program cell in the selected word line is equal to or greater than the bit line pressurization threshold. In actual operation, it is also possible to detect whether the conduction threshold of the program cell in the selected word line is greater than or equal to the program verify voltage, and then detect whether the conduction threshold of the program cell in the selected word line is greater than or equal to the bit line stressing threshold.
S220, applying the next programming voltage pulse to the selected word line, and returning to execute the step 210.
In this embodiment, when one of the programming voltage pulse signals applied to the selected word line is ended, if it is determined by the detection that the turn-on threshold of the programming cell is less than or equal to the bit line applied threshold, the next programming voltage pulse is continuously applied to the selected word line, but the bit line voltage pulse signal is not applied to the bit line corresponding to the programming cell, and at this time, the voltage value of the bit line corresponding to the programming cell is still maintained at about 0V, so that the next programming voltage pulse can sufficiently charge the programming cell.
S230, detecting whether the conduction threshold of the programming unit in the selected word line is smaller than the programming verification voltage threshold, if not, executing step 240, and if so, executing step 250.
S240, applying a cut-off voltage to the bit line corresponding to the programming unit.
In this embodiment, when one of the programming voltage pulse signals applied to the selected word line is ended, if the on threshold of the programming cell is not less than the bit line stressing threshold but not less than the program verifying voltage threshold, that is, the programming cell has completed the programming operation, the off voltage is applied to the bit line corresponding to the programming cell to end the programming operation on the programming cell.
Specifically, the off-state voltage may be typically 1.8V, and when the off-state voltage is applied to the bit line corresponding to the program cell, the same off-state voltage is applied to the gate of the switching device (the source of the switching device is connected to the bit line corresponding to the program cell to control the on/off of the bit line) connected to the upper end of the bit line, so that the switching device (e.g., the field effect transistor) is turned off, and thus, the program operation cannot be performed on all the memory cells corresponding to the bit line.
And S250, when the next programming voltage pulse is applied to the selected word line, simultaneously applying the first bit line voltage pulse in the bit line voltage pulse signals to the bit lines corresponding to the programming units, wherein the voltage value of each bit line voltage pulse in the bit line voltage pulse signals sequentially increases, the increasing amplitude is smaller than the increasing amplitude of the corresponding programming voltage pulse, the period and the pulse width of each bit line voltage pulse are the same as those of the corresponding programming voltage pulse, and the voltage value of the first bit line voltage pulse is smaller than the increasing amplitude of the corresponding programming voltage pulse.
S260, when each of the programming voltage pulses and the bit line voltage pulses end at the same time, detecting whether a conduction threshold of the programming unit is greater than or equal to a program verify voltage threshold, if so, performing step 270, and if not, performing step 280.
In this embodiment, after the programming voltage pulse and the bit line voltage pulse are applied simultaneously, at the end of each programming voltage pulse and the bit line voltage pulse simultaneously, whether the turn-on threshold of the programmed cell is greater than or equal to the program-verify voltage threshold is detected, and the programming operation on the programmed cell that has been successfully programmed is ended.
S270, applying a cut-off voltage to the bit line corresponding to the programming unit.
S280, continuously applying a programming voltage pulse signal and a bit line voltage pulse signal to the selected word line and the bit line corresponding to the programming unit respectively, and returning to execute the step 260 until the conduction threshold of the programming unit is larger than or equal to the programming verification voltage threshold.
In this embodiment, when the programming voltage pulse and the bit line voltage pulse end at the same time, and it is detected that the turn-on threshold of the programming unit is not greater than or equal to the program verify voltage threshold, the programming voltage pulse signal and the bit line voltage pulse signal are continuously applied to the selected word line and the bit line corresponding to the programming unit, respectively, so as to continuously program the programming unit which does not complete the programming operation.
The embodiment of the invention provides a bit line voltage applying method, which increases a conduction threshold value checking process, increases the processing operations that the conduction threshold value of a programming unit is smaller than the bit line voltage threshold value and the conduction threshold value of the programming unit is larger than or equal to the programming checking voltage threshold value, realizes the effective control of the programming speed of a fast programming storage unit, reduces the maximum threshold value difference value of the fast programming storage unit and a slow programming storage unit when the programming is finished, and thus effectively reduces the threshold voltage distribution width of a page after being programmed.
In addition to the above embodiments, the voltage values of the bit line voltage pulses in the bit line voltage pulse signal may be sequentially increased by equal magnitudes.
The benefits of this arrangement are: the hardware design difficulty and the manufacturing cost of the storage device are reduced.
EXAMPLE III
Fig. 3 is a structural diagram of a bit line voltage applying apparatus according to a third embodiment of the present invention. As shown in fig. 3, the apparatus includes: a first voltage detection module 301 and a bit line pulse application module 302, wherein:
a first voltage detecting module 301 for detecting whether a turn-on threshold of a program cell in a selected word line is greater than or equal to a bit line boosting threshold and less than a program verify voltage threshold when each program voltage pulse in a program voltage pulse signal applied to the selected word line ends during a program process;
a bit line pulse applying module 302, configured to apply a first bit line voltage pulse in the bit line voltage pulse signal to a bit line corresponding to the program unit when a next program voltage pulse is applied to the selected word line if the turn-on threshold of the program unit is greater than or equal to the bit line voltage threshold and less than the program verify voltage threshold;
the voltage value of each bit line voltage pulse in the bit line voltage pulse signal is sequentially increased in a progressive manner, the increasing amplitude is smaller than the increasing amplitude of the corresponding programming voltage pulse, the period and the pulse width of each bit line voltage pulse are the same as those of the corresponding programming voltage pulse, and the voltage value of the first bit line voltage pulse is smaller than the increasing amplitude of the corresponding programming voltage pulse.
The embodiment of the invention provides a bit line voltage applying device, which firstly detects whether the conduction threshold of a programming unit in a selected word line is greater than or equal to a bit line pressurization threshold and less than a programming verification voltage threshold or not through a first voltage detecting module 301 when each programming voltage pulse in a programming voltage pulse signal applied to the selected word line is ended in the programming process, and then, if the conduction threshold of the programming unit is greater than or equal to the bit line voltage threshold and less than the programming verification voltage threshold, a first bit line voltage pulse in the bit line voltage pulse signal is simultaneously applied to a bit line corresponding to the programming unit through a bit line pulse applying module 302 when the next programming voltage pulse is applied to the selected word line.
The device solves the technical defects that the control effect of the programming speed of a programmed memory cell is poor and the threshold voltage distribution width of a page after being programmed is difficult to effectively reduce in the prior art, realizes the effective control of the programming speed of a fast programming memory cell, reduces the maximum threshold difference value of the fast programming memory cell and a slow programming memory cell after the programming is finished, and accordingly effectively reduces the threshold voltage distribution width of the page after being programmed.
On the basis of the above embodiments, the method may further include:
a second voltage detection module, configured to, if the conduction threshold of the programming unit is greater than or equal to the bit line voltage threshold and smaller than the program verify voltage threshold, apply a next program voltage pulse to the selected word line, and after applying a first bit line voltage pulse in the bit line voltage pulse signal to the bit line corresponding to the programming unit, detect whether the conduction threshold of the programming unit is greater than or equal to the program verify voltage threshold when each of the program voltage pulse and the bit line voltage pulse end simultaneously;
a first off-voltage applying module for applying an off-voltage to the bit line corresponding to the program cell without applying the bit line voltage pulse signal to the bit line corresponding to the program cell if the turn-on threshold of the program cell is greater than or equal to the program verify voltage threshold;
and the pulse continuous applying module is used for continuously applying a programming voltage pulse signal and a bit line voltage pulse signal to the selected word line and the bit line corresponding to the programming unit respectively if the conduction threshold of the programming unit is smaller than the programming verification voltage threshold, and returning to call the second voltage detection module until the conduction threshold of the programming unit is larger than or equal to the programming verification voltage threshold.
On the basis of the above embodiments, the method may further include:
and the voltage continuous detection module is used for applying the next programming voltage pulse to the selected word line if the conduction threshold of the programming unit is less than the bit line voltage threshold, and returning to the operation of executing the programming process, and detecting whether the conduction threshold of the programming unit in the selected word line is greater than or equal to the bit line pressurization threshold and less than the programming verification voltage threshold when each programming voltage pulse in the programming voltage pulse signal applied to the selected word line is ended.
On the basis of the above embodiments, the method may further include:
and a second off voltage applying module for applying an off voltage to the bit line corresponding to the program cell if the turn-on threshold of the program cell is equal to or greater than the program verify voltage threshold.
In addition to the above embodiments, the voltage values of the bit line voltage pulses in the bit line voltage pulse signal may be sequentially increased by the same magnitude.
The bit line voltage applying device provided by the embodiment of the invention can be used for executing the bit line voltage applying method provided by any embodiment of the invention, has corresponding functional modules and realizes the same beneficial effects.
Example four
Fig. 4 is a schematic structural diagram of a storage device according to a fourth embodiment of the present invention, as shown in fig. 4, the storage device includes a processor 40, a memory 41, an input device 42, and an output device 43; the number of processors 40 in the storage device may be one or more, and one processor 40 is taken as an example in fig. 4; the processor 40, the memory 41, the input device 42 and the output device 43 in the storage apparatus may be connected by a bus or other means, and the bus connection is exemplified in fig. 4.
The memory 41, which is a computer-readable storage medium, may be used to store software programs, computer-executable programs, and modules, such as modules corresponding to the bit line voltage application method in the embodiment of the present invention (for example, the first voltage detection module 301 and the bit line pulse application module 302 in the bit line voltage application apparatus). The processor 40 executes various functional applications of the storage device and data processing, that is, implements the above-described bit line voltage application method, by executing software programs, instructions, and modules stored in the memory 41.
The memory 41 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the terminal, and the like. Further, the memory 41 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some examples, memory 41 may further include memory located remotely from processor 40, which may be connected to a storage device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 42 is operable to receive input numeric or character information and to generate key signal inputs relating to user settings and function controls of the memory device. The output device 43 may include a display device such as a display screen.
EXAMPLE five
An embodiment of the present invention also provides a storage medium containing computer-executable instructions, which when executed by a computer processor, perform a method for applying a bit line voltage, the method including:
detecting whether the conduction threshold of the programming unit in the selected word line is more than or equal to the bit line pressurization threshold and less than the programming verification voltage threshold when each programming voltage pulse in the programming voltage pulse signal applied to the selected word line is ended in the programming process;
if the conduction threshold of the programming unit is greater than or equal to the bit line voltage threshold and smaller than the program verification voltage threshold, simultaneously applying a first bit line voltage pulse in a bit line voltage pulse signal to a bit line corresponding to the programming unit when applying a next program voltage pulse to the selected word line;
the voltage value of each bit line voltage pulse in the bit line voltage pulse signal is sequentially increased in a progressive manner, the increasing amplitude is smaller than the increasing amplitude of the corresponding programming voltage pulse, the period and the pulse width of each bit line voltage pulse are the same as those of the corresponding programming voltage pulse, and the voltage value of the first bit line voltage pulse is smaller than the increasing amplitude of the corresponding programming voltage pulse.
Of course, the storage medium provided by the embodiment of the present invention contains computer-executable instructions, and the computer-executable instructions are not limited to the operations of the method described above, and can also perform related operations in the bit line voltage application method provided by any embodiment of the present invention.
From the above description of the embodiments, it is obvious for those skilled in the art that the present invention can be implemented by software and necessary general hardware, and certainly, can also be implemented by hardware, but the former is a better embodiment in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which may be stored in a computer-readable storage medium, such as a floppy disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a FLASH Memory (FLASH), a hard disk or an optical disk of a computer, and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) to execute the methods according to the embodiments of the present invention.
It should be noted that, in the embodiment of the device for applying a bit line voltage, the included units and modules are merely divided according to functional logic, but are not limited to the above division as long as the corresponding functions can be achieved; in addition, specific names of the functional units are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present invention.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A method for applying a bit line voltage, comprising:
detecting whether the conduction threshold of a programming unit in a selected word line is greater than or equal to a bit line pressurization threshold and smaller than a programming verification voltage threshold when each programming voltage pulse in a programming voltage pulse signal applied to the selected word line is ended in the programming process;
if the conduction threshold of the programming unit is greater than or equal to the bit line voltage threshold and smaller than the program verification voltage threshold, simultaneously applying a first bit line voltage pulse in a bit line voltage pulse signal to a bit line corresponding to the programming unit when applying a next program voltage pulse to the selected word line;
the voltage value of each bit line voltage pulse in the bit line voltage pulse signal is sequentially increased in a progressive manner, the increasing amplitude is smaller than the increasing amplitude of the corresponding programming voltage pulse, the period and the pulse width of each bit line voltage pulse are the same as those of the corresponding programming voltage pulse, and the voltage value of the first bit line voltage pulse is smaller than the increasing amplitude of the corresponding programming voltage pulse.
2. The method of claim 1, further comprising, after applying a first bit line voltage pulse of the bit line voltage pulse signals to a corresponding bit line of the program cell while applying a next program voltage pulse to the selected word line if a turn-on threshold of the program cell is greater than or equal to the bit line voltage threshold and less than the program verify voltage threshold:
detecting whether the conduction threshold of the programming unit is larger than or equal to the programming verification voltage threshold or not when each programming voltage pulse and the bit line voltage pulse are simultaneously ended;
if the conduction threshold value of the programming unit is larger than or equal to the programming verification voltage threshold value, no bit line voltage pulse signal is applied to the bit line corresponding to the programming unit, and a cut-off voltage is applied to the bit line corresponding to the programming unit;
and if the conduction threshold of the programming unit is smaller than the programming verification voltage threshold, continuously applying the programming voltage pulse signal and the bit line voltage pulse signal to the selected word line and the bit line corresponding to the programming unit respectively, and returning to execute the operation of detecting whether the conduction threshold of the programming unit is larger than or equal to the programming verification voltage threshold or not when each programming voltage pulse and the bit line voltage pulse are simultaneously ended until the conduction threshold of the programming unit is larger than or equal to the programming verification voltage threshold.
3. The method of claim 1, further comprising:
and if the conduction threshold of the programming unit is less than the bit line voltage threshold, applying the next programming voltage pulse to the selected word line, and returning to the programming process, and detecting whether the conduction threshold of the programming unit in the selected word line is greater than or equal to the bit line pressurization threshold and less than the programming verification voltage threshold or not when each programming voltage pulse in the programming voltage pulse signal applied to the selected word line is ended.
4. The method of claim 1, further comprising:
and if the turn-on threshold of the programming unit is greater than or equal to the program verification voltage threshold, applying a turn-off voltage to a bit line corresponding to the programming unit.
5. The method according to any one of claims 1-3, wherein the voltage values of the respective bit line voltage pulses in the bit line voltage pulse signal are sequentially incremented by equal magnitudes.
6. An apparatus for applying a bit line voltage, comprising:
the first voltage detection module is used for detecting whether the conduction threshold of the programming unit in the selected word line is more than or equal to the bit line pressurization threshold and less than the programming verification voltage threshold or not when each programming voltage pulse in the programming voltage pulse signals applied to the selected word line is ended in the programming process;
a bit line pulse applying module, configured to apply a first bit line voltage pulse in a bit line voltage pulse signal to a bit line corresponding to the program unit when a next program voltage pulse is applied to the selected word line if a turn-on threshold of the program unit is greater than or equal to the bit line voltage threshold and less than the program verify voltage threshold;
the voltage value of each bit line voltage pulse in the bit line voltage pulse signal is sequentially increased in a progressive manner, the increasing amplitude is smaller than the increasing amplitude of the corresponding programming voltage pulse, the period and the pulse width of each bit line voltage pulse are the same as those of the corresponding programming voltage pulse, and the voltage value of the first bit line voltage pulse is smaller than the increasing amplitude of the corresponding programming voltage pulse.
7. The apparatus of claim 6, further comprising:
a second voltage detection module, configured to detect whether a conduction threshold of the program unit is greater than or equal to the program verify voltage threshold after a first bit line voltage pulse in a bit line voltage pulse signal is applied to a bit line corresponding to the program unit while a next program voltage pulse is applied to the selected word line if the conduction threshold of the program unit is greater than or equal to the bit line voltage threshold and less than the program verify voltage threshold, and when each program voltage pulse and each bit line voltage pulse end simultaneously;
a first off-voltage applying module, configured to apply an off-voltage to the bit line corresponding to the program cell without applying the bit line voltage pulse signal to the bit line corresponding to the program cell if the turn-on threshold of the program cell is greater than or equal to the program verify voltage threshold;
and a pulse continuous applying module, configured to continue to apply the programming voltage pulse signal and the bit line voltage pulse signal to the selected word line and the bit line corresponding to the programming unit, respectively, if the conduction threshold of the programming unit is smaller than the programming verification voltage threshold, and return to the second voltage detecting module until the conduction threshold of the programming unit is greater than or equal to the programming verification voltage threshold.
8. The apparatus of claim 6, further comprising:
and a voltage continuation detection module for applying a next programming voltage pulse to the selected word line if the conduction threshold of the programming unit is less than the bit line voltage threshold, and returning to the programming process, and detecting whether the conduction threshold of the programming unit in the selected word line is greater than or equal to the bit line pressurization threshold and less than the programming verification voltage threshold when each programming voltage pulse in the programming voltage pulse signal applied to the selected word line is ended.
9. A storage device, the storage device comprising:
one or more processors;
storage means for storing one or more programs;
when executed by the one or more processors, cause the one or more processors to implement the method of any one of claims 1-5.
10. A storage medium containing computer-executable instructions for performing the method of any one of claims 1-5 when executed by a computer processor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811089900.2A CN110910922B (en) | 2018-09-18 | 2018-09-18 | Bit line voltage applying method and device, storage device and storage medium |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811089900.2A CN110910922B (en) | 2018-09-18 | 2018-09-18 | Bit line voltage applying method and device, storage device and storage medium |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110910922A true CN110910922A (en) | 2020-03-24 |
CN110910922B CN110910922B (en) | 2021-09-24 |
Family
ID=69813682
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811089900.2A Active CN110910922B (en) | 2018-09-18 | 2018-09-18 | Bit line voltage applying method and device, storage device and storage medium |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110910922B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2021207965A1 (en) * | 2020-04-15 | 2021-10-21 | Yangtze Memory Technologies Co., Ltd. | 3d nand flash and operation method thereof |
CN116504292A (en) * | 2023-06-27 | 2023-07-28 | 芯天下技术股份有限公司 | Method and device for reading non flash, memory chip and equipment |
US12009036B2 (en) | 2021-10-30 | 2024-06-11 | Yangtze Memory Technologies Co., Ltd. | NAND flash memory device and method of reducing program disturb thereof |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5440505A (en) * | 1994-01-21 | 1995-08-08 | Intel Corporation | Method and circuitry for storing discrete amounts of charge in a single memory element |
KR20090048763A (en) * | 2007-11-12 | 2009-05-15 | 주식회사 하이닉스반도체 | Method for programming flash memory device |
CN101521042A (en) * | 2008-02-26 | 2009-09-02 | 三星电子株式会社 | Programming method of non-volatile memory device |
-
2018
- 2018-09-18 CN CN201811089900.2A patent/CN110910922B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5440505A (en) * | 1994-01-21 | 1995-08-08 | Intel Corporation | Method and circuitry for storing discrete amounts of charge in a single memory element |
KR20090048763A (en) * | 2007-11-12 | 2009-05-15 | 주식회사 하이닉스반도체 | Method for programming flash memory device |
CN101521042A (en) * | 2008-02-26 | 2009-09-02 | 三星电子株式会社 | Programming method of non-volatile memory device |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2021207965A1 (en) * | 2020-04-15 | 2021-10-21 | Yangtze Memory Technologies Co., Ltd. | 3d nand flash and operation method thereof |
US11177001B2 (en) | 2020-04-15 | 2021-11-16 | Yangtze Memory Technologies Co., Ltd. | 3D NAND flash and operation method thereof |
US12009036B2 (en) | 2021-10-30 | 2024-06-11 | Yangtze Memory Technologies Co., Ltd. | NAND flash memory device and method of reducing program disturb thereof |
CN116504292A (en) * | 2023-06-27 | 2023-07-28 | 芯天下技术股份有限公司 | Method and device for reading non flash, memory chip and equipment |
CN116504292B (en) * | 2023-06-27 | 2023-08-25 | 芯天下技术股份有限公司 | Method and device for reading non flash, memory chip and equipment |
Also Published As
Publication number | Publication date |
---|---|
CN110910922B (en) | 2021-09-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110910922B (en) | Bit line voltage applying method and device, storage device and storage medium | |
CN110619915B (en) | Over-erasure processing method and device for novel nonvolatile memory | |
CN102568569A (en) | Non-volatile memory device and cache program method of the same | |
US10692546B2 (en) | Method for programming a memory circuit with a verification process | |
CN110619916A (en) | Memory programming method and device, electronic equipment and readable storage medium | |
CN112927743B (en) | Erasing verification method and device of storage unit, computer equipment and storage medium | |
CN110910940B (en) | Programming method and device of memory, storage equipment and storage medium | |
KR101212745B1 (en) | Flash Memory Apparatus and Program Verify Method Therefor | |
US11209985B2 (en) | Input/output delay optimization method, electronic system and memory device using the same | |
US20190156878A1 (en) | Write verify programming of a memory device | |
CN105575427B (en) | Erasing method of nonvolatile memory | |
CN103440881B (en) | A kind of content addressable memory system, addressing method and device | |
CN115148253B (en) | Memory circuit, memory precharge control method and apparatus | |
CN109427405B (en) | Programming method and programming device of NOR Flash | |
CN110910939B (en) | Threshold value adjusting method and device of storage unit, storage equipment and storage medium | |
CN102800356A (en) | Reference unit programming method and system of nonvolatile memory | |
CN110556145A (en) | Programming method and device of storage unit, electronic equipment and storage medium | |
CN110648714B (en) | Data reading method and device, electronic equipment and storage medium | |
CN115148243B (en) | Memory circuit, memory precharge control method and apparatus | |
KR102582240B1 (en) | Over-erasure detection and elimination method of electronic equipment and storage unit | |
CN111081303A (en) | Memory programming method, memory programming device, electronic equipment and computer readable storage medium | |
US20240274169A1 (en) | Operation method for memory device | |
CN110648711B (en) | Method and device for applying word line voltage, electronic device and storage medium | |
CN110556150A (en) | programming method and device of storage unit, electronic equipment and storage medium | |
CN109841257B (en) | Method and device for restoring threshold voltage of memory |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CP03 | Change of name, title or address | ||
CP03 | Change of name, title or address |
Address after: Room 101, Floor 1-5, Building 8, Yard 9, Fenghao East Road, Haidian District, Beijing 100094 Patentee after: Zhaoyi Innovation Technology Group Co.,Ltd. Patentee after: HEFEI GEYI INTEGRATED CIRCUIT Co.,Ltd. Address before: 100083 12 Floors, Block A, Tiangong Building, Science and Technology University, 30 College Road, Haidian District, Beijing Patentee before: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc. Patentee before: HEFEI GEYI INTEGRATED CIRCUIT Co.,Ltd. |