CN110888821B

CN110888821B - Memory management method and device

Info

Publication number: CN110888821B
Application number: CN201910943732.7A
Authority: CN
Inventors: 陈亮; 李刚
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2019-09-30
Filing date: 2019-09-30
Publication date: 2023-10-20
Anticipated expiration: 2039-09-30
Also published as: CN110888821A

Abstract

A memory management method and device, in the method, at least one first identification corresponding to at least one memory page stored in a memory of an electronic device is generated firstly, then, according to the at least one first identification, at least one first memory page which is accessed by an application program and has the frequency smaller than or equal to the preset access frequency is determined, and accordingly, data in the at least one first memory page is stored in an external memory of the electronic device. By generating a first identifier for each memory page, the first identifier is used for indicating the frequency of accessing the memory page by the application program, so that data in the memory page with lower access frequency by the application program is stored in the external memory, and because the memory page is accessed with lower frequency, the data stored in the external memory is repeatedly migrated between the memory and the external memory for fewer times, thereby reducing the read-write operation of the external memory and reducing the influence on the service life of the external memory.

Description

Memory management method and device

Technical Field

The present application relates to the field of computer technologies, and in particular, to a memory management method and apparatus.

Background

Memory is one of the important components in electronic devices in which all programs run. The size of the memory affects the performance of the electronic device, for example, when the memory of the electronic device is large, the electronic device may allocate a required memory space for each of a plurality of programs that need to be run, and the plurality of programs may run independently; when the memory of the electronic device is smaller, for example, the memory can only allocate the needed memory space for two programs at the same time, so when a new program applies for the memory, the electronic device can only forcedly end part of the programs running in the memory and release the memory occupied by the part of the programs for the new program, and in this case, some functions of the electronic device are damaged, which affects the use of users. Therefore, expanding the memory of electronic devices is a significant research direction in the industry.

In order to expand the available memory space of the electronic device, one solution is: the exchange (swap) mechanism is used in the electronic device, namely, part of data stored in the memory of the electronic device is exchanged into the external storage device of the electronic device, so that the electronic device can release the memory space occupied by the part of data for a new program to use, and the effect of expanding the memory space which can be used currently by the electronic device is realized.

The use of the swap mechanism frequently writes data in the memory into the external storage device, however, for the embedded electronic device, such as a mobile phone or a tablet computer, the external storage device used is usually a flash memory (flash) storage device, and the write times of the flash memory device are limited, so that the service life of the flash memory device is influenced by the use of the swap mechanism. Therefore, how to reduce the influence on the lifetime of the external storage device while expanding the available memory space of the electronic device is a problem to be solved.

Disclosure of Invention

The embodiment of the application provides a memory management method and a memory management device, which are used for providing a scheme which has less influence on the service life of external storage equipment and can expand the usable memory space of electronic equipment.

In a first aspect, the present application provides a memory management method, in the method, at least one first identifier corresponding to at least one memory page is first generated for the at least one memory page stored in a memory of an electronic device, where the first identifier corresponding to the at least one memory page is used to indicate a frequency of access of the at least one memory page by an application program, and then, according to the at least one first identifier, at least one first memory page having the frequency of access of the at least one memory page less than or equal to a preset access frequency is determined, so that data in the at least one first memory page is stored in an external memory of the electronic device.

In the above technical solution, by generating, for each memory page, the first identifier for indicating the frequency of accessing the memory page by the application program, so as to store the data in the memory page with the lower access frequency by the application program into the external memory, since the frequency of accessing the memory page is lower, the number of times that the data stored into the external memory is repeatedly migrated between the memory and the external memory is less, thereby reducing the read-write operation of the external memory and reducing the influence on the lifetime of the external memory.

In one possible design, the first identifier corresponding to one memory page includes at least one of the following:

the number of times the memory page is accessed by the application program within a preset duration;

the memory page has an accessed state within the preset time period, wherein the accessed state comprises an accessed state accessed by at least one application program or an unaccessed state not accessed by any application program in a plurality of application programs, and the plurality of application programs are running application programs in the electronic equipment;

the memory page is accessed by the application program in the preset time length;

and the memory page is not accessed by the application program in the preset time period.

In the above technical solution, the first identifier may be implemented in a plurality of ways, so as to improve flexibility of the electronic device.

In one possible design, since the contents carried in the first identifier are different, the manner of determining the first memory page according to the first identifier is also different, which may include, but is not limited to, the following ways:

if the first identifier includes the number of times that the memory page is accessed by the application program within the preset duration, determining that at least one memory page corresponding to a first part of the first identifier is the at least one first memory page, wherein the first part of the first identifier is a first identifier indicating that the number of times that the memory page is accessed by the application program is smaller than or equal to a threshold value; or alternatively, the first and second heat exchangers may be,

if the first identifier includes an accessed state of the memory page within the preset duration, determining at least one memory page corresponding to a second part of first identifiers as the at least one first memory page, wherein the second part of first identifiers are first identifiers indicating that the memory page is in the non-accessed state; or alternatively, the first and second heat exchangers may be,

if the first identifier comprises information accessed by the application program within the preset time length, determining at least one memory page which does not carry the first identifier as the at least one first memory page; or alternatively, the first and second heat exchangers may be,

And if the first identifier comprises information that the memory pages are not accessed by the application program within the preset time period, determining that at least one memory page carrying the first identifier is the at least one first memory page.

In one possible design, if the first identifier includes information that the memory page is not accessed by the application program within the preset duration, the first identifier further includes a time when the first identifier is generated.

In the above technical solution, the frequency of accessing the memory page may be determined accurately according to the time of generating the first identifier carried in the first identifier.

In one possible design, if the first identifier includes information that the memory page is not accessed by the application program within the preset duration, the electronic device may first determine at least one second memory page carrying the first identifier, and then determine a time interval between a time when each second memory page generates the first identifier and a current time; and determining at least one memory page with the time interval being greater than or equal to a preset interval duration as the at least one first memory page from the at least one second memory page.

In the above technical solution, if the duration that the memory page is not accessed by the application program exceeds the preset interval duration, the probability of accessing the data of the memory page is smaller, so that after the data in the memory page is stored in the external memory, the data can not be read again for a long period of time, and the number of times of reading and writing to the external memory can be further reduced.

In one possible design, after storing the data in the at least one first memory page in the external memory of the electronic device, a second flag corresponding to each first memory page is generated, where the second flag is used to indicate that the data in the first memory page is stored in the external memory.

Thus, when the data in the memory page needs to be read, the data can be acquired from the external memory according to the second mark, so that the data acquisition time delay is reduced.

In one possible design, the electronic device may detect an amount of data of the data migrated to the external memory, and prohibit migration of the data to the external memory when the amount of data of the data migrated to the external memory is greater than or equal to the first amount of data.

In the above technical solution, by limiting the data amount of the data migrated to the external memory, the influence on the lifetime of the external memory is further reduced.

In a second aspect, a memory management device is provided, which includes a processor configured to implement the method described in the first aspect. The apparatus may also include a memory for storing program instructions and data. The memory is coupled to the processor, which may call and execute program instructions stored in the memory for implementing the method described in the first aspect above. The apparatus may also include a communication interface in communication with the processor.

In one possible design, the apparatus includes a communication interface and a processor, wherein:

the processor is used for generating at least one first identifier corresponding to at least one memory page stored in a memory of the electronic device, and the first identifier corresponding to one memory page is used for indicating the frequency of the memory page accessed by the application program; determining at least one first memory page according to the at least one first identifier, wherein each first memory page is a memory page which is accessed by an application program and has the frequency smaller than or equal to the preset access frequency;

the communication interface is used for storing the data in the at least one first memory page to an external memory of the electronic equipment.

In one possible design, the processor is specifically configured to:

determining at least one memory page carrying the first identifier as the at least one second memory page;

determining a time interval between the moment when each second memory page generates the first mark and the current moment;

and determining at least one memory page with the time interval being greater than or equal to a preset interval duration as the at least one first memory page from the at least one second memory page.

In one possible design, the processor is further configured to:

and generating a second mark corresponding to each first memory page, wherein the second mark is used for indicating that the data in the first memory page is stored in the external memory.

In one possible design, the processor is further configured to:

detecting a data amount of data migrated into the external memory;

and prohibiting migration of data to the external memory when the data amount of the data migrated to the external memory is greater than or equal to the first data amount.

In a third aspect, a memory management apparatus is provided, which may be an electronic device or an apparatus in an electronic device, where the apparatus may include a communication module and a processing module, where the modules may perform corresponding functions in any of the design examples of the first aspect, and where the modules may be implemented by software modules or by corresponding hardware entities, for example, where the functions of the communication module are similar to the functions of the communication interface in the second aspect, and the functions of the processing module are similar to the functions of the processor in the second aspect.

In one possible design, the processing module is configured to generate at least one first identifier corresponding to at least one memory page stored in a memory of the electronic device, where the first identifier corresponding to one memory page is used to indicate a frequency of access of the memory page by the application program; determining at least one first memory page according to the at least one first identifier, wherein each first memory page is a memory page which is accessed by an application program and has the frequency smaller than or equal to the preset access frequency;

the communication module is used for storing the data in the at least one first memory page to an external memory of the electronic equipment.

In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium storing a computer program comprising program instructions which, when executed by a computer, cause the computer to perform the method of any one of the first aspects.

In a fifth aspect, an embodiment of the present application provides a computer program product storing a computer program comprising program instructions which, when executed by a computer, cause the computer to perform the method of any of the first aspects.

In a sixth aspect, an embodiment of the present application provides a chip system, where the chip system includes a processor and may further include a memory, to implement the method in the first aspect. The chip system may be formed of a chip or may include a chip and other discrete devices.

In a seventh aspect, an embodiment of the present application provides a terminal, including a processor and a memory, where the memory stores computer executable instructions for causing the processor to perform the method according to the first aspect when invoked by the processor.

Advantageous effects of the above second to seventh aspects and implementations thereof reference may be made to the description of the advantageous effects of the method of the first aspect and implementations thereof.

Drawings

Fig. 1 is a schematic structural diagram of an electronic device 100 according to an embodiment of the present application;

FIG. 2 is a logical block diagram of an electronic device 100 provided in an embodiment of the present application;

FIG. 3 is a logical block diagram of one example of a kernel layer 22 and a hardware layer 23 in an embodiment of the present application;

FIG. 4 is a flowchart of an example of a memory management method according to an embodiment of the present application;

FIG. 5 is a schematic diagram of an example of a memory management method according to an embodiment of the present application;

FIG. 6 is a schematic diagram of an example of a memory management device according to an embodiment of the present application;

fig. 7 is a schematic diagram of another example of a memory management device according to an embodiment of the present application;

fig. 8 is a schematic diagram of another example of a memory management device according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be described in detail below with reference to the accompanying drawings and specific embodiments of the present application. In the following, some terms in the embodiments of the present application are explained for easy understanding by those skilled in the art.

1) The electronic device may be specifically a terminal device or a server terminal device. In particular, the terminal device may be any of various types of computer systems or devices that are mobile or portable and perform wireless communications. Which may include, for example, a mobile phone or a smart phone (e.g., an iPhone ^TM Android-based ^TM A telephone of (a)), a portable game device (e.g., a Nintendo DS ^TM 、PlayStation Portable ^TM 、Gameboy Advance ^TM 、iPhone ^TM ) Laptop, personal communication services (personal communication service, PCS) phone, session initiation protocol (session initiation protocol, SIP) phone, wireless local loop (wireless local loop, WLL) station, personal digital assistant (personal digital assistant, PDA), portable internet device, music player, data storage device, other handheld device, and wearable device.

Alternatively, the terminal device may also include a limited device, such as a device with lower power consumption, or a device with limited storage capacity, or a device with limited computing capacity, etc. Examples include bar codes, radio frequency identification (radio frequency identification, RFID), sensors, global positioning systems (global positioning system, GPS), laser scanners, and other information sensing devices.

By way of example, but not limitation, in embodiments of the present application, an intelligent wearable device is a generic term for applying wearable technology to intelligently design daily wear and develop wearable devices, such as glasses, gloves, watches, apparel, shoes, and the like. The smart wearable device is a portable device that is worn directly on the body or integrated into the clothing or accessories of the user. The intelligent wearable device is not only a hardware device, but also can realize a powerful function through software support, data interaction and cloud interaction. Generalized smart wearable devices include full functionality, large size, may not rely on smartphones to achieve complete or partial functionality, such as: smart watches or smart glasses, etc., and focus on only certain types of application functions, and need to be used in combination with other devices, such as smart phones, for example, various smart bracelets, smart helmets, smart jewelry, etc. for physical sign monitoring.

Alternatively, the terminal device may also be a Virtual Reality (VR) device, an augmented reality (augmented reality, AR) device, a wireless terminal device in industrial control (industrial control), a wireless terminal device in unmanned (driverless), a wireless terminal device in teleoperation (remote medical surgery), a wireless terminal device in smart grid (smart grid), a wireless terminal device in transportation security (transportation safety), a wireless terminal device in smart city, a wireless terminal device in smart home (smart home), or the like.

2) In the embodiments of the present application, "a plurality" refers to two or more, and in this regard, "a plurality" may be understood as "at least two" in the embodiments of the present application. "at least one" may be understood as one or more, for example as one, two or more. For example, including at least one means including one, two or more, and not limiting what is included, e.g., including at least one of A, B and C, then A, B, C, A and B, A and C, B and C, or A and B and C, may be included. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a exists alone, A and B exist together, and B exists alone. The character "/", unless otherwise specified, generally indicates that the associated object is an "or" relationship.

Unless stated to the contrary, the embodiments of the present application refer to ordinal terms such as "first," "second," etc., for distinguishing between multiple objects and not for defining a sequence, timing, priority, or importance of the multiple objects.

The following describes a structural diagram of an electronic device according to an embodiment of the present application. Fig. 1 shows an exemplary structural schematic of an electronic device. As shown in fig. 1, the electronic device 100 includes: processor 110 and memory 120 may communicate via one or more buses or signal lines, which may be divided into address buses, data buses, control buses, and the like. It will be appreciated by those skilled in the art that the structure of the electronic device shown in fig. 1 is not limiting of the electronic device, and that the electronic device provided by the embodiments of the present application may include more or less components than those illustrated, or may combine certain components, or may be arranged in different components.

The processor 110 may be a central processing unit (central processing unit, CPU), a network processor (network processor, NP) or a combination of CPU and NP. The processor 110 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (programmable logic device, PLD), or a combination thereof. The PLD may be a complex programmable logic device (complex programmable logic device, CPLD), a field-programmable gate array (field-programmable gate array, FPGA), general-purpose array logic (generic array logic, GAL), or any combination thereof.

A memory 120 for storing computer programs (or simply code), such as computer programs corresponding to application programs and operating systems; the processor 110 may call a computer program stored by the memory 120 to implement the functions defined by the computer program. The memory 120 may include an internal memory (may also be referred to as a memory) 121 and an external memory 122, wherein the memory 121 is used for temporarily storing codes and data of an application program and an operating system in an operating state, and the external memory 122 is used for storing codes and data of the application program in a non-operating state, and the like.

For example, the processor 110 may store the code corresponding to the operating system in the memory 121 and then execute the code corresponding to the operating system in the memory 121, thereby implementing various functions of the operating system on the electronic device 100, and the processor 110 may also store the code corresponding to the application program in the memory 121 and then execute the code corresponding to the application program, thereby implementing various functions of the application program on the electronic device 100. The operating system may be a Windows system, a MAC OS system, a Linux system, an Android system, or the like, and of course, may also be a future-oriented computer system, which is not limited in the embodiment of the present application.

Memory 120 may include volatile memory (RAM), such as random-access memory (RAM); the memory 120 may also include a nonvolatile memory (non-volatile memory), such as a flash memory (flash memory), a Hard Disk Drive (HDD), or a Solid State Drive (SSD); memory 120 may also include a combination of the types of memory described above. The number of the memories 120 may be one or more, and may be specifically set according to needs.

Further, in an embodiment, taking an operating system of the electronic device 100 as an Android system as an example, as shown in fig. 2, the electronic device 100 may be logically divided into an application layer 21, a kernel layer 22, and a hardware layer 23. Wherein the hardware layer 23 may include the processor 110 and the memory 120 shown in fig. 1, etc.; the application layer 21 includes one or more application programs (application 1, application 2, etc.), and the specific application program may be any type of application program such as a social application, an e-commerce application, a browser, etc. The kernel layer 22 acts as software middleware between the hardware layer 23 and the application layer 21 for managing and controlling hardware and software resources.

In one embodiment, referring to fig. 3, the kernel layer 22 includes a kernel 221 and a device 222 for providing an underlying system service, for example, the device 222 may include a ZRAM block device for performing compression processing on data in the memory 121, and a swap block device for implementing exchange with data in the memory 121, where the ZRAM block device corresponds to the memory 121 and the swap block device corresponds to the external storage 122. The data in the memory 121 is stored in the form of memory pages, and the memory pages stored in the memory 121 are divided into two parts, a first part being memory pages corresponding to the ZRAM block device (or may be referred to as memory pages in the ZRAM partition), and a second part being memory pages located in the non-ZRAM partition, wherein only memory pages located in the ZRAM partition can perform an operation of swapping to the external memory 122. The data in the external memory may also be divided into two parts, the first part being data corresponding to the swap block device (or may be referred to as data in a swap partition), the data in the swap partition being data exchanged from the memory 121 to the external memory 122, and the second part being data not obtained by the exchange operation of the memory 121. "swapping data in the memory 121 to the external storage" is understood to mean migrating data in the memory 121 to the external storage, that is, swapping data is understood to mean migrating data.

In addition, in the embodiment of the present application, names of the ZRAM block device, the swap block device, the ZRAM partition and the swap partition are not limited, and may be referred to as other names in other embodiments. The functionality of the ZRAM block device and the swap block device may also be implemented in other ways, for example, the ZRAM block device may be implemented by a thread for compressing data, and likewise the swap block device may be implemented by a thread. Alternatively, the ZRAM partition and the swap partition may not be provided in the memory 121 and the external memory 122, and for convenience of description, the example shown in fig. 3 will be described hereinafter, but those skilled in the art should not understand the scenario shown in fig. 3 as a limitation in the embodiment of the present application.

Next, based on the above application scenario, a procedure of a swap mechanism in the related art is described.

When a new program applies for memory to the kernel 221, for example, applies for a memory of 10M, and the kernel 221 determines that the remaining memory space in the memory 121 is smaller than 10M, the kernel 121 executes a swap process, writes data in a plurality of memory pages with earlier writing time into a swap partition of the external memory 122 according to the writing time sequence of the ZRAM partition, releases the memory space occupied by the plurality of memory pages, and then provides the released memory space for the new program to use. When the kernel 221 determines that the remaining memory space in the memory 121 is greater than the threshold, then the data in the swap partition of the external memory 122 is written into the memory 121.

As can be seen from the above process, the data in the memory 121 is frequently written into the external storage device 122 by using the swap mechanism, however, for the embedded electronic device, such as a mobile phone or a tablet computer, the external storage device 122 is usually a flash memory device, and since the write times of the flash memory device are limited, the frequent writing of the data can reduce the service life of the flash memory device, and after the write times reach the upper limit, the external storage device 122 cannot be used. Therefore, how to reduce the influence on the lifetime of the external storage device while expanding the available memory space of the electronic device is a problem to be solved.

In view of the above, an embodiment of the present application provides a memory management method, which can be applied to an electronic device, and is used for providing a scheme that has less influence on the lifetime of an external storage device and can expand the available memory space of the electronic device.

The following describes the technical scheme provided by the embodiment of the application with reference to the accompanying drawings.

An embodiment of the present application provides a memory management method, please refer to fig. 4, which is a flowchart of the method.

In the following description, the application of the technical solution provided in the present application in the application scenario shown in fig. 3 is illustrated as an example. As an example, the method may be performed by the kernel 221 as shown in fig. 3, or it may be understood that the method may be performed by the processor 110 in the electronic device 100 running a program of the kernel 221.

S401, data is stored in the memory 121 in a memory page manner.

When the electronic device 100 is turned on, the kernel 221 reads related data (e.g., related codes and configuration data) for supporting the electronic device 100 in a running state into the memory 121, for example, the operating system of the electronic device 100 and related data (e.g., related codes and configuration data) of the application programs 1-3 are read into the memory 121.

The kernel 221 stores a portion of the data into the ZRAM partition of the memory 121 according to a predetermined rule. As an example, the preset rule may be to store the related data of the preset application program into the ZRAM partition, and the preset application program may be application program 2 and application program 4, so that when kernel 221 determines that the related data of the operating system and application programs 1 to 3 are stored into memory 121, the related data of application program 2 is stored into the ZRAM partition, and the related data of the operating system, application program 1, and application program 3 are stored into the non-ZRAM partition. Referring to fig. 5, in fig. 5, memory pages 1 to 3 are taken as data stored in the ZRAM partition of the memory 121 by the application program 2, and memory pages 4 to 8 are taken as data stored in the non-ZRAM partition of the memory 121 by the operating system, the application program 1 and the application program 3.

Of course, the preset rule may be other content, for example, the preset rule may be that related data of a specific type of application program (for example, an application program of an instant messaging type or an application program of a video playing type) is stored in the ZRAM partition, which is not limited in the embodiment of the present application.

S402, generating a first identification corresponding to each memory page stored in the ZRAM partition.

In an embodiment of the present application, the first identifier is used to indicate whether the memory page is accessed by the application program. It should be noted that, the application program accessing a certain memory page may be an application program to which the memory page belongs, or may be other application programs, for example, the data stored in the memory page 1 is a chat record of a user during the running process of the WeChat application program, and the chat record of the WeChat application program may also be used by the Tech application program or other application programs.

In an embodiment of the present application, the first identifier may include, but is not limited to, the following forms.

In a first form, the first identifier may be the number of times each memory page is accessed within a preset duration, where the preset duration may be 2 hours or half an hour, that is, the number of times the memory page is accessed within the preset duration indicates whether the memory page is accessed, and when the number of times the memory page is accessed within the preset duration is 0, the memory page is not accessed by any application program. For example, the kernel 221 may create a memory page index that includes an identification of each memory page and the number of times each memory page is accessed within the predetermined time period, and the memory index may be stored in the memory 121 or the external storage 122. The initial number of accesses to each memory page is 0, and when a certain memory page in the ZRAM partition is accessed, the kernel 221 adds 1 to the number of accesses to the corresponding memory page. Please refer to table 1, which is an example of a memory index. In table 1, with the number of the memory page as the identifier of the memory page, the kernel 221 records that the number of times that the memory page 1 is accessed in the preset duration is 1, the number of times that the memory page 2 is accessed in the preset duration is 0, and the number of times that the memory page 3 is accessed in the preset duration is 3.

TABLE 1

Identification of memory pages	Number of times of being accessed
		1	1
2	0
		3	3

In a second form, the first flag indicates whether each memory page is accessed for a predetermined period of time. And if the initial accessed state of each memory page is not, when a certain memory page is accessed by any one application program within the preset time period, recording that the accessed state of the memory page within the preset time period is yes, otherwise, maintaining that the accessed state of the memory page within the preset time period is not. Specifically, the kernel 221 may determine whether each memory page is accessed and create a memory page index in a similar manner as in the first example, and will not be described again. Please refer to table 2, which is another example of the memory index. In table 2, the memory index includes an identifier of each memory page and an accessed state, where the accessed state is represented by a character "1" and the accessed state is represented by a character "0" and is represented by a negative character. For example, the accessed state of memory page 1 and memory page 3 is no, while the accessed state of memory page 2 is yes.

TABLE 2

Identification of memory pages	Accessed state
		1	0
2	1
		3	0

In the second example, since the kernel 221 only needs to record whether a certain memory page is accessed, and does not need to count the number of accesses of the memory page, the operation amount of the memory 221 can be reduced.

In the third form, since the first identifier is used to indicate whether a memory page is accessed by an application program, and whether a memory page is accessed by an application program has only two results, or is accessed or is not accessed, in order to further reduce the operation amount of the kernel 221, the kernel may record one result by using the first identifier, for example, the first identifier indicates that a memory page is accessed within a preset duration, if a certain memory page is accessed by an application program within the preset duration, the kernel 221 may add the first identifier to the memory page, and if a certain memory page is not accessed by any application program within the preset duration, the first identifier is not added to the memory page. Specifically, the kernel 221 may determine whether each memory page is accessed and create a memory page index in a similar manner as in the first example, in which case the memory page index may be simplified. Please refer to table 3, which is another example of the memory index. If the memory pages 1 and 3 are not accessed within the predetermined time period and the memory page 2 is accessed within the predetermined time period, the memory index includes only the identification of the accessed memory page, i.e. only the identification of the memory page 2, as shown in table 3.

TABLE 3 Table 3

Identification of memory pages
	2

In a fourth form, contrary to the foregoing third example, the first identifier indicates that the memory page is not accessed within the preset time period (or may also be referred to as an idle identifier), and if a certain memory page is accessed by an application program within the preset time period, the kernel 221 does not add the first identifier to the memory page, and if a certain memory page is not accessed by any application program within the preset time period, the first identifier may be added to the memory page. Additionally, in this example, when the first identifier is added to the memory page, the time of adding the first identifier may also be indicated. For example, at the starting time of the preset duration, the first identifier is added to each memory page, and the time (for example, the first time) when the first identifier is added is recorded, so as to obtain the memory page index as shown in table 4. In table 4, the memory index includes three kinds of information, i.e., an identifier of a memory page, whether to add the first identifier, and a time when the first identifier is added.

TABLE 4 Table 4

Identification of memory pages	Whether or not to include the first mark	The moment of adding the first identifier
			1	Is that	At a first time
2	Is that	At a first time
			3	Is that	At a first time

If the memory page 2 is accessed by the application program within the preset time period, the kernel 221 removes the first identifier added to the memory page 2 and removes the time when the first identifier is added, thereby obtaining a memory page index as shown in table 5. Alternatively, the entry corresponding to memory page 2 may be deleted directly from the memory page index (not shown in this example), which is not limiting.

TABLE 5

Identification of memory pages	Whether or not to include the first mark	The moment of adding the first identifier
			1	Is that	At a first time
2	Whether or not
			3	Is that	At a first time

In addition, the ZRAM partition may also write a new memory page, and when the new memory page is written, the first identifier is added to the new memory page and the time when the first identifier is added is recorded. For example, at a second time after the first time, memory 4 is written to the ZRAM partition, resulting in a memory page index as shown in table 6.

TABLE 6

Identification of memory pages	Whether or not to include the first mark	The moment of adding the first identifier
			1	Is that	At a first time
2	Whether or not
			3	Is that	At a first time
4	Is that	Second moment of time

In tables 1 to 6, the memory index is described in the form of a table, however, in practical use, the memory index may be in other forms, for example, a field is added to metadata information corresponding to each memory page, and information whether each memory page is accessed by an application program is recorded in the field, which is not limited to the recording mode of the first identifier.

It should be noted that, whether the memory page is accessed is also associated with the path of the process file corresponding to the memory page, for example, if the process file corresponding to the memory page is stored in the disk C, the memory page may be accessed frequently, and if the process file corresponding to the memory page is stored in the disk E, the memory page may not be accessed, so the kernel 221 may also generate the first identifier according to the path of the process file corresponding to the memory page. For example, if the first identifier is used to indicate that the memory page is not accessed within the preset duration, the kernel 221 adds the first identifier to the memory page corresponding to the process file stored in the disk E, instead of adding the first identifier to the memory page corresponding to the process file stored in the disk C. Of course, the first identifier may be added in other ways, which are not described here.

In addition, it should be noted that, the kernel 221 may update the memory page index periodically, in this case, the preset duration is a duration corresponding to one cycle, for example, after one cycle is ended, the kernel 221 sets the memory page index to an initial state, and obtains the accessed state of the memory page in the next cycle.

S403, determining at least one first memory page according to the first identification corresponding to each memory page.

In the embodiment of the present application, the first memory page is a memory page in the memory 121 that needs to be swapped into the swap partition. Exchanging memory pages in the memory 121 into the external memory 122, namely writing data in the memory pages into the external memory 122, and then reading the memory pages from the external memory 122 and writing the memory pages into the memory 121 when the memory pages need to be accessed, wherein the exchanging process of one memory page can involve two operations on the external memory 122, and if the number of times the memory pages exchanged into the external memory 122 are accessed is more, for example, the number of times the memory pages are accessed in a preset time period is 3, the exchanging process can be repeatedly executed for 3 times in the preset time period; if the memory page swapped into the external memory 122 is accessed less frequently or not, then the swap process may be performed 1 time within the preset time period after swapping the memory page into the external memory, or only the write operation to the external memory 122 is involved, but not the read operation to the external memory 122, with less impact on the lifetime of the external memory 122. In view of this, in the embodiment of the present application, in order to reduce the influence on the lifetime of the external memory 122, it is proposed to swap the memory pages in the ZRAM partition that have a small number of accesses or a low frequency of accesses into the external memory 122. Therefore, before performing the memory page swap operation, it is first necessary to determine the memory pages in the ZRAM partition that are accessed less frequently or have a low frequency of access. The memory page having a small number of accesses or a low frequency of accesses may be referred to as a cold memory page or an absolute cold memory page.

In the embodiment of the present application, according to the different forms of the first identifier, the ways of determining the memory pages with fewer accessed times or lower accessed frequency in the ZRAM partition are also different, which specifically includes but is not limited to the following ways.

The first way corresponds to a first form of the first identification:

the kernel 221 may determine, according to a preset threshold, a memory page in the ZRAM partition that is accessed less frequently or is accessed less frequently. The preset threshold may be a threshold of the number of times a memory page is accessed, and when the kernel 221 determines that the first identifier of a certain memory page indicates that the number of times the memory page is accessed within a preset duration is less than the preset threshold, the memory page is determined to be a memory page with fewer times of access or low frequency of access, i.e. the first memory page. For example, for the first identifier shown in table 1, if the preset threshold is 2, the kernel 221 determines that the first identifier of the memory page 1 indicates that the number of accesses is 1<2, and the first identifier of the memory page 2 indicates that the number of accesses is 0<2, it determines that the memory page 1 and the memory page 2 are the first memory pages respectively.

The second way corresponds to the second form of the first identification:

if the memory page is not accessed within the preset time, the access frequency of the memory page is lower. In this manner, if the memory 221 determines that the first identifier of a certain memory indicates that the accessed state of the memory page is no, the memory page is determined to be the first memory page. For example, for the first identifier shown in table 2, if the kernel 221 determines that the accessed states of the memory page 1 and the memory page 3 are no, it determines that the memory page 1 and the memory page 3 are the first memory page respectively.

A third way, corresponding to a third form of the first identification:

since the first identifier is used to indicate that a memory page is accessed within a preset time period, when the kernel 221 determines that a certain memory page does not include the first identifier, the memory page is determined to be the first memory page. For example, for the first identifier shown in table 3, if the kernel 221 determines that only the memory page 2 includes the first identifier, it determines that the memory page 1 and the memory page 3 are the first memory pages, respectively.

A fourth mode, corresponding to a fourth form of the first identifier:

since the memory page index corresponding to the memory page further includes the time when the first identifier is added, for the fourth form of the first identifier, in addition to determining whether the memory page includes the first identifier by determining whether the memory page includes the first identifier in a similar manner as the third form, the first memory page may be determined by combining whether the first identifier is included with the time when the first identifier is added. As an example, if both memory pages include the first identifier and the first identifier is added earlier, it is indicated that the fewer times the memory page is accessed, i.e., the more "cold" the memory page. For example, for the memory page index shown in table 6, memory page 1, memory page 3, and memory page 4 each include the first identification, but the first time is before the second time, so the kernel 221 determines that memory page 1 and memory page 3 are the first memory page, respectively. Or, a first time interval between the first time and the current time and a second time interval between the second time and the current time may be determined respectively, and a memory page whose time interval exceeds a preset interval duration is determined to be the first memory page. For example, if the first time interval is longer than the preset interval duration and the second time interval is shorter than the preset interval duration, it is determined that the memory page 1 is the first memory page.

It should be noted that, the kernel 221 may periodically scan the memory page index or the ZRAM partition, thereby determining the first memory page for swap during the scan period. The scan period may be the same as or different from the period in which the core 221 updates the page index, and is not limited herein.

S404, exchanging data of at least one first memory page to the swap partition.

After the kernel 221 determines the first memory page in the ZRAM partition for swap, the data in the first memory page is written into the swap partition of the external memory 122. Referring to fig. 5, if the first memory page is memory page 1 and memory page 3, the kernel 221 writes the data in memory page 1 and memory page 3 into the swap partition.

To further reduce the impact on the lifetime of the external memory 122, in an embodiment of the present application, the amount of data that is swapped into the swap partition each time is limited. For example, if the data amount of the data exchanged into the swap partition per scanning cycle is set in advance not to exceed the first data amount, when the kernel 221 determines that the data amount of the data written into the swap partition reaches the first data amount, writing of the data into the swap partition is suspended. In addition, when the kernel 211 determines that the remaining storage space of the external memory 122 is smaller than the first capacity or the number of writing times of the external memory 122 reaches a preset percentage of its maximum number of writing times, the swap mechanism may be turned off to stop writing the data in the memory page into the external memory 122. Alternatively, the kernel 221 may also count the amount of data that the user exchanges to the swap partition in a preset period (for example, the preset period is one day), and if the amount of data that a user exchanges to the swap partition in the preset period is greater than the second amount of data, stop executing the swap mechanism on the user, so as to avoid frequent writing of data to the external memory 122.

S405, adding a second identification for the first memory page in the memory page index, and releasing the memory space occupied by the first memory page.

Referring to fig. 5, memory 121 releases memory space corresponding to memory page 1 and memory page 3, which are indicated by dashed lines in fig. 5.

The second identifier is used for indicating that the data in the memory page is exchanged into the swap partition. Thus, when the application program needs to access the data in the first memory page, the kernel 221 can obtain the data from the swap partition according to the second identifier, so that the access delay can be reduced. Since the data in the first memory page is already written into the swap partition, the kernel 221 can release the memory space occupied by the first memory page for other applications, so that the available memory space can be enlarged.

S406, receiving an access request to the first memory page, and exchanging data in the first memory page from the swap partition to the memory 121.

After the kernel 221 exchanges the data in the first memory page to the swap partition, if the kernel 221 receives an access request to the first memory page, the kernel searches the memory page index, determines that the first memory page includes the second identifier, and indicates that the data in the first memory page is stored in the swap partition, so that the kernel 221 reads the data in the first memory page from the swap partition, writes the data into the memory 121, and then clears the first identifier and the second identifier of the first memory page.

In the above technical solution, by adding the first identifier that is accessed to the memory page, the kernel can determine the memory page that occupies for a long time but has a lower access frequency from the ZRAM partition, and then write the memory page that has a lower access frequency into the external memory.

Further, since the amount of data written to the external memory at a time is limited, the influence on the lifetime of the external memory can be reduced as much as possible.

In the embodiment of the application, the method provided by the embodiment of the application is introduced from the perspective of the electronic equipment. In order to implement the functions in the method provided by the embodiment of the present application, the electronic device may include a hardware structure and/or a software module, where the functions are implemented in the form of a hardware structure, a software module, or a hardware structure plus a software module. Some of the functions described above are performed in a hardware configuration, a software module, or a combination of hardware and software modules, depending on the specific application of the solution and design constraints.

Fig. 6 shows a schematic structure of a memory management device 600. The memory management device 600 may be an electronic device, and may implement functions of the electronic device in the method provided by the embodiment of the present application; the memory management device 600 may also be a device capable of supporting the electronic apparatus to implement the functions of the electronic apparatus in the method provided by the embodiment of the present application. The memory management device 600 may be a hardware structure, a software module, or a combination of hardware and software modules. The memory management device 600 may be implemented by a system-on-chip. In the embodiment of the application, the chip system can be formed by a chip, and can also comprise the chip and other discrete devices.

The memory management device 600 may include a processing module 601 and a communication module 602.

The communication module 602 may be used to perform step S404 and step S406 in the embodiment shown in fig. 4, and/or to support other processes of the techniques described herein. The communication module 602 is used to communicate between the memory management apparatus 600 and the processing module 601 or other electronic devices, which may be a circuit, a device, an interface, a bus, a software module, or any other apparatus that may implement communication.

The processing module 601 may be used to perform steps S401-S403 and step S405 in the embodiment shown in fig. 4, and/or other processes for supporting the techniques described herein.

All relevant contents of each step related to the above method embodiment may be cited to the functional description of the corresponding functional module, which is not described herein.

The embodiment of the application also provides a memory management device which can be a terminal or a circuit. The memory management device may be configured to perform the actions performed by the electronic device in the above-described method embodiments.

Taking a terminal as an example of a mobile phone, fig. 7 is a block diagram illustrating a part of a structure of a mobile phone 700 according to an embodiment of the present application. Referring to fig. 7, a handset 700 includes Radio Frequency (RF) circuitry 710, memory 720, other input devices 730, a display 740, sensors 750, audio circuitry 760, I/O subsystem 770, processor 780, and power supply 790. It will be appreciated by those skilled in the art that the handset construction shown in fig. 7 is not limiting of the handset and may include more or fewer components than shown, or may combine certain components, or split certain components, or a different arrangement of components. Those skilled in the art will appreciate that the display 740 pertains to a User Interface (UI) and that the handset 700 may include fewer user interfaces than shown or otherwise.

The following describes the components of the mobile phone 700 in detail with reference to fig. 7:

the RF circuit 710 may be configured to receive and transmit signals during a message or a call, and specifically, receive downlink information of a base station and process the downlink information with the processor 780; in addition, the data of the design uplink is sent to the base station. Typically, RF circuitry includes, but is not limited to, antennas, at least one amplifier, transceivers, couplers, low noise amplifiers (low noise amplifier, LNAs), diplexers, and the like. In addition, the RF circuitry 710 may also communicate with networks and other devices via wireless communications. The wireless communication may use any communication standard or protocol including, but not limited to, global system for mobile communications (global System of mobile communication, GSM), general packet radio service (general packet radio service, GPRS), code division multiple access (code division multiple access, CDMA), wideband code division multiple access (wideband code division multiple Access, WCDMA), long term evolution (long term evolution, LTE), email, short message service (short messaging service, SMS), and the like.

Memory 720 may be used to store computer programs such as the application programs and operating system shown in FIG. 7; the processor may call a computer program stored in the memory to implement the functions defined by the computer program. Such as a processor executing an operating system to perform various functions of the operating system on the handset 700. The operating system may be Or other operating system, to which embodiments of the application are not limited in any way. The memory 720 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, application programs required for at least one function (such as a sound playing function, an image playing function, etc.), and the like; the storage data area may store data (such as audio data, phonebooks, etc.) created according to the use of the handset 700, etc. In addition, memory 720 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage device.

Other input devices 730 may be used to receive entered numeric or character information and to generate key signal inputs related to user settings and function control of the handset 700. In particular, other input devices 730 may include, but are not limited to, one or more of a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, a joystick, a light mouse (a light mouse is a touch-sensitive surface that does not display visual output, or an extension of a touch-sensitive surface formed by a touch screen), etc. The other input devices 730 are connected to the other input device controller 771 of the I/O subsystem 770 and interact with the processor 780 under control of the other input device controller 771.

The display 740 may be used to display information entered by a user or provided to a user as well as various menus of the handset 700, and may also accept user inputs. A particular display 740 may include a display panel 741, as well as a touch panel 742. The display panel 741 may be configured in the form of a liquid crystal display (liquid crystal display, LCD), an organic light-emitting diode (OLED), or the like. The touch panel 742, also referred to as a touch screen, a touch sensitive screen, or the like, may collect touch or non-touch operations on or near the user (e.g., operations of the user using any suitable object or accessory such as a finger, a stylus, or the like on or near the touch panel 742, and may also include somatosensory operations; the operations include single-point control operations, multi-point control operations, or the like, of the type of operations) and drive the corresponding connection device according to a preset program. Alternatively, the touch panel 742 may include two parts, a touch detection device and a touch controller. The touch detection device detects the touch azimuth and the touch gesture of a user, detects signals brought by touch operation and transmits the signals to the touch controller; the touch controller receives touch information from the touch detection device, converts the touch information into information which can be processed by the processor, sends the information to the processor 780, and can receive and execute commands sent by the processor 780. In addition, the touch panel 742 may be implemented by various types such as resistive, capacitive, infrared, and surface acoustic wave, and the touch panel 742 may be implemented by any technology developed in the future. Further, the touch panel 742 may overlay the display panel 741, and a user may operate on or near the touch panel 742 overlaid on the display 741 based on content displayed by the display 741 (including, but not limited to, a soft keyboard, a virtual mouse, virtual keys, icons, etc.), and upon detection of an operation thereon or thereabout by the touch panel 742, the touch panel 742 is passed to the processor 780 via the I/O subsystem 770 to determine user input, and the processor 780 then provides a corresponding visual output on the display 741 via the I/O subsystem 770 based on the user input. Although in fig. 7, the touch panel 742 and the display panel 741 are two separate components for implementing the input and input functions of the cell phone 700, in some embodiments, the touch panel 742 and the display panel 741 may be integrated to implement the input and output functions of the cell phone 700.

The handset 700 may also include at least one sensor 750, such as a light sensor, a motion sensor, and other sensors. Specifically, the light sensor may include an ambient light sensor that may adjust the brightness of the display panel 741 according to the brightness of ambient light, and a proximity sensor that may turn off the display panel 741 and/or the backlight when the mobile phone 700 is moved to the ear. As one of the motion sensors, the accelerometer sensor can detect the acceleration in all directions (generally three axes), and can detect the gravity and direction when stationary, and can be used for applications of recognizing the gesture of a mobile phone (such as horizontal and vertical screen switching, related games, magnetometer gesture calibration), vibration recognition related functions (such as pedometer and knocking), and the like; other sensors such as gyroscopes, barometers, hygrometers, thermometers, infrared sensors, etc. that may be configured with the handset 700 are not described in detail herein.

Audio circuitry 760, speaker 761, and microphone 762 may provide an audio interface between a user and the handset 700. The audio circuit 760 may transmit the received audio data converted signal to the speaker 761, and the audio signal is converted into a sound signal by the speaker 761 to be output; on the other hand, microphone 762 converts the collected sound signals into signals, which are received by audio circuit 760 and converted into audio data, which are output to RF circuit 710 for transmission to, for example, another cell phone, or to memory 720 for further processing.

The I/O subsystem 770 is used to control input and output devices, including other device input controllers 771, sensor controllers 772, and display controllers 773. Optionally, one or more other input control device controllers 771 receive signals from and/or send signals to other input devices 730, and other input devices 730 may include physical buttons (push buttons, rocker buttons, etc.), dials, slide switches, joysticks, click wheels, optical mice (optical mice are touch-sensitive surfaces that do not display visual output, or extensions of touch-sensitive surfaces formed by touch screens). It is noted that other input control device controllers 771 may be connected to any one or more of the above devices. The display controller 773 in the I/O subsystem 770 receives signals from the display 740 and/or transmits signals to the display 740. Upon detection of user input by display 740, display controller 773 converts the detected user input into interaction with user interface objects displayed on display 740, i.e., to achieve human-machine interaction. Sensor controller 772 may receive signals from one or more sensors 750 and/or transmit signals to one or more sensors 750.

The processor 780 is a control center of the cell phone 700, connects various parts of the entire cell phone using various interfaces and lines, and performs various functions of the cell phone 700 and processes data by running or executing software programs and/or modules stored in the memory 720 and calling data stored in the memory 720, thereby performing overall monitoring of the cell phone. Optionally, the processor 780 may include one or more processing units; preferably, the processor 780 may integrate an application processor that primarily processes operating systems, user interfaces, applications, etc., with a modem processor that primarily processes wireless communications. It will be appreciated that the modem processor described above may not be integrated into the processor 780.

The handset 700 further includes a power supply 790 (e.g., a battery) for powering the various components, which may preferably be logically connected to the processor 780 through a power management system, such as to provide for managing charge, discharge, and power consumption by the power management system.

Although not shown, the mobile phone 700 may further include a camera, a bluetooth module, etc., which will not be described herein.

In addition, the division of the modules in the embodiment shown in fig. 6 is schematic, and is merely a logic function division, and there may be another division manner in actual implementation, and in addition, each functional module in the embodiments of the present application may be integrated in one processor, or may exist separately and physically, or two or more modules may be integrated in one module. The integrated modules may be implemented in hardware or in software functional modules.

Fig. 8 shows a memory management device 800 according to an embodiment of the present application, where the memory management device 800 may be an electronic device, for example, a terminal, capable of implementing functions of the electronic device in the method according to the embodiment of the present application; the memory management device 800 may also be a device capable of supporting a terminal to implement the functions of the electronic device in the method provided by the embodiment of the present application. The memory management device 800 may be a system-on-a-chip. In the embodiment of the application, the chip system can be formed by a chip, and can also comprise the chip and other discrete devices.

The memory management device 800 includes at least one processor 820 for implementing or supporting the memory management device 800 to implement the functions of the electronic device in the method provided in the embodiment of the present application. For example, the processor 820 may generate a first identifier corresponding to a memory page, which is specifically referred to in the detailed description of the method example and will not be described herein.

The memory management device 800 may also include at least one memory 830 for storing program instructions and/or data. Memory 830 is coupled to processor 820. The coupling in the embodiments of the present application is an indirect coupling or communication connection between devices, units, or modules, which may be in electrical, mechanical, or other forms for information interaction between the devices, units, or modules. Processor 820 may operate in conjunction with memory 830. Processor 820 may execute program instructions stored in memory 830. At least one of the at least one memory may be included in the processor.

The memory management device 800 may also include a communication interface 810 for communicating with other apparatus over a transmission medium so that the device used in the device 1800 may communicate with other apparatus. The other device may be a terminal, for example. Processor 820 may transmit and receive data using communication interface 810.

The specific connection medium between the communication interface 810, the processor 820, and the memory 830 is not limited in the embodiment of the present application. In the embodiment of the present application, the memory 830, the processor 820 and the communication interface 810 are connected through the bus 840 in fig. 8, where the bus is indicated by a thick line in fig. 8, and the connection manner between other components is only schematically illustrated, but not limited thereto. The buses may be classified as address buses, data buses, control buses, etc. For ease of illustration, only one thick line is shown in fig. 8, but not only one bus or one type of bus.

In an embodiment of the present application, processor 820 may be a general purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, which may implement or perform the methods, steps, and logic blocks disclosed in the embodiments of the present application. The general purpose processor may be a microprocessor or any conventional processor or the like. The steps of a method disclosed in connection with the embodiments of the present application may be embodied directly in a hardware processor for execution, or in a combination of hardware and software modules in the processor for execution.

In an embodiment of the present application, the memory 830 may be a nonvolatile memory, such as a hard disk (HDD) or a Solid State Drive (SSD), or may be a volatile memory (volatile memory), for example, a random-access memory (RAM). The memory is any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited to such. The memory in embodiments of the present application may also be circuitry or any other device capable of performing memory functions for storing program instructions and/or data.

Embodiments of the present application also provide a computer-readable storage medium comprising instructions that, when executed on a computer, cause the computer to perform the method performed by the electronic device in the embodiments shown in fig. 4 or fig. 5.

Embodiments of the present application also provide a computer program product comprising instructions which, when run on a computer, cause the computer to perform the method performed by the electronic device in the embodiments shown in fig. 4 or fig. 5.

The embodiment of the application provides a chip system, which comprises a processor and can also comprise a memory, wherein the memory is used for realizing the functions of the computing equipment in the method. The chip system may be formed of a chip or may include a chip and other discrete devices.

The method provided by the embodiment of the application can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, produces a flow or function in accordance with embodiments of the present application, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, a network device, a user device, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL), or wireless (e.g., infrared, wireless, microwave, etc.) means, the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc., that contains an integration of one or more available media, the available media may be magnetic media (e.g., floppy disk, hard disk, tape), optical media (e.g., digital video disc (digital video disc, DVD)), or semiconductor media (e.g., SSD), etc.

It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the scope of the application. Thus, it is intended that the present application also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims

1. A memory management method, comprising:

generating at least one first identifier corresponding to at least one memory page stored in a memory of the electronic device, wherein the first identifier corresponding to one memory page is used for indicating the frequency of the memory page accessed by an application program;

determining at least one first memory page according to the at least one first identifier, wherein each first memory page is a memory page which is accessed by an application program and has the frequency smaller than or equal to the preset access frequency;

storing data in the at least one first memory page to an external memory of the electronic device;

detecting a data amount of data migrated into the external memory;

2. The method of claim 1, wherein the first identifier corresponding to a memory page comprises at least one of:

The number of times that the memory page is accessed by the application program within a preset duration;

the memory page is in an accessed state within the preset duration, the accessed state comprises an accessed state accessed by at least one application program or an unaccessed state not accessed by any application program in a plurality of application programs, and the plurality of application programs are running application programs in the electronic equipment;

and the memory page is not accessed by the application program in the preset time.

3. The method of claim 2, wherein determining at least one first memory page based on the at least one first identification comprises:

4. A method according to any of claims 1-3, wherein if the first identifier comprises information that the memory page has not been accessed by an application within the preset time period, the first identifier further comprises a time of generation of the first identifier.

5. The method of claim 4, wherein determining at least one first memory page based on the at least one first identification comprises:

6. A method according to any of claims 1-3, wherein after storing the data in the at least one first memory page to an external memory of the electronic device, the method further comprises:

7. A memory management device comprising a processor and a communication interface, wherein:

the communication interface is used for storing the data in the at least one first memory page to an external memory of the electronic equipment;

the processor is further configured to detect a data amount of data migrated to the external memory; and prohibiting migration of data to the external memory when the data amount of the data migrated to the external memory is greater than or equal to the first data amount.

8. The apparatus of claim 7, wherein the first identifier corresponding to a memory page comprises at least one of:

9. The apparatus of claim 8, wherein the processor is specifically configured to:

10. The apparatus of any of claims 7-9, wherein if the first identifier includes information that the memory page is not accessed by an application within the preset time period, the first identifier further includes a time at which the first identifier is generated.

11. The apparatus of claim 10, wherein the processor is specifically configured to:

12. The apparatus of any one of claims 7-9, wherein the processor is further configured to:

13. A computer storage medium having stored therein computer executable instructions for causing the computer to perform the method of any of the preceding claims 1-6 when invoked by the computer.

14. A terminal comprising a processor and a memory having stored therein computer executable instructions which when invoked by the processor are for causing the processor to perform the method of any of the preceding claims 1-6.