CN110880469A - Optimization method of silicon wafer alignment mark layout - Google Patents
Optimization method of silicon wafer alignment mark layout Download PDFInfo
- Publication number
- CN110880469A CN110880469A CN201911178873.0A CN201911178873A CN110880469A CN 110880469 A CN110880469 A CN 110880469A CN 201911178873 A CN201911178873 A CN 201911178873A CN 110880469 A CN110880469 A CN 110880469A
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- China
- Prior art keywords
- alignment
- alignment mark
- alignment marks
- field
- optimization method
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 53
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 53
- 239000010703 silicon Substances 0.000 title claims abstract description 53
- 238000000034 method Methods 0.000 title claims abstract description 40
- 238000005457 optimization Methods 0.000 title claims abstract description 31
- 238000005259 measurement Methods 0.000 claims abstract description 9
- 235000012431 wafers Nutrition 0.000 claims description 44
- 238000013461 design Methods 0.000 claims description 3
- 238000009826 distribution Methods 0.000 description 3
- 238000012937 correction Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001900 extreme ultraviolet lithography Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/682—Mask-wafer alignment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
Claims (9)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911178873.0A CN110880469B (en) | 2019-11-26 | 2019-11-26 | Optimization method of silicon wafer alignment mark layout |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911178873.0A CN110880469B (en) | 2019-11-26 | 2019-11-26 | Optimization method of silicon wafer alignment mark layout |
Publications (2)
Publication Number | Publication Date |
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CN110880469A true CN110880469A (en) | 2020-03-13 |
CN110880469B CN110880469B (en) | 2022-04-29 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201911178873.0A Active CN110880469B (en) | 2019-11-26 | 2019-11-26 | Optimization method of silicon wafer alignment mark layout |
Country Status (1)
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CN (1) | CN110880469B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113777893A (en) * | 2021-08-27 | 2021-12-10 | 深圳天狼芯半导体有限公司 | Overlay error compensation method, overlay error compensation device, photoetching machine and storage medium |
Citations (12)
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---|---|---|---|---|
JPH06275496A (en) * | 1993-01-21 | 1994-09-30 | Nikon Corp | Alignment method |
JPH0897114A (en) * | 1994-09-27 | 1996-04-12 | Toshiba Corp | Alignment method |
US5656402A (en) * | 1994-08-22 | 1997-08-12 | Sony Corporation | Method for alignment of manufacturing semiconductor apparatus |
JP2000266917A (en) * | 1999-03-18 | 2000-09-29 | Canon Inc | Manufacture of diffraction optical element |
US6204509B1 (en) * | 1997-11-11 | 2001-03-20 | Nikon Corporation | Projection-microlithography apparatus, masks, and related methods incorporating reticle-distortion measurement and correction |
CN1916770A (en) * | 2005-07-12 | 2007-02-21 | Asml荷兰有限公司 | Method of selecting a grid model for correcting a process recipe and lithographic assembly using the same |
JP2007208094A (en) * | 2006-02-03 | 2007-08-16 | Toray Ind Inc | Method for aligning substrate, and substrate processing device |
US20070268472A1 (en) * | 2006-05-01 | 2007-11-22 | Canon Kabushiki Kaisha | Exposure apparatus and method, and device manufacturing method |
CN101169594A (en) * | 2007-11-23 | 2008-04-30 | 上海微电子装备有限公司 | Photo-etching machine imaging quality measuring method |
CN101738873A (en) * | 2008-11-10 | 2010-06-16 | 优志旺电机株式会社 | Exposure device |
CN105446090A (en) * | 2014-08-20 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Alignment measurement method |
CN108431695A (en) * | 2015-12-24 | 2018-08-21 | Asml荷兰有限公司 | Control method, device making method, the control system and lithographic equipment for lithographic equipment of patterning process |
-
2019
- 2019-11-26 CN CN201911178873.0A patent/CN110880469B/en active Active
Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06275496A (en) * | 1993-01-21 | 1994-09-30 | Nikon Corp | Alignment method |
US5656402A (en) * | 1994-08-22 | 1997-08-12 | Sony Corporation | Method for alignment of manufacturing semiconductor apparatus |
JPH0897114A (en) * | 1994-09-27 | 1996-04-12 | Toshiba Corp | Alignment method |
US6204509B1 (en) * | 1997-11-11 | 2001-03-20 | Nikon Corporation | Projection-microlithography apparatus, masks, and related methods incorporating reticle-distortion measurement and correction |
JP2000266917A (en) * | 1999-03-18 | 2000-09-29 | Canon Inc | Manufacture of diffraction optical element |
CN1916770A (en) * | 2005-07-12 | 2007-02-21 | Asml荷兰有限公司 | Method of selecting a grid model for correcting a process recipe and lithographic assembly using the same |
JP2007208094A (en) * | 2006-02-03 | 2007-08-16 | Toray Ind Inc | Method for aligning substrate, and substrate processing device |
US20070268472A1 (en) * | 2006-05-01 | 2007-11-22 | Canon Kabushiki Kaisha | Exposure apparatus and method, and device manufacturing method |
CN101169594A (en) * | 2007-11-23 | 2008-04-30 | 上海微电子装备有限公司 | Photo-etching machine imaging quality measuring method |
CN101738873A (en) * | 2008-11-10 | 2010-06-16 | 优志旺电机株式会社 | Exposure device |
CN105446090A (en) * | 2014-08-20 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Alignment measurement method |
CN108431695A (en) * | 2015-12-24 | 2018-08-21 | Asml荷兰有限公司 | Control method, device making method, the control system and lithographic equipment for lithographic equipment of patterning process |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113777893A (en) * | 2021-08-27 | 2021-12-10 | 深圳天狼芯半导体有限公司 | Overlay error compensation method, overlay error compensation device, photoetching machine and storage medium |
CN113777893B (en) * | 2021-08-27 | 2024-02-09 | 深圳天狼芯半导体有限公司 | Overlay error compensation method, overlay error compensation device, photoetching machine and storage medium |
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Publication number | Publication date |
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CN110880469B (en) | 2022-04-29 |
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Inventor after: Li Jing Inventor after: Ding Minxia Inventor after: Zhang Qingyang Inventor after: Zhu Shidong Inventor after: Chang Mei Chang Inventor after: Wu Zhipeng Inventor after: Hu Danyi Inventor before: Li Jing Inventor before: Ding Minxia Inventor before: Zhang Qingyang Inventor before: Zhu Shidong Inventor before: Chang Mei Chang Inventor before: Xie Dongdong Inventor before: Wu Zhipeng Inventor before: Hu Danyi |
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CB03 | Change of inventor or designer information | ||
CB03 | Change of inventor or designer information |
Inventor after: Li Jing Inventor after: Ding Minxia Inventor after: Zhang Qingyang Inventor after: Zhu Shidong Inventor after: Chang Mei Chang Inventor after: Wu Zhipeng Inventor after: Hu Danyi Inventor before: Li Jing Inventor before: Ding Minxia Inventor before: Zhang Qingyang Inventor before: Zhu Shidong Inventor before: Chang Mei Chang Inventor before: Xie Dongdong Inventor before: Wu Zhipeng Inventor before: Hu Danyi |
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