CN110879370B - Fault current rapid judgment method based on multiple data windows - Google Patents

Fault current rapid judgment method based on multiple data windows Download PDF

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CN110879370B
CN110879370B CN201910893479.9A CN201910893479A CN110879370B CN 110879370 B CN110879370 B CN 110879370B CN 201910893479 A CN201910893479 A CN 201910893479A CN 110879370 B CN110879370 B CN 110879370B
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张衍奎
王川
朱建华
鲍伟
田新宇
杜海燕
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Ningxia Kaichen Electric Group Co ltd
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Abstract

The invention relates to a fault current rapid judgment method based on multiple data windows. The method is characterized by comprising the following steps: (1) firstly, carrying out geometric reduction on current, and reducing the three-phase alternating current to a detectable standard, namely 0-300 mA; (2) performing AD sampling of alternating current, namely discretization of an analog signal, and calculating the discretized signal; (3) sampling and calculating the processed signals; (4) carrying out fault detection in a multi-data window mode on the obtained sampling value; (5) if the fault occurs, the short brake action is carried out or an alarm signal is sent out. The method of the invention also has the following beneficial effects: 1. the time for redundant determination can be greatly reduced. 2. Compared with the traditional method, the specific time point (within 5 ms) of the circuit failure can be obtained more accurately. 3. The algorithm complexity is low, and the operation pressure of the controller is small.

Description

Fault current rapid judgment method based on multiple data windows
Technical Field
The invention relates to a fault current rapid judgment method based on multiple data windows.
Background
The most common and at the same time most dangerous faults in electrical installations are the occurrence of various forms of short circuits, in which the following consequences can occur: 1. the fault element is damaged by the large short-circuit current at the fault point and the burning arc. 2. Short circuit currents through non-faulty components cause damage or shorten their service life due to the effects of heat and electromotive forces. 3. The voltage in a part of areas in the power system is greatly reduced, and the stability of power consumption of users is damaged or the quality of factory products is influenced. 4. The stability of parallel operation of the power system is damaged, system oscillation is caused, and even the whole system is broken down. The fault and abnormal operation state may cause accidents in the power system, and the so-called accident means that the normal operation of the system or a part of the system is damaged, and causes the situation that the power supply is low or the power quality is deteriorated to an unallowable level, even causes personal injury, electrical equipment damage and the like.
In addition to taking various active measures to eliminate or reduce the possibility of faults in the power system, once a fault occurs, the fault element must be quickly and selectively removed, which is one of the most effective methods for ensuring the safe operation of the power system. In order to maintain stable operation of a system, the time for removing a fault is often required to be as small as a few hundredths of a second, and a very important index of a power integrated protection device is the time for detecting the fault. In addition to the time of power failure detection, redundant detection of a failure is also an important point in power integrated protection, that is, after a failure is judged for the first time, action processing should not be directly performed, but redundant judgment should be performed for multiple times, because if a misjudgment failure occurs, the whole circuit is cut off, and a power consumption enterprise is damaged seriously. If the fault confirmation is carried out for two to three times, the fault can be accurately considered to occur, and corresponding action can be executed.
At present, the methods of full-wave Fourier transformation and zero sequence signal detection are used for corresponding fault judgment of many electrical equipment, and the whole judgment process is larger than 40ms by adopting a two-section full-wave Fourier method, namely, frequency domain conversion of Fourier is carried out at least twice. The zero sequence signal detection method is characterized in that zero sequence signals in a three-phase circuit are detected as a basis for fault judgment, the method has the advantage that the specific time of the fault occurrence can be accurately detected, but the method has the disadvantage that full-wave Fourier transform is required to determine and judge the fault after the fault is detected, otherwise, the type of the fault and the phase circuit in which the fault occurs cannot be known.
Disclosure of Invention
The invention aims to provide a fault current quick judgment method based on multiple data windows, which can judge a current short-circuit fault as quickly as possible without misjudgment after a circuit has a fault.
A fault current fast judging method based on multiple data windows is characterized by comprising the following steps:
(1) firstly, carrying out geometric reduction on current, and reducing the three-phase alternating current to a detectable standard, namely 0-300 mA;
(2) performing AD sampling of alternating current, namely discretization of an analog signal, and calculating the discretized signal;
(3) sampling and calculating the processed signals;
(4) carrying out fault detection in a multi-data window mode on the obtained sampling value;
(5) if the fault occurs, the short brake action is carried out or an alarm signal is sent out.
The step (1) is specifically that firstly, conversion is carried out through a high-precision current transformer, the secondary output of the current transformer is connected with an operational amplifier I/V conversion circuit so as to improve the load capacity of the current transformer, the input end of the current transformer is connected with three-phase alternating current for fault detection, the current transformer works in a zero-load state, and the proportion conversion of current specifically adopts a formula
Figure BDA0002209514820000031
And calculating, wherein OutPut represents the converted current, and Input represents the current to be converted.
And (2) performing discretization sampling on the signals obtained in the step (1), specifically performing AD sampling by adopting a successive approximation method, wherein the sampling points are 16 points, namely the sampling frequency is 800hz, storing the obtained signals into a 2 x 16 matrix for storage, wherein the matrix is stored by two dimensions, the first dimension is the sampling time, and the second dimension is the signals sampled at the time.
And (3) specifically, performing matrix storage on the signals obtained in the step (2), using a matrix with 20 rows and 1 column for storage, sequentially storing from 1 row to 20 rows, performing shift algorithm storage on the newly sampled signals, namely removing the data of the coordinates (1, 0) to obtain a matrix, storing the data of the original coordinates (2, 0) into the positions of the coordinates (1, 0), and repeating the steps to achieve data continuity.
Specifically, the step (4) is to perform fault detection once every quarter of a period, obtain four sets of complete periodic signals by using signals of four data windows, perform frequency transformation on the four periodic signals respectively, and decompose the periodic function into a constant direct current component and various higher harmonic components according to the concept of Fourier series, and the method is represented as follows:
Figure BDA0002209514820000032
wherein n is harmonic order, n is 0,1,2, … …; a isnAnd bnThe amplitudes of the cosine term and the sine term of each harmonic wave are respectively; omeganRefers to the frequency of the harmonic order;
from the principle of Fourier series, a can be obtainednAnd bnAre respectively as
Figure BDA0002209514820000033
Wherein T is sampling time; x (t) refers to the function being sampled; n denotes the number of harmonics; t is time; omeganRefers to the frequency of the subharmonic; a isnThe cosine term of each harmonic;
Figure BDA0002209514820000034
wherein T is sampling time; x (t) refers to the function being sampled; n denotes the number of harmonics; t is time; omeganRefers to the frequency of the subharmonic; bnSine terms of each harmonic;
judging that the first data window has a fault if the ratio of the frequency energy to the total energy of the fundamental wave is larger than the predetermined threshold value, and then sequentially pushing back three data windows, wherein the interval between every two data windows is a quarter cycle, and if the signals of all four cycles judge the fault characteristics, judging that the fault without misjudgment occurs; otherwise, no power-off operation is performed.
Wherein, after the power-off operation is not executed, the two-layer protection is carried out, namely, the detection sensitivity is improved, and the response warning information is responded, wherein the detection sensitivity refers to the frequency of two fault detections.
Where the agreed threshold is 0.8.
The invention provides a system for rapidly detecting electrical faults under the condition of ensuring no misjudgment, which has the function of adjusting the accuracy of the time when the faults occur according to actual items and is suitable for being used in rapid and accurate troubleshooting of circuit faults in microcomputer comprehensive protection, transformer substations and the like. The method mainly carries out frequency domain calculation in a form of multiple data windows, and shortens sampling time after first sampling by adopting a method of multiple data windows. The method of the invention also has the following beneficial effects: 1. the time for redundant determination can be greatly reduced. 2. Compared with the traditional method, the specific time point (within 5 ms) of the circuit failure can be obtained more accurately. 3. The algorithm complexity is low, and the operation pressure of the controller is small.
Drawings
FIG. 1 is a schematic diagram of the present invention;
FIG. 2 is a comparison graph of voltage sampling for one cycle before and after the conversion in step 1 of example 1 of the present invention;
fig. 3 is a power grid data diagram after uninterrupted sampling in step 3 of embodiment 1 of the present invention;
FIG. 4 is a signal diagram of a fault detection process performed every quarter cycle at step 4 in accordance with example 1 of the present invention, with four windows;
FIG. 5 is a graph comparing the original data after step 4 of the present invention and the energy ratio data after FFT in example 1.
Detailed Description
The core idea of the invention is that the first time of judgment can be carried out by adopting a whole period, and the subsequent complete sampling period is a delay data window of the first complete sampling period, so that the sampling efficiency of the whole system can be improved, and the fault judgment can be well assisted.
Example 1:
1. current scaling: before signal processing, current scaling is performed. The circuit function is firstly converted by a high-precision current transformer, the secondary output of the transformer is connected with an operational amplifier I/V conversion circuit to improve the load capacity of the transformer, and the transformer works in a zero-load state. The converted voltage is sent to an AD sampling module to carry out discretization of an analog signal.
Figure BDA0002209514820000051
(OutPut represents the converted current; Input represents the current to be converted); the proportional transformation of the current can be calculated by the above formula according to the voltage division and the shunt action of the resistor, that is, the input of 110V can obtain a difference of 0.75 through the conversion of the circuit, the maximum voltage which can be sampled by the AD sampling of the straight surface is 3.3V, and the maximum difference is 3.3V-1.65V to 1.65V because of the alternating current and the intermediate point is 1.65V, and the maximum voltage which can be sampled is 242V. The voltage sampling one cycle before and after the conversion is shown in fig. 2.
2. Discretization of analog signals: the signal after the geometric reduction is subjected to discretization sampling, the original analog signal can be restored to a certain degree if the sampling times are more than 16 times within 20ms, AD sampling is carried out in a successive after all method mode in the invention, and the sampling points are 16 points, namely the sampling frequency is 800 hz.
The successive approximation conversion process is as follows: resetting each bit of the successive approximation register during initialization; when the conversion starts, the highest position 1 of the successive approximation register is firstly sent to a D/A converter, the analog quantity generated after the D/A conversion is sent to a comparator, called Vo, and is compared with the analog quantity Vi to be converted sent to the comparator, if Vo < Vi, the position 1 is reserved, otherwise, the position is cleared. Then, the second highest bit of the successive approximation register is set to be 1, new digital quantity in the register is sent to a D/A converter, the output Vo is compared with Vi, if Vo < Vi, the bit 1 is reserved, otherwise, the bit is cleared. This process is repeated until the lowest bit of the register is approached. And after the conversion is finished, the digital quantity in the successive approximation register is sent to a buffer register to obtain the output of the digital quantity. The successive approximation operation is performed under the control of a control circuit.
Storing the signals after dispersion as matrix storage, and storing in two dimensions, wherein the first dimension is sampling time; the second dimension is the signal after the time sampling, and the matrix is used as a 2 × 16 matrix as the operation data basis of the method invented later.
3. Sampling calculation: by collecting the discretized signals and storing the discretized signals in a corresponding memory, the calculation of true effective values and the judgment of faults are facilitated, and 1, the signals needing to be noticed in the embodiment need to be continuously sampled, namely, the signals cannot be interrupted after each period. 2. The memory in which the signal is stored must be large enough that the controller cannot allow unprocessed data to be overwritten by later acquired data before the data is fetched for processing.
The continuous sampling of the signals is ensured by adopting a DMA (direct memory access) technology, namely, a direct memory access technology, and the technology is characterized in that a CPU (central processing unit) of the controller does not need to pay attention to the storage of data, namely, the CPU can only be responsible for sampling calculation and fault judgment, so that the CPU and the storage task can be ensured to be carried out simultaneously, and the continuous sampling of the signals is also ensured.
4. Multiple data window fault detection: the module is the core part of the invention, and after continuous sampling of the signal is ensured, the module can be divided into a plurality of data windows for judgment calculation, in this example, fault detection is performed every quarter of a period, and the signal of the window is taken four times as shown in fig. 4.
Thus, four groups of signals with complete periods can be obtained, the four periodic signals are respectively subjected to frequency transformation, and the periodic function can be decomposed into constant direct current components and various higher harmonic components according to the concept of Fourier series, which can be expressed as:
Figure BDA0002209514820000071
wherein n is harmonic order, n is 0,1,2, … …; a isnAnd bnThe amplitudes of the cosine term and the sine term of each harmonic wave are respectively; omeganRefers to the frequency of the harmonic order;
from the principle of Fourier series, a can be obtainednAnd bnAre respectively as
Figure BDA0002209514820000072
Wherein T is sampling time; x (t) refers to the function being sampled; n denotes the number of harmonics; t is time; omeganRefers to the frequency of the subharmonic; a isnThe cosine term of each harmonic;
Figure BDA0002209514820000073
wherein T is sampling time; x (t) refers to the function being sampled; n denotes the number of harmonics; t is time; omeganRefers to the frequency of the subharmonic; bnSine terms of each harmonic;
this algorithm for calculating the whole sampling period is called full cycle Fourier algorithm. The full-wave Fourier algorithm has strong filtering capability, can filter direct-current components and all integer subharmonic components, and has good stability.
Through the analysis of the frequency domain, because a plurality of non-periodic components appear in the power grid after a short-circuit fault occurs, the energy proportion of the non-fundamental frequency components can be greatly increased in the frequency domain, the fault is judged according to the phenomenon, after the first data window is judged to have a fault, three data windows are pushed backwards in sequence, the interval between every two data windows is a quarter period, and therefore if the fault characteristics are judged by four periodic signals, the fault-free fault can be stably considered to occur, and in this way, under the condition of quadruple redundancy, the judgment time needs 35ms (20ms +5ms x 3). In the conventional failure determination method, 80ms (20ms × 4) is required, so that the determination time is increased by 45 ms. Such analogy makes it possible to time the occurrence of a fault to within a quarter of a cycle, i.e. 5ms, of the alternating current.
5. Issuing a fault signal or fault action: after the fault is diagnosed by the method, the fault can be quickly grasped in a faster speed, and the signals obtained in the previous step can be used in the sending of the warning, for example, the fault signals are divided into (primary fault, secondary fault and tertiary fault), when the fault signal is detected in the first data window, a tertiary warning is sent out to indicate that the fault possibly occurs, and when the fault signal is detected in the second data window, a secondary warning is sent out to indicate that the fault is basically determined. When the third data window also detects a fault signal, a first warning is sent out, the early warning mechanism can enable the action of the separating brake to be prepared in advance, and a quick fault signal report can be provided for a large intelligent electrical data platform to make a decision.

Claims (6)

1. A fault current rapid judging method based on multiple data windows is characterized by comprising the following steps:
(1) firstly, carrying out geometric reduction on current, and reducing the three-phase alternating current to a detectable standard, namely 0-300 mA;
(2) performing AD sampling of alternating current, namely discretization of an analog signal, and calculating the discretized signal;
(3) sampling and calculating the processed signals;
(4) carrying out fault detection in a multi-data window mode on the obtained sampling value;
(5) if the fault is judged to occur, short brake action is carried out or an alarm signal is sent out;
specifically, the step (4) is to perform fault detection once every quarter of a period, obtain four sets of complete periodic signals by using signals of four data windows, perform frequency transformation on the four periodic signals respectively, and decompose the periodic function into a constant direct current component and various higher harmonic components according to the concept of Fourier series, and the method is represented as follows:
Figure FDA0003288200850000011
wherein n is a harmonic order, and n is 0,1, 2.. 9.; a isnAnd bnThe amplitudes of the cosine term and the sine term of each harmonic wave are respectively; omeganRefers to the frequency of the harmonic order;
from the principle of Fourier series, a can be obtainednAnd bnAre respectively as
Figure FDA0003288200850000012
Wherein T is sampling time; x (t) refers to the function being sampled; n denotes the number of harmonics; t is time; omeganRefers to the frequency of the subharmonic; a isnThe cosine term of each harmonic;
Figure FDA0003288200850000013
wherein T is sampling time; x (t) refers to the function being sampled; n denotes the number of harmonics; t is time; omeganRefers to the frequency of the subharmonic; bnSine terms of each harmonic;
judging that the first data window has a fault if the ratio of the frequency energy to the total energy of the fundamental wave is larger than the predetermined threshold value, and then sequentially pushing back three data windows, wherein the interval between every two data windows is a quarter cycle, and if the signals of all four cycles judge the fault characteristics, judging that the fault without misjudgment occurs; otherwise, no power-off operation is performed.
2. The multiple data window-based fault current fast judging method as claimed in claim 1, wherein: the step (1) is specifically that firstly, conversion is carried out through a high-precision current transformer, the secondary output of the current transformer is connected with an operational amplifier I/V conversion circuit so as to improve the load capacity of the current transformer, the input end of the current transformer is connected with three-phase alternating current for fault detection, the current transformer works in a zero-load state, and the proportion conversion of current specifically adopts a formula
Figure FDA0003288200850000021
And calculating, wherein OutPut represents the converted current, and Input represents the current to be converted.
3. The multiple data window-based fault current fast judging method as claimed in claim 1, wherein: and (2) performing discretization sampling on the signals obtained in the step (1), specifically performing AD sampling by adopting a successive approximation method, wherein the sampling points are 16 points, namely the sampling frequency is 800hz, storing the obtained signals into a 2 x 16 matrix for storage, wherein the matrix is stored by two dimensions, the first dimension is the sampling time, and the second dimension is the signals sampled at the time.
4. The multiple data window-based fault current fast judging method as claimed in claim 1, wherein: and (3) specifically, performing matrix storage on the signals obtained in the step (2), using a matrix with 20 rows and 1 column for storage, sequentially storing from 1 row to 20 rows, performing shift algorithm storage on the newly sampled signals, namely removing the data of the coordinates (1, 0) to obtain a matrix, storing the data of the original coordinates (2, 0) into the positions of the coordinates (1, 0), and repeating the steps to achieve data continuity.
5. The multiple data window-based fault current fast judging method as claimed in claim 1, wherein: wherein, after the power-off operation is not executed, the two-layer protection is carried out, namely, the detection sensitivity is improved, and the response warning information is responded, wherein the detection sensitivity refers to the frequency of two fault detections.
6. The multiple data window-based fault current fast judging method as claimed in claim 1, wherein: where the agreed threshold is 0.8.
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