CN110860817A - Solder sheet and power device chip packaging method using same - Google Patents
Solder sheet and power device chip packaging method using same Download PDFInfo
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- CN110860817A CN110860817A CN201910934531.0A CN201910934531A CN110860817A CN 110860817 A CN110860817 A CN 110860817A CN 201910934531 A CN201910934531 A CN 201910934531A CN 110860817 A CN110860817 A CN 110860817A
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- chip
- power device
- solder sheet
- indium
- packaging
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/30—Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
- B23K35/3006—Ag as the principal constituent
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/008—Soldering within a furnace
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/20—Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/20—Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
- B23K1/206—Cleaning
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- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Die Bonding (AREA)
Abstract
The invention relates to a solder sheet and a power device chip packaging method welded by the solder sheet, belonging to the technical field of microelectronic device packaging. The solder sheet comprises 20-40 wt% of indium and 60-80 wt% of metal silver, and is an indium-silver-indium three-layer composite structure. The chip packaging method takes Ag-In as a reaction system, and the low-temperature chip welding principle is that In the connection process, low-melting-point metal indium forms a liquid phase and is mutually diffused or reacted with solid high-melting-point metal silver, isothermal solidification is carried out to form a high-melting-point intermetallic compound, and high-temperature-resistant connection is realized. The intermetallic compound close to the In side In the Ag-In system is AgIn2As the process soldering time is prolonged, the inter-diffusion reaction of Ag-In is intensified, and In4Ag9And Ag3In intermetallic compound In is gradually increased and occupies most4Ag9And Ag3The In can resist the high temperature of 660 ℃, thereby realizing the high-temperature service of the high-power device.
Description
Technical Field
The invention relates to the technical field of microelectronic device packaging, in particular to a solder sheet and a power device chip packaging method welded by the solder sheet, which are particularly suitable for low-temperature packaging of power devices applied in environments of high temperature, high frequency, high power and the like.
Background
In the field of electronic packaging, with the continuous improvement of the interconnection density and the power density of chips, the heat generated by the chips is higher and higher, and the requirement on high-temperature-resistant connecting materials is increased day by day. In addition, the service environment of electronic devices is more and more complex, and the importance of chips under high-temperature, high-frequency and high-power environmental conditions is increasingly highlighted, which puts higher requirements on the connecting materials of the chips, and the connecting materials are required to stably and reliably work for a long time under the high-temperature environment.
The novel high-power device chip can continuously work in a high-temperature environment of more than 200 ℃ and even can be in service at a high temperature of about 500 ℃. However, the maximum allowable service temperature of the device is not only dependent on the properties of the chip, but is also limited by the material of the chip connection. The novel high-power device not only requires that the connecting material has high enough high-temperature mechanical strength, but also has the characteristics of low thermal resistance, high heat dissipation efficiency and strong electric conduction capability, and in order to better match with the actual packaging process and avoid the damage of the device, the packaging temperature and pressure are not required to be too high, so that a method for packaging a high-power chip with good electric conduction and heat conduction performance and meeting requirements of low-temperature welding, quick bonding and high-temperature service is urgently needed to be developed.
At present, the high temperature resistant connection technology of the chip mainly comprises a high temperature solder connection method, a nano silver sintering method, a solid-liquid interdiffusion connection method, a transient liquid phase sintering method, a nano porous metal hot-pressing bonding method and the like. Wherein the solder connection and the nano silver sintering are widely applied. At present, the widely used high-temperature brazing filler metal system mainly comprises an Au-Sn base, a Zn-Al base, a Bi-Ag base and a Sn-Pb base, but the use temperature of the high-temperature brazing filler metal system is generally lower than 350 ℃, and the high-temperature service requirement of a novel high-power device cannot be met. The nano silver sintering is a method for realizing high-temperature-resistant connection at a lower temperature and a certain pressure based on the principle that the melting point of nano metal particles can be reduced, but the method has the defects of high difficulty in process realization and high production cost due to the fact that a larger pressure and a longer sintering time are required to be applied, and in addition, the sintered joint can generate an electromigration phenomenon, so that the nano silver sintering is not widely applied.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the chip packaging method has the advantages that the chip packaging of the power device with low-temperature connection/high-temperature service is realized through the welding material design, the packaging process scheme solidification and the assembly mode design, the production operation is convenient, and the batch production is easy.
The technical solution of the invention is as follows: a solder sheet comprises indium and silver, wherein the weight percentage of indium materials is 20-40%, the weight percentage of metal silver is 60% -80%, and the solder sheet is of an indium-silver-indium three-layer composite structure.
The thickness of the indium layer is the same.
The thickness of the indium layer is 10-20 microns.
The method for packaging the power device chip by adopting the welding flux sheet comprises the following steps:
(s1) baking and cleaning the power device shell to ensure the cleanliness of the shell;
(s2) stacking the solder sheet on the power device housing, stacking the chip on the solder sheet, and continuously applying a certain pressure so that the power device housing, the solder sheet, and the chip are assembled together; the contact surface of the chip and the solder sheet is provided with a metalized silver layer;
(s3) placing the fixed chip and the shell into a vacuum sintering furnace, filling nitrogen, vacuumizing, washing gas, rapidly heating to 120-130 ℃ at a first heating rate, preserving heat for a first preset time, heating to 150-200 ℃ at a second heating rate, preserving heat for 60-240 min, rapidly cooling after heat preservation, and taking out to finish chip sealing.
The second ramp rate is lower than the first ramp rate.
The pressure is 0.15-0.60 Mpa.
The first preset time is 10-15 min.
In the step (s1), the shell is baked for more than two hours by nitrogen at 150 ℃, and then the shell is cleaned for more than 240 seconds by argon plasma.
The step (s2) is realized by adopting an assembly tool, the assembly tool comprises a pressure block, a righting device, an upper template and a lower template, wherein:
the lower template is a graphite plate with a groove, and the power device shell is fixedly assembled;
the pressure block is a step-shaped cylindrical body and is fixed with the upper template through the centering device, and after the upper template and the lower template are assembled, the pressure block is applied to the chip to ensure that continuous pressure is provided for the chip in the packaging process;
the righting device is a graphite plate with a through hole and is used for positioning the pressure block in the circumferential direction;
the upper template is a graphite plate with a stepped hole, positions the pressure block in the circumferential direction and the axial direction, and is matched and positioned with the lower template through a positioning pin.
The pressure block is made of stainless steel.
Compared with the prior art, the invention has the beneficial effects that:
(1) the solder sheet provided by the invention is a solid metal solder sheet with an indium-silver-indium three-layer composite structure, and is convenient for process control and production assembly compared with the existing paste solder.
(2) The solder sheet indium material provided by the invention has the weight percentage of 20-40%, the melting point of the solder sheet is reduced, the sealing temperature of the chip is greatly reduced, the low-temperature (150-200 ℃) and rapid (60-240 min) welding of the chip and the shell substrate can be realized, and the main component of the welding area of the chip after welding is In4Ag9And Ag3In and the melting point is high, the obtained power device chip has the characteristic of high temperature resistance (500-660 ℃), and the high-temperature service capacity of the high-power device is improved.
(3) According to the welding method, the welding pressure is 0.15-0.60 Mpa, the tool is easy to realize, and damage to the chip is reduced.
(4) The invention further provides a chip assembly tool, the power device chip is rapidly sealed (for 60-240 min) under the condition of small pressure of 0.15-0.60 Mpa by applying a solid pressure block counterweight mode, and the production efficiency and the process realizability are greatly improved.
(5) By adopting the rapid low-temperature chip welding method provided by the invention, the welding area of the welded chip is firmly combined, and the shear strength of the chip is up to more than 24.6 Mpa.
(6) The rapid low-temperature chip welding method provided by the invention realizes low-temperature welding high-temperature service, breaks through the technical bottleneck that the welding temperature of the traditional welding materials such as Au-Sn, Sn-Pb and the like is high and the use temperature is low, provides a new solution for the application of power devices in the environments of high temperature, high frequency, high power and the like, and has great significance for solving the low-temperature high-strength sealing in the field of microelectronic devices.
Drawings
FIG. 1 is a structural component of a bonding pad according to an embodiment of the present invention;
FIG. 2 is a schematic view of a chip and housing assembly according to the chip bonding method of the embodiment of the invention;
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and examples.
The invention provides a novel high-power device chip packaging method, which selects Ag-In series materials to realize low-temperature welding and high-temperature service chip welding. The basic principle is as follows: according to the method, Ag-In is used as a reaction system for chip welding, and the low-temperature chip welding principle is that In the connecting process, low-melting-point metal indium forms a liquid phase and is mutually diffused or reacted with solid high-melting-point metal silver, isothermal solidification is carried out to form a high-melting-point intermetallic compound, and high-temperature-resistant connection is realized. The intermetallic compound close to the In side In the Ag-In system is AgIn2As the process soldering time is prolonged, the inter-diffusion reaction of Ag-In is intensified, and In4Ag9And Ag3In intermetallic compound In is gradually increased and occupies most4Ag9And Ag3The In can resist the high temperature of 660 ℃, thereby realizing the high-temperature service of the high-power device.
In the packaging method, the solder sheet used by the invention adopts Ag-In materials, including indium and silver, wherein the weight percentage of the indium material is 20-40%, and the weight percentage of the metal silver is 60-80%. As shown In fig. 1, the solder sheet is a three-layer indium-silver-indium (In-Ag-In) preformed composite structure. The thickness of the indium layer is the same. The thickness of the indium layers on the two sides is 10-20 microns. The silver layer is 30-100 microns.
The chip welding and sealing process in the method for packaging the power device chip welded by the solder sheet comprises the steps of shell treatment, chip assembly and process route setting. The method specifically comprises the following steps:
(s1), shell processing: baking and cleaning the shell of the power device to ensure the cleanliness of the shell; the shell can be baked for more than two hours by nitrogen at 150 ℃, and then the shell is cleaned for more than 240 seconds by argon plasma;
(s2), chip assembly: stacking the solder sheet 7 on the power device case 5, stacking the chip 6 on the solder sheet 7, and continuously applying a certain pressure so that the power device case 5, the solder sheet 7, and the chip 6 are assembled together; the contact surface of the chip 6 and the solder sheet 7 is provided with a metalized silver layer;
as shown in FIG. 2, the step is realized by adopting an assembly tool, which is convenient for mass production. The assembly fixture comprises a pressure block, a righting device, an upper template and a lower template, wherein:
the lower template is a graphite plate with a groove, and the power device shell is fixedly assembled;
the pressure block 1 is a step-shaped cylindrical body and is fixed with the upper template through a centering device, and after the upper template and the lower template are assembled, the pressure block is applied to the chip to ensure that continuous pressure is provided for the chip in the packaging process; the pressure block is made of stainless steel.
The righting device 2 is a graphite plate with a through hole, and positions the pressure block in the circumferential direction;
the upper template 3 is a graphite plate with a stepped hole, positions the pressure block in the circumferential direction and the axial direction, and is matched and positioned with the lower template through a positioning pin.
(s3), Process route setup: and (3) placing the fixed chip and the shell into a vacuum sintering furnace, filling nitrogen, vacuumizing, washing gas, quickly heating to 120-130 ℃ at a first heating rate, preserving heat for a first preset time, heating to 150-200 ℃ at a second heating rate, preserving heat for 60-240 min, quickly cooling after heat preservation, taking out, and completing chip sealing. The second heating rate is lower than the first heating rate to reduce the temperature gradient and realize uniform heating. Generally, the first temperature rise rate is 60-80 ℃/min, and the second temperature rise rate is 30-40 ℃/min. The pressure is 0.15-0.60 Mpa. The first preset time is 10-15 min.
In conclusion, due to the adoption of the solder sheet provided by the invention, the chip and the shell substrate are packaged rapidly (60-240 min) at low temperature (150-200 ℃) to obtain a high-temperature-resistant (500-660 ℃) power device.
The present invention is described below with reference to specific embodiments, and the preferred embodiments in the following description are only examples, and other modifications may be made by those skilled in the art.
Example 1
(s1), baking the shell with nitrogen at the temperature of 150 ℃/2h, and then cleaning the shell with argon plasma for 240 s;
(s2), placing the device shell in the lower template of the assembly tool, stacking the soldering lug on the shell substrate, stacking the chip on the soldering lug, and installing the righting device with the pressure block placed and the upper template on the lower template through the positioning pin to complete the chip assembly. The back of the chip is metallized into a silver layer with the thickness of 3 microns; the thickness of indium on two sides of the selected solder sheet (7) is 10 microns on average, and the thickness of silver in the middle is 85 microns. The indium material accounts for 20% by weight, and the metal silver accounts for 80% by weight.
(s3), placing the fixed chip and the shell into a vacuum sintering furnace, filling nitrogen, vacuumizing, washing gas for 2 times, rapidly heating to 120 ℃ at a speed of 80 ℃/min under the condition of nitrogen, preserving heat for 10min, vacuumizing, heating to 150 ℃ at a speed of 35 ℃ under a vacuum degree of less than 1mbar, preserving heat for 60min, continuously applying a pressure of 0.15MPa on the chip in the whole process, and after the heat preservation is finished, blowing nitrogen for cooling, and taking out to realize chip sealing.
The average shear strength of the chip of the embodiment can reach 24.6MPa by carrying out a shear test.
Example 2
(s1), baking the shell with nitrogen at the temperature of 150 ℃/2h, and then cleaning the shell with argon plasma for 240 s;
(s2), placing the device shell in the lower template of the assembly tool, stacking the soldering lug on the shell substrate, stacking the chip on the soldering lug, and installing the righting device with the pressure block placed and the upper template on the lower template through the positioning pin to complete the chip assembly. The back of the chip is metallized into a silver layer with the thickness of 3 microns; the thickness of indium on two sides of the selected solder sheet (7) is averagely 20 microns, and the thickness of silver in the middle is 65 microns. The indium material accounts for 40% by weight, and the metal silver accounts for 60% by weight.
(s3), placing the fixed chip and the shell into a vacuum sintering furnace, filling nitrogen, vacuumizing, washing gas for 2 times, rapidly heating to 120 ℃ at the speed of 60 ℃/min under the condition of nitrogen, preserving heat for 15min, vacuumizing, heating to 200 ℃ at the speed of 40 ℃ under the condition of vacuum degree less than 1mbar, preserving heat for 180min, continuously applying pressure of 0.50Mpa on the chip in the whole process, and after the heat preservation is finished, blowing nitrogen for cooling, and taking out to realize chip sealing.
The average shear strength of the chip of the embodiment can reach 26.2MPa by carrying out a shear test.
Example 3
(s1), baking the shell with nitrogen at the temperature of 150 ℃/2h, and then cleaning the shell with argon plasma for 240 s;
(s2), placing the device shell in the lower template of the assembly tool, stacking the soldering lug on the shell substrate, stacking the chip on the soldering lug, and installing the righting device with the pressure block placed and the upper template on the lower template through the positioning pin to complete the chip assembly. The back of the chip is metallized into a silver layer with the thickness of 3 microns; the thickness of indium on two sides of the selected solder sheet (7) is averagely 15 microns, and the thickness of silver in the middle is 75 microns. The indium material accounts for 30 percent by weight, and the metal silver accounts for 70 percent by weight.
(s3), placing the fixed chip and the shell into a vacuum sintering furnace, filling nitrogen, vacuumizing, washing gas for 2 times, rapidly heating to 120 ℃ at a speed of 70 ℃/min under the condition of nitrogen, preserving heat for 12min, vacuumizing, heating to 180 ℃ at a speed of 30 ℃ with a vacuum degree of less than 1mbar, preserving heat for 240min, continuously applying a pressure of 0.60MPa on the chip in the whole process, and after the heat preservation is finished, blowing nitrogen for cooling, and taking out to realize chip sealing.
The average shearing strength of the chip can reach 32.4MPa by shearing test.
Although the present invention has been described with reference to the preferred embodiments, it is not intended to limit the present invention, and those skilled in the art can make variations and modifications of the present invention without departing from the spirit and scope of the present invention by using the methods and technical contents disclosed above.
Claims (10)
1. The solder sheet is characterized by comprising 20-40 wt% of indium and 60-80 wt% of metal silver, and the solder sheet is of an indium-silver-indium three-layer composite structure.
2. A solder sheet according to claim 1 wherein the indium layers are of the same thickness.
3. A solder sheet according to claim 1, wherein the indium layer has a thickness of 10 to 20 μm.
4. A method for packaging a power device chip by soldering using the solder sheet as set forth in claim 1, comprising the steps of:
(s1) baking and cleaning the power device shell to ensure the cleanliness of the shell;
(s2) stacking the solder sheet (7) on the power device case (5), stacking the chip (6) on the solder sheet (7), and continuously applying a certain pressure so that the power device case (5), the solder sheet (7), and the chip (6) are assembled together; the contact surface of the chip (6) and the solder sheet (7) is provided with a metalized silver layer;
(s3) placing the fixed chip and the shell into a vacuum sintering furnace, filling nitrogen, vacuumizing, washing gas, rapidly heating to 120-130 ℃ at a first heating rate, preserving heat for a first preset time, heating to 150-200 ℃ at a second heating rate, preserving heat for 60-240 min, rapidly cooling after heat preservation, and taking out to finish chip sealing.
5. The power device chip packaging method according to claim 4, wherein the second temperature rise rate is lower than the first temperature rise rate.
6. The method for packaging the power device chip as claimed in claim 4, wherein the pressure is 0.15MPa to 0.60 MPa.
7. The method for packaging a power device chip soldered with solder bumps as claimed in claim 4, wherein the first predetermined time is 10-15 min.
8. The method for packaging a power device chip soldered with solder pieces as set forth in claim 4, wherein the step (1) comprises baking the housing with nitrogen at 150 ℃ for two or more hours, and then cleaning the housing with argon plasma for 240s or more.
9. The method for packaging a power device chip welded by adopting the solder sheet as claimed in claim 1, wherein the step (2) is realized by adopting an assembly tool, the assembly tool comprises a pressure block, a centering device, an upper template and a lower template, wherein:
the lower template is a graphite plate with a groove, and the power device shell is fixedly assembled;
the pressure block is a step-shaped cylindrical body and is fixed with the upper template through the centering device, and after the upper template and the lower template are assembled, the pressure block is applied to the chip to ensure that continuous pressure is provided for the chip in the packaging process;
the righting device is a graphite plate with a through hole and is used for positioning the pressure block in the circumferential direction;
the upper template is a graphite plate with a stepped hole, positions the pressure block in the circumferential direction and the axial direction, and is matched and positioned with the lower template through a positioning pin.
10. The method of packaging a power device chip by solder bump bonding according to claim 1, wherein the pressure block is made of stainless steel.
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Cited By (2)
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CN112453752A (en) * | 2020-11-30 | 2021-03-09 | 云南锡业集团(控股)有限责任公司研发中心 | Lead-free low-temperature tin-based alloy soldering lug |
CN113070602A (en) * | 2021-04-12 | 2021-07-06 | 常熟理工学院 | In-Ag composite solder with high mechanical property and preparation method thereof |
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CN113070602A (en) * | 2021-04-12 | 2021-07-06 | 常熟理工学院 | In-Ag composite solder with high mechanical property and preparation method thereof |
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