CN110854111A - Packaging assembly, electronic device and packaging method - Google Patents

Packaging assembly, electronic device and packaging method Download PDF

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Publication number
CN110854111A
CN110854111A CN201911167351.0A CN201911167351A CN110854111A CN 110854111 A CN110854111 A CN 110854111A CN 201911167351 A CN201911167351 A CN 201911167351A CN 110854111 A CN110854111 A CN 110854111A
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China
Prior art keywords
component
insulating layer
layer
substrate
packaging
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Pending
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CN201911167351.0A
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Chinese (zh)
Inventor
邱煌山
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Vivo Mobile Communication Co Ltd
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Vivo Mobile Communication Co Ltd
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Application filed by Vivo Mobile Communication Co Ltd filed Critical Vivo Mobile Communication Co Ltd
Priority to CN201911167351.0A priority Critical patent/CN110854111A/en
Publication of CN110854111A publication Critical patent/CN110854111A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

The invention discloses a packaging assembly, electronic equipment and a packaging method, wherein the packaging assembly comprises a substrate (100), a component (200), a packaging layer (300) and an insulating layer (400), the component (200) is provided with a welding foot (500), the component (200) is connected with the substrate (100) through the welding foot (500), the packaging layer (300) wraps the component (200), the insulating layer (400) is arranged around the welding foot (500), and the insulating layer (400) is positioned between the substrate (100) and the packaging layer (300). The insulating layer can realize the insulation of leg reliably, even there is the cavity on the encapsulated layer, the leg melts the back, because the limiting action of insulating layer, this leg can't with the leg or the surface contact of other components and parts to prevent the appearance of short circuit phenomenon, consequently this encapsulation subassembly can promote the reliability of components and parts.

Description

Packaging assembly, electronic device and packaging method
Technical Field
The present invention relates to the field of electronic structures, and particularly to a package assembly, an electronic device, and a packaging method.
Background
As the functions of electronic devices are expanded, more and more components are included in the electronic devices, for example, a plurality of chips need to be disposed on a circuit board to implement the predetermined functions of the electronic devices.
In order to improve the reliability of the electronic device, when the electronic device is manufactured, the components included in the electronic device need to be packaged, so that the problems that the components are damaged due to the influence of the external environment or other parts are prevented. Generally, these components can be soldered on the substrate through the solder tails, and then the components can be wrapped by the packaging layer, so as to realize the packaging of the components.
However, as the number of components is increased, the distance between the components is decreased, and when the packaging operation is performed, a void is easily formed in the packaging layer, the solder fillet is melted in the subsequent process, and the melted solder fillet is short-circuited with the solder fillet or the surface of another component through the void, so that the reliability of the component is reduced.
Disclosure of Invention
The invention discloses a packaging assembly, electronic equipment and a packaging method, and aims to solve the problem of low reliability of components.
In order to solve the problems, the invention adopts the following technical scheme:
the utility model provides a packaging assembly, includes base plate, components and parts, encapsulation layer and insulating layer, components and parts are equipped with the leg, components and parts pass through the leg with the base plate links to each other, the encapsulation layer parcel components and parts, be equipped with around the leg the insulating layer, just the insulating layer is located the base plate with between the encapsulation layer.
An electronic device comprises the packaging assembly.
A packaging method is applied to the packaging assembly, and comprises the following steps:
preparing an insulating layer around a solder leg of the component;
and attaching a structure formed by the component, the welding feet and the insulating layer on a substrate, wherein the insulating layer is positioned on one side of the substrate facing the component.
The technical scheme adopted by the invention can achieve the following beneficial effects:
in the packaging assembly disclosed by the invention, the insulating layer is arranged around the welding feet of the component and is positioned between the substrate and the packaging layer, the insulating layer can reliably realize the insulation of the welding feet, and even if the packaging layer has a cavity, the welding feet cannot be contacted with the welding feet or the surfaces of other components due to the limiting action of the insulating layer after the welding feet are molten, so that the short circuit phenomenon is prevented, and the reliability of the component can be improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
FIG. 1 is a cross-sectional view of a package assembly disclosed in an embodiment of the present invention;
FIG. 2 is a cross-sectional view of a package assembly disclosed in another embodiment of the present invention;
fig. 3 to fig. 7 are schematic diagrams of structures corresponding to different steps of the packaging method disclosed in the embodiment of the present invention.
Description of reference numerals:
100-substrate, 200-component, 300-packaging layer, 400-insulating layer, 500-welding leg, 600-carrier plate and 700-adhesive film.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the specific embodiments of the present invention and the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The technical solutions disclosed in the embodiments of the present invention are described in detail below with reference to the accompanying drawings.
As shown in fig. 1, the embodiment of the invention discloses a package assembly, which may specifically include a substrate 100, a component 200, a package layer 300, and an insulating layer 400.
The substrate 100 may serve as a mounting base for components included in the package assembly, and the substrate 100 may be provided with a connection line inside, so that the component 200 may be electrically connected to other components. The substrate 100 may be a package substrate, or may be a structure such as a circuit board or a glass substrate, which is not limited in this embodiment of the present invention.
The component 200 is provided with a solder tail 500, and the component 200 can be connected to the substrate 100 through the solder tail 500, thereby being electrically connected to the substrate 100. Here, the component 200 may include a chip or other component, the number of the components 200 may be at least one, that is, one or a plurality of the components 200 may be provided, and in order to improve the performance of the package, it is preferable that the number of the components 200 is a plurality, and the plurality of the components 200 may be provided on the substrate 100 at intervals. At least one solder tail 500 may be provided for each component 200, so that the component 200 is connected to the substrate 100 via these solder tails 500. Alternatively, the fillet 500 may be a solder or a pad, and of course, other structures with conductivity and fixing function may also be adopted, which is not limited in the embodiment of the present invention.
The packaging layer 300 wraps the component 200, the packaging layer 300 mainly serves to protect the component 200 and prevent the component 200 from being damaged due to the influence of external environment or other parts, and optionally, the packaging layer 300 may be a resin layer in order to optimize the packaging effect of the packaging layer 300.
Insulating layer 400 is disposed around fillet 500, that is, insulating layer 400 may be in contact with at least a portion of the surface of fillet 500 or the entire surface of fillet 500, as long as insulation between fillet 500 and the surface of other fillet 500 or component 200 is achieved. The insulating layer 400 is located between the substrate 100 and the encapsulation layer 300, and specifically, the edge of the insulating layer 400 may be aligned with the edges of the encapsulation layer 300 and the substrate 100, so that the encapsulation layer 300 and the substrate 100 are separated by the insulating layer 400, and the coverage area of the insulating layer 400 is larger, thereby realizing more reliable insulation.
The insulating layer 400 can reliably realize the insulation of the solder tail 500, and even if the packaging layer 300 has a cavity, the solder tail 500 is melted, and the solder tail 500 cannot be in contact with the solder tail 500 or the surface of other components 200 due to the limiting effect of the insulating layer 400, so that the occurrence of a short circuit phenomenon is prevented, and the reliability of the components 200 can be improved by the packaging assembly.
In another embodiment, as shown in fig. 2, the insulating layer 400 may be provided in plurality, and a plurality of insulating layers 400 are stacked in sequence, and in each insulating layer 400, at least two insulating layers 400 have different thermal expansion coefficients. Since the thermal expansion coefficients of the substrate 100 and the encapsulation layer 300 are usually different, when the layered structure formed by the substrate 100, the insulating layer 400 and the encapsulation layer 300 is affected by temperature, the thermal expansion amounts of the three are different, and defects such as interface delamination and solder fillet 500 cracking are likely to occur in the substrate 100, the insulating layer 400 and the encapsulation layer 300. The plurality of insulating layers 400 are provided, and when the thermal expansion coefficients of at least two insulating layers 400 are different, the thermal expansion coefficients of the insulating layers 400 can be properly adjusted, so that the difference among the thermal expansion amounts of the substrate 100, the insulating layers 400 and the packaging layer 300 is reduced as much as possible, and defects such as interface delamination and solder fillet 500 cracking of the substrate 100, the insulating layers 400 and the packaging layer 300 are prevented.
In order to enhance the above technical effects, in an alternative embodiment, the thermal expansion coefficient of each insulating layer 400 is between the thermal expansion coefficient of the package layer 300 and the thermal expansion coefficient of the substrate 100, so that there is a certain transition effect between the thermal expansion coefficients of the substrate 100, each insulating layer 400 and the package layer 300, and thus the difference between the thermal expansion amounts of the substrate 100, the insulating layer 400 and the package layer 300 is smaller, thereby improving the reliability of the package assembly. In a specific embodiment, the magnitude relationship of the thermal expansion coefficients of the insulating layers 400 in the stacking direction of the insulating layers 400 can be designed alternately, as long as the defects of interfacial delamination, solder fillet 500 cracking, and the like, which occur in the package assembly, can be improved when the temperature changes. Taking the insulating layer 400 as three layers as an example, the thermal expansion coefficient of the insulating layer 400 near the substrate 100 may be greater than that of the insulating layer 400 in the middle, and the thermal expansion coefficient of the insulating layer 400 in the middle may be smaller than that of the insulating layer 400 near the encapsulation layer 300; alternatively, the thermal expansion coefficient of the insulating layer 400 near the substrate 100 may be smaller than that of the intermediate insulating layer 400, and the thermal expansion coefficient of the intermediate insulating layer 400 may be larger than that of the insulating layer 400 near the encapsulation layer 300.
In further embodiments, the thermal expansion coefficient of each insulating layer 400 may be modified for better transition effects. Specifically, the method comprises the following steps: the thermal expansion coefficient of the encapsulation layer 300 may be greater than that of the substrate 100, and at this time, in a direction in which the encapsulation layer 300 points to the substrate 100, the thermal expansion coefficient of each insulation layer 400 is gradually decreased, so that the thermal expansion coefficients of the encapsulation layer 300, each insulation layer 400, and the substrate 100 are gradually decreased; alternatively, the thermal expansion coefficient of the encapsulation layer 300 may be smaller than that of the substrate 100, and the thermal expansion coefficient of each insulation layer 400 is gradually increased in a direction in which the encapsulation layer 300 points to the substrate 100, so that the thermal expansion coefficients of the encapsulation layer 300, each insulation layer 400, and the substrate 100 are gradually increased.
The thermal expansion coefficient of each insulating layer 400 can be adjusted by adjusting the molecular chain length, the material ratio, and the like of the insulating layer 400.
As mentioned above, the number of the components 200 may be set to be at least one, and at this time, each component 200 is provided with at least one solder tail 500, and in order to achieve a better insulation effect, the insulating layer 400 is provided around each solder tail 500 of each component 200, so that all the solder tails 500 are insulated by the insulating layer 400, thereby better preventing short circuit between the solder tails 500 or between the solder tails 500 and the surfaces of other components 200.
The specific structural form of the insulating layer 400 may be flexibly selected as long as insulation can be achieved. In a further embodiment, the insulating layer 400 may be an insulating adhesive layer, which not only can realize insulation, but also has certain viscosity, so that the encapsulation layer 300 and the substrate 100 can be bonded by the insulating layer 400, and thus the encapsulation layer 300 and the substrate 100 are less likely to be separated from each other, thereby improving the structural strength of the package assembly.
Based on the package assembly of any embodiment, an embodiment of the invention further discloses an electronic device, which includes the package assembly of any embodiment. The electronic device disclosed by the embodiment of the invention can be a smart phone, a tablet computer, an electronic book reader or a wearable device. Of course, the electronic device may also be other devices, and the embodiment of the present invention is not limited thereto.
The embodiment of the invention also discloses a packaging method, which can be applied to the packaging assembly in any embodiment, and specifically comprises the following steps:
s100, preparing an insulating layer 400 around the solder tail 500 of the component 200.
S200, a structure formed by the component 200, the welding foot 500 and the insulating layer 400 is attached to the substrate 100, and the insulating layer 400 is positioned on one side, facing the component 200, of the substrate 100. The package layer 300 of the package assembly may be attached to the substrate 100 together with the component 200, the solder fillet 500, and the insulating layer 400 is located between the substrate 100 and the package layer 300.
As mentioned above, the insulating layer 400 can insulate the solder fillet 500, and even if the package layer 300 has a cavity, the solder fillet 500 cannot contact with the solder fillet 500 or the surface of the other component 200 due to the restriction of the insulating layer 400 after the solder fillet 500 is melted, so as to prevent the occurrence of short circuit, and thus the package assembly can improve the reliability of the component 200.
In step S100, the preparation of the insulating layer 400 around the solder tail 500 of the component 200 may be performed before the preparation of the encapsulating layer 300, or may be performed after the preparation of the encapsulating layer 300. If the insulating layer 400 is prepared first and then the encapsulation layer 300 is prepared, then the solder tails 500 are prepared on the substrate 100, and then the insulating layer 400 is prepared on the substrate 100, which is a high requirement for the process, so in order to reduce the process requirement of the encapsulation method, before the preparing the insulating layer 400 around the solder tails 500 of the component 200, the method further includes:
s101, preparing a packaging layer 300 around the component 200;
s102, preparing solder fillets 500 on the surface of the component 200.
Through the steps S101 and S102, the structure in which the package layer 300 wraps the component 200 and the component 200 is provided with the solder tail 500 may be formed, and then the insulating layer 400 may be prepared around the solder tail 500 of the component 200.
After such setting, the step S200 specifically includes: the structure formed by the encapsulation layer 300, the component 200, the solder tails 500 and the insulating layer 400 is attached to the substrate 100, with the insulating layer 400 located between the substrate 100 and the encapsulation layer 300.
That is, the connection between the fillet 500 and the substrate 100 may be achieved by a mounting process, so that the structure formed by the encapsulation layer 300, the component 200, the fillet 500, and the insulation layer 400 is connected to the substrate 100, thereby completing the preparation of the package assembly.
In an optional embodiment, the step S101 may specifically include:
s111, preparing an adhesive film 700 on the carrier plate 600;
as shown in fig. 3, the carrier 600 may be a metal carrier, which mainly plays a role of carrying, and the adhesive film 700 has a viscosity, so that the adhesive film 700 can be adhered to the carrier 600.
S112, preparing the component 200 on the adhesive film 700;
as shown in fig. 3, the adhesive film 700 may be adhered to the component 200, so as to connect the component 200 and the carrier 600.
S113, preparing a packaging layer 300 on the adhesive film 700, wherein the packaging layer 300 wraps the component 200;
as shown in fig. 4, the encapsulating layer 300 may also be bonded to the adhesive film 700, such that the encapsulating layer 300 is connected to the carrier 600, and the encapsulating layer 300 wraps the component 200, thereby protecting the component 200.
And S114, removing the carrier plate 600 and the adhesive film 700.
As shown in fig. 5, after the carrier 600 and the adhesive film 700 are removed, a part of the surface of the component 200 is exposed. Thereafter, as shown in fig. 6, step S102 of preparing a solder tail 500 on the exposed surface of the component 200 so as to prepare the insulating layer 400 around the solder tail 500 may be performed, thereby forming the structure shown in fig. 7. Finally, the structure shown in fig. 7 is attached to the substrate 100 to form the structure shown in fig. 1.
In order to simplify the manufacturing process of the fillet 500, the step S102 specifically includes: the solder fillets 500 are prepared on the surface of the component 200 by a printing process. That is, the area where the solder fillet 500 is not to be prepared can be masked by the printing screen, the area where the solder fillet 500 is to be prepared is exposed, and then the solder fillet 500 is prepared in the area. Such a process is easier to implement and the quality of the resulting solder tail 500 is better.
Similarly, the above-mentioned preparing the insulating layer 400 around the solder tail 500 of the component 200 may specifically be: the insulating layer 400 is prepared around the solder tails 500 of the components 200 using a printing process. That is, an area where the insulating layer 400 is not required to be prepared may be masked by the printing screen, an area where the insulating layer 400 is required to be prepared is exposed, and then the insulating layer 400 is prepared in the area. When the number of the insulating layers 400 is plural, the plural insulating layers 400 may be prepared by a multi-printing process.
In a further embodiment, before the step S103, the method further includes:
the structure formed by the encapsulation layer 300, the component 200, the solder tails 500 and the insulating layer 400 is polished.
This polishing operation can better ensure that the solder tail 500 is exposed, thereby preventing the problem of cold solder joint and making the electrical connection between the solder tail 500 and the substrate 100 more reliable.
After the structure formed by the encapsulation layer 300, the component 200, the solder fillet 500, and the insulating layer 400 is mounted on the substrate 100, the insulating layer 400 may be cured and passed through a reflow oven, thereby improving the connection strength between the encapsulation layer 300, the insulating layer 400, and the substrate 100.
Further, after the structure formed by the encapsulation layer 300, the component 200, the solder fillet 500 and the insulation layer 400 is mounted on the substrate 100, a cutting operation may be performed to cut the mounted structure into a plurality of small units.
In the above embodiments of the present invention, the difference between the embodiments is mainly described, and different optimization features between the embodiments can be combined to form a better embodiment as long as they are not contradictory, and further description is omitted here in view of brevity of the text.
The above description is only an example of the present invention, and is not intended to limit the present invention. Various modifications and alterations to this invention will become apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.

Claims (10)

1. The utility model provides a packaging assembly, its characterized in that includes base plate (100), components and parts (200), encapsulation layer (300) and insulating layer (400), components and parts (200) are equipped with leg (500), components and parts (200) pass through leg (500) with base plate (100) link to each other, encapsulation layer (300) parcel components and parts (200), be equipped with around leg (500) insulating layer (400), just insulating layer (400) are located base plate (100) with between the encapsulation layer (300).
2. The package assembly of claim 1, wherein the insulating layer (400) is provided in plurality, a plurality of the insulating layers (400) are stacked in sequence, and at least two of the insulating layers (400) in each of the insulating layers (400) have different thermal expansion coefficients.
3. The package assembly of claim 2, wherein the coefficient of thermal expansion of each of the insulating layers (400) is between the coefficient of thermal expansion of the package layer (300) and the coefficient of thermal expansion of the substrate (100).
4. The package assembly of claim 3, wherein the coefficient of thermal expansion of the encapsulation layer (300) is greater than the coefficient of thermal expansion of the substrate (100), and the coefficient of thermal expansion of each of the insulating layers (400) decreases in a direction in which the encapsulation layer (300) points toward the substrate (100); alternatively, the first and second electrodes may be,
the thermal expansion coefficient of the packaging layer (300) is smaller than that of the substrate (100), and the thermal expansion coefficient of each insulating layer (400) is gradually increased in the direction in which the packaging layer (300) points to the substrate (100).
5. The package assembly of claim 1, wherein the number of components (200) is at least one, each component (200) is provided with at least one solder tail (500), and the insulating layer (400) is provided around each solder tail (500) of each component (200).
6. An electronic device comprising the package assembly of any one of claims 1-5.
7. A packaging method applied to the package assembly of any one of claims 1 to 5, wherein the method comprises:
preparing an insulating layer (400) around a solder tail (500) of the component (200);
and attaching a structure formed by the component (200), the welding feet (500) and the insulating layer (400) to a substrate (100), wherein the insulating layer (400) is positioned on one side of the substrate (100) facing the component (200).
8. The method of packaging according to claim 7, wherein the step of preparing the insulating layer (400) around the solder tail (500) of the component (200) further comprises:
preparing an encapsulation layer (300) around the component (200);
preparing a solder leg (500) on the surface of the component (200);
the structure formed by the component (200), the welding feet (500) and the insulating layer (400) is attached to a substrate (100), and the structure is characterized in that:
and attaching a structure formed by the packaging layer (300), the component (200), the solder legs (500) and the insulating layer (400) to the substrate (100), wherein the insulating layer (400) is positioned between the substrate (100) and the packaging layer (300).
9. The encapsulation method according to claim 8, wherein the preparing the encapsulation layer (300) around the component (200) specifically comprises:
preparing an adhesive film (700) on a carrier plate (600);
preparing a component (200) on the adhesive film (700);
preparing an encapsulation layer (300) on the bonding film (700), wherein the encapsulation layer (300) wraps the component (200);
and removing the carrier plate (600) and the adhesive film (700).
10. The packaging method according to claim 8, wherein the preparing of the solder tails (500) on the surface of the component (200) is specifically: preparing solder feet (500) on the surface of the component (200) by adopting a printing process;
the preparation of the insulating layer (400) around the solder tail (500) of the component (200) is specifically as follows: an insulating layer (400) is prepared around the solder tails (500) of the components (200) using a printing process.
CN201911167351.0A 2019-11-25 2019-11-25 Packaging assembly, electronic device and packaging method Pending CN110854111A (en)

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Application Number Priority Date Filing Date Title
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