CN110828486B - Display panel manufacturing method and display panel - Google Patents
Display panel manufacturing method and display panel Download PDFInfo
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- CN110828486B CN110828486B CN201911135610.1A CN201911135610A CN110828486B CN 110828486 B CN110828486 B CN 110828486B CN 201911135610 A CN201911135610 A CN 201911135610A CN 110828486 B CN110828486 B CN 110828486B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1054—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
Abstract
The invention discloses a manufacturing method of a display panel and the display panel. The method comprises the following steps: providing a substrate; forming a channel on a substrate, the channel including a first channel and a second channel; causing the first channel and the second channel to contain hydrogen ions of different concentrations; forming an array device based on the channel, the array device including a driving transistor formed based on the first channel and a switching transistor formed based on the second channel; a light emitting device layer is formed on a side of the array device remote from the substrate. The first channel and the second channel contain hydrogen ions with different concentrations, so that subthreshold swing ranges of the driving transistor corresponding to the first channel and the switching transistor corresponding to the second channel are different, the driving transistor can meet gray scale control, and meanwhile, the switching transistor can have higher switching speed.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a manufacturing method of a display panel and the display panel.
Background
In the prior art, the manufacturing processes of the driving transistor and the switching transistor in the display panel are the same, so that the subthreshold swing amplitude of the driving transistor and the subthreshold swing amplitude of the switching transistor are equal, and the driving transistor is not beneficial to realizing fast turn-on of the switching transistor when controlling gray scale.
Disclosure of Invention
The invention provides a manufacturing method of a display panel and the display panel, which are used for realizing that a switching transistor and a driving transistor respectively meet different subthreshold swing requirements.
In a first aspect, an embodiment of the present invention provides a method for manufacturing a display panel, including:
providing a substrate;
forming a channel on the substrate, the channel including a first channel and a second channel;
causing the first channel and the second channel to contain hydrogen ions of different concentrations;
forming an array device based on the channel, the array device including a driving transistor formed based on the first channel and a switching transistor formed based on the second channel;
a light emitting device layer is formed on a side of the array device remote from the substrate.
Optionally, causing the first channel and the second channel to contain hydrogen ions of different concentrations includes:
a first mask plate is arranged on one side, far away from the substrate, of the channel, an opening area of the first mask plate corresponds to the first channel, and a non-opening area of the first mask plate corresponds to the second channel;
implanting hydrogen ions at a first dose and a first doping energy into the first channel;
removing the first mask; a second mask plate is arranged on one side, far away from the substrate, of the channel, an opening area of the second mask plate corresponds to the second channel, and a non-opening area of the second mask plate corresponds to the first channel;
the second channel is implanted with hydrogen ions at a second dose and a second doping energy such that the hydrogen ion concentration of the second channel is different from the first channel.
Optionally, the first channel is a channel of a driving transistor, the second channel is a channel of a switching transistor, the first dose is smaller than the second dose, and the first doping energy is smaller than the second doping energy.
Optionally, the range of the first dose is less than or equal to 1e+12ions/cm2, the range of the second dose is 3e+12-5e+12ions/cm 2, and the range of the first doping energy and the second doping energy is less than or equal to 5KV.
Optionally, the first channel and the second channel are made to contain hydrogen ions of different concentrations, further comprising:
forming a gate insulating layer on one side of the channel away from the substrate;
a first mask plate is arranged on one side, far away from the substrate, of the gate insulating layer, an opening area of the first mask plate corresponds to the first channel, and a non-opening area of the first mask plate corresponds to the second channel;
implanting hydrogen ions at a third dose and a third doping energy into the first channel;
removing the first mask; a second mask plate is arranged on one side, far away from the substrate, of the gate insulating layer, an opening area of the second mask plate corresponds to the second channel, and a non-opening area of the second mask plate corresponds to the first channel;
the second channel is implanted with hydrogen ions at a fourth dose and a fourth doping energy.
Optionally, the first channel is a channel of a driving transistor, the second channel is a channel of a switching transistor, the third dose is smaller than the fourth dose, and the third doping energy is smaller than the fourth doping energy.
Optionally, the third dose is less than or equal to 1E+12ions/cm2, the fourth dose is 3E+12-5E+12ions/cm 2, and the third doping energy and the fourth doping energy are 5KV-10KV.
Optionally, after forming the channel on the substrate, the method further includes:
and implanting fluorine ions into the channel.
Optionally, when fluorine ions are implanted into the channel, the implantation dosage of the fluorine ions is 1E+12-2E+12 ions/cm < 2 >, and the doping energy is 10KV.
In a second aspect, an embodiment of the present invention provides a display panel, which is manufactured by using the manufacturing method of the display panel provided by any embodiment of the present invention.
According to the technical scheme provided by the embodiment of the invention, the first channel and the second channel contain hydrogen ions with different concentrations, so that subthreshold swing of the driving transistor corresponding to the first channel and the subthreshold swing of the switching transistor corresponding to the second channel are different, the driving transistor can meet the control of gray scales, and meanwhile, the switching transistor can have a faster switching speed.
Drawings
Fig. 1 is a schematic diagram of a method for manufacturing a display panel according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a display panel structure corresponding to step S110 of the method for manufacturing a display panel according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a display panel structure corresponding to step S120 of the method for manufacturing a display panel according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a conventional pixel driving circuit;
fig. 5 is a schematic diagram of a display panel structure corresponding to step S140 of the method for manufacturing a display panel according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a display panel structure corresponding to step S150 of the method for manufacturing a display panel according to an embodiment of the present invention;
FIG. 7 is a schematic diagram illustrating another method for manufacturing a display panel according to an embodiment of the present invention;
fig. 8 is a manufacturing flowchart corresponding to step S230 of the manufacturing method of the display panel according to the embodiment of the present invention;
fig. 9 is a manufacturing flowchart corresponding to step S250 of the manufacturing method of the display panel according to the embodiment of the present invention;
FIG. 10 is a schematic diagram illustrating another method for fabricating a display panel according to an embodiment of the present invention;
fig. 11 is a schematic diagram of a display panel structure corresponding to step S330 of the method for manufacturing a display panel according to an embodiment of the present invention;
fig. 12 is a manufacturing flowchart corresponding to step S340 of the manufacturing method of the display panel according to the embodiment of the present invention;
fig. 13 is a manufacturing flowchart corresponding to step S360 of the manufacturing method of the display panel according to the embodiment of the present invention;
FIG. 14 is a schematic diagram illustrating another method for fabricating a display panel according to an embodiment of the present invention;
fig. 15 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
In the prior art, organic light emitting display (organic light emitting display, OLED) panels are generally classified into active matrix organic light emitting display (active matrix organic light emitting display, AMOLED) panels and passive matrix organic light emitting display (passive matrix organic light emitting display, PMOLED) panels. Among them, the AMOLED panel generally uses low-temperature polysilicon thin film transistors (low-temperature polycrystalline silicon thin film transistor, LTPS TFTs) to form a pixel driving circuit to drive organic light emitting diodes (organic light emitting diode, OLED) in the AMOLED panel to emit light. In the process of driving the OLED to emit light by the LTPS TFT, the pixel driving circuit formed by the LTPS TFT includes a switching transistor and a driving transistor. The switching transistor is used for switching, and generally requires the switching transistor to have a low sub-threshold swing (s.s), so that the change of the on current with the voltage is relatively large, so as to ensure that the switching transistor has the purpose of rapid charging and discharging, and the switching transistor has good switching performance. The driving transistor is used for driving the OLED to emit light, and generally requires a higher subthreshold swing of the driving transistor, so that the change of the on current along with the voltage is smaller, the stability of the on current output by the driving transistor is ensured, and the gray scale control is facilitated when the pixel driving circuit drives the OLED to emit light. The subthreshold swing of a transistor is typically related to the mobility of the transistor, the gate capacitance, the aspect ratio of the active layer channel, and the like. However, in the display panel, the process of the driving transistor and the switching transistor are the same, so that the driving transistor and the switching transistor have the same subthreshold swing, which is disadvantageous to the control of gray scale by the driving transistor or the switching speed of the switching transistor.
Aiming at the technical problems, the embodiment of the invention provides a manufacturing method of a display panel. Fig. 1 is a schematic diagram of a method for manufacturing a display panel according to an embodiment of the invention. In one embodiment of the invention, the active layer refers specifically to the channel of the transistor. As shown in fig. 1, the manufacturing method of the display panel includes:
s110, providing a substrate.
Specifically, fig. 2 is a schematic diagram of a display panel structure corresponding to step S110 of the method for manufacturing a display panel according to an embodiment of the present invention. As shown in fig. 2, the substrate 10 may be a flexible substrate or a rigid substrate. Illustratively, the flexible substrate may be a Polyimide (PI) substrate, and the rigid substrate may be a glass substrate.
S120, forming an active layer on the substrate, wherein the active layer comprises a first active layer and a second active layer. Specifically, a first channel and a second channel are formed on a substrate.
Specifically, fig. 3 is a schematic diagram of a display panel structure corresponding to step S120 of the method for manufacturing a display panel according to an embodiment of the present invention. As shown in fig. 3, a trench 20 is formed on a substrate 10, and the trench 20 may be formed using a chemical vapor deposition (chemical vapor deposition, CVD) process. After forming the channel 20, an etch stop layer is formed on a side of the channel 20 away from the substrate, and the channel 20 is patterned by etching or the like, such that the channel 20 forms the first channel 201 and the second channel 202. The first channel 201 and the second channel 202 are arranged in the same layer and are not in contact with each other. The first channel 201 and the second channel 202 correspond to the channels of different transistors, respectively. Illustratively, the first channel 201 may correspond to a channel of a driving transistor and the second channel 202 may correspond to a channel of a switching transistor.
In addition, after the first channel 201 and the second channel 202 are formed, the source region and the drain region corresponding to the first channel 201 and the second channel 202 are respectively opened, so that the source and the drain corresponding to the source and drain layer formed later can be electrically connected to the first channel 201 and the second channel 202.
It should be noted that a buffer layer may also be deposited on the substrate 10 before the formation of the channel 20. The buffer layer is used for blocking impurities such as water and oxygen and avoiding the influence of the impurities on the performance of the device when the impurities enter the display panel. The buffer layer may be silicon dioxide or silicon nitride, etc.
And S130, enabling the first active layer and the second active layer to contain hydrogen ions with different concentrations. Specifically, the first channel and the second channel may be made to contain different hydrogen ions.
Specifically, the hydrogen ions have negative charges, and can move under the action of an electric field. The implantation of hydrogen ions can be achieved by applying a voltage across the channel 20 such that an electric field is generated in the channel 20. The magnitude of the electric field affects the rate at which the hydrogen ions move and the dosage of the hydrogen ions affects the concentration of hydrogen ions implanted into the channel 20. The depth and concentration of hydrogen ions implanted into the channel 20 can be controlled by adjusting the magnitude of the voltage applied across the channel 20 and the dosage of hydrogen ions implanted therein. Illustratively, with continued reference to fig. 3, after the first channel 201 and the second channel 202 are implanted with hydrogen ions, in order to make the concentrations of hydrogen ions in the first channel 201 and the second channel 202 different, the doses of hydrogen ions in the first channel 201 and the second channel 202 may be set to be different during implantation, and the doping energies in the first channel 201 and the second channel 202 may be set to be different during implantation.
The concentration of hydrogen ions in channel 20 affects the subthreshold swing of the transistor. The channel 20 includes a fixed positive charge, and hydrogen ions can couple with the fixed positive charge in the channel 20 to repair internal defects of the channel 20, so that subthreshold swing of a transistor corresponding to the channel 20 can be reduced. When the concentration of hydrogen ions in the channel 20 is relatively high, the hydrogen ions can better repair the internal defects of the channel 20, so that the subthreshold swing of a transistor formed by the channel 20 is relatively small, and the transistor has good switching performance. When the concentration of the hydrogen ions in the channel 20 is smaller, the degree of repairing the internal defects in the channel 20 by the hydrogen ions is smaller, so that the subthreshold swing of the transistor formed by the channel 20 is larger, and the OLED is driven to emit light with good stability. With continued reference to fig. 3, the concentration of hydrogen ions after the first channel 201 is implanted may be different from the concentration of hydrogen ions after the second channel 202 is implanted such that the subthreshold swing of the drive transistor formed by the first channel 201 is different from the subthreshold swing of the switching transistor formed by the second channel 202. Therefore, the driving transistor can meet the control of gray scale, and meanwhile, the switching transistor has good switching speed.
When the first channel 201 and the second channel 202 are implanted with hydrogen ions, the first channel 201 and the second channel 202 may be implanted entirely, or may be implanted after the first channel 201 and the second channel 202 are patterned, which is not limited herein.
Fig. 4 is a circuit schematic diagram of a conventional pixel driving circuit. As shown in fig. 4, the pixel circuit includes a driving transistor Tdr and switching transistors T1 to T6. In the reset phase, the first Scan signal Scan1 controls the fourth transistor T4 and the fifth transistor T5 to be turned on, and the reference signal Vref is written into the anode of the OLED and the gate of the driving transistor Tdr to reset the anode of the OLED and the gate of the driving transistor Tdr, and in addition, the driving transistor Tdr is in an on state. In the writing and compensation stage, the second Scan signal Scan2 controls the first transistor T1 and the third transistor T3 to be turned on, the data signal Vdata is written into the first pole of the driving transistor Tdr through the first transistor T1, and the gate potential of the driving transistor Tdr is increased through the third transistor T3 until the driving transistor Tdr is turned off, at this time, the potential of the first pole of the driving transistor Tdr is Vdata, and the gate potential is Vdata-Vth (where Vth is the threshold voltage of the driving transistor Tdr) and is maintained through the capacitor C1. In the light emitting stage, the light emitting signal E1 controls the second transistor T2 and the sixth transistor T6 to be turned on, the first power voltage Vdd is input to the first pole of the driving transistor Tdr through the second transistor T2, the first pole of the driving transistor Tdr is increased from Vdata to Vdd, the driving transistor Tdr is turned on, and then a driving current is formed by a potential difference between the first pole and the gate electrode to be input to the anode of the OLED through the sixth transistor T6, and the cathode of the OLED is electrically connected to the second power voltage Vss, thereby driving the OLED to emit light. Thus, when the first channel 201 corresponds to the channel of the driving transistor and the second channel 202 corresponds to the channel of the switching transistor, the first channel 201 may correspond to the channel of the driving transistor Tdr in the pixel driving circuit and the second channel 202 may correspond to the channels of the switching transistors T1-T6 in the pixel driving circuit.
S140, an array device is formed based on the active layer, and the array device includes a driving transistor formed based on the first active layer and a switching transistor formed based on the second active layer.
Specifically, the array device may be formed based on a channel, and the column device includes a driving transistor formed based on a first channel and a switching transistor formed based on a second channel.
In particular, in forming the array device, forming the gate insulating layer, the gate layer, the interlayer insulating layer, and the source and drain layer may include forming a gate insulating layer, a gate layer, an interlayer insulating layer, and a source and drain layer on a side of the channel away from the substrate. Fig. 5 is a schematic diagram of a display panel structure corresponding to step S140 of the method for manufacturing a display panel according to an embodiment of the present invention.
Taking a top gate transistor as an example, as shown in fig. 5, a gate insulating layer 31, a gate layer 30, an interlayer insulating layer 40, and a source-drain layer 50 are sequentially stacked along a side of the channel 20 away from the substrate 10.
The gate insulating layer 31 contacts the channel 20 and forms an interface defect between the gate insulating layer 31 and the channel 20, i.e., a dangling bond between the gate insulating layer 31 and the channel 20. The implanted hydrogen ions can also be coupled with dangling bonds to achieve passivation of the dangling bonds, so that interface defects between the channel 20 and the gate insulating layer 31 can be improved, and the subthreshold swing of the transistor can be reduced. When the concentration of the hydrogen ions in the channel 20 is relatively large, the coupling of the hydrogen ions and the dangling bonds is relatively large, so that the subthreshold swing of the corresponding transistor is relatively small, and the switching performance is good. When the concentration of hydrogen ions in the channel 20 is smaller, the coupling of the hydrogen ions and dangling bonds is smaller, so that the subthreshold swing of the corresponding transistor is larger, and the OLED is driven to emit light with good stability. Therefore, by implanting different doses of hydrogen ions into the first channel 201 and the second channel 202, the subthreshold swing of the transistor formed by the first channel 201 is made different from that of the transistor formed by the second channel 202.
The gate insulating layer 31 may be formed by a CVD deposition process as well. After forming the gate insulating layer 31, a metal layer may be formed as the gate layer 30, and the gate layer 30 is patterned to form a gate. After forming the gate electrode, the interlayer insulating layer 40 may be formed using CVD deposition. A source/drain layer 50 is formed on a side of the interlayer insulating layer 40 remote from the substrate 10. The source/drain layer 50 may be a metal layer. And the source electrode 51 and the drain electrode 52 are formed by patterning.
The source electrode 51 and the drain electrode 52 are electrically connected to the source region and the drain region of the channel 20, and thus openings need to be provided in the gate insulating layer 31 and the interlayer insulating layer 40. That is, an opening is formed by etching the barrier layer after the gate insulating layer 31 is formed, another opening is formed by etching the barrier layer after the interlayer insulating layer 40 is formed, and the source electrode 51 and the drain electrode 52 are electrically connected to the source region and the drain region on the channel 20 through the openings on the gate insulating layer 31 and the interlayer insulating layer 40, respectively.
And S150, forming a light-emitting device layer on the side, far away from the substrate, of the array device.
Specifically, fig. 6 is a schematic diagram of a display panel structure corresponding to step S150 of the method for manufacturing a display panel according to an embodiment of the present invention. As shown in fig. 6, a light emitting device layer 60 is formed on a side of the source and drain electrode layer 50 away from the substrate 10 for emitting light under the drive of a pixel driving circuit formed of transistors. The light emitting device layer 60 may include an anode layer 61, a light emitting layer 62, and a cathode layer 63 that are stacked, and the anode layer 61 is disposed between the source and drain layers 50 and 62. The anode electrode patterned by the anode electrode layer 61 provides a driving signal through the pixel driving circuit, so that the light emitting device layer 60 emits light.
According to the technical scheme, the first channel and the second channel contain hydrogen ions with different concentrations, so that subthreshold swing of the driving transistor corresponding to the first channel and the subthreshold swing of the switching transistor corresponding to the second channel are different, the driving transistor can meet gray scale control, and meanwhile, the switching transistor has good switching speed.
Fig. 7 is a schematic diagram of another method for manufacturing a display panel according to an embodiment of the invention. In one embodiment of the invention, the active layer may be a channel region of a transistor. As shown in fig. 7, the manufacturing method of the display panel includes:
s210, providing a substrate.
S220, forming an active layer on the substrate, wherein the active layer comprises a first active layer and a second active layer.
Specifically, a channel may be formed on the substrate, and the channel includes a first channel and a second channel.
S230, a first mask plate is arranged on one side, far away from the substrate, of the active layer, an opening area of the first mask plate corresponds to the first active layer, and a non-opening area of the first mask plate corresponds to the second active layer.
Specifically, a first mask is disposed on a side, far away from the substrate, of the trench, an opening area of the first mask corresponds to the first trench, and a non-opening area of the first mask corresponds to the second trench.
Specifically, fig. 8 is a manufacturing flowchart corresponding to step S230 of the manufacturing method of the display panel according to the embodiment of the present invention. As shown in fig. 8, the first mask 70 is disposed on a side of the channel 20 away from the substrate 10. The opening area of the first mask 70 corresponds to the first channel 201, so that hydrogen ions can be injected into the first channel 201 through the first mask 70 when the hydrogen ions are injected. The non-opening region of the first mask 70 corresponds to the second channel 202, so that the implantation of hydrogen ions into the second channel 202 can be blocked during the implantation of hydrogen ions.
S240, implanting hydrogen ions with a first dose and a first doping energy into the first active layer. Specifically, hydrogen ions at a first dose and a first doping energy are implanted into the first channel.
Specifically, with continued reference to fig. 8, hydrogen ions of a first dose and a first doping energy are implanted into the first channel 201, blocked by the non-opening of the first reticle 70 from the second channel 202. The second channel 202 is devoid of hydrogen ion implantation.
S250, removing the first mask, and arranging a second mask on one side, far away from the substrate, of the active layer, wherein an opening area of the second mask corresponds to the second active layer, and a non-opening area of the second mask corresponds to the first active layer.
Specifically, the first mask plate is removed, a second mask plate is arranged on one side, far away from the substrate, of the channel, an opening area of the second mask plate corresponds to the second channel, and a non-opening area of the second mask plate corresponds to the first channel.
Fig. 9 is a manufacturing flowchart corresponding to step S250 of the manufacturing method of the display panel according to the embodiment of the invention. As shown in fig. 9, after the injection of hydrogen ions into the first trench 201 is completed, the first mask 70 is removed, and a second mask 80 is disposed on a side of the trench 20 away from the substrate 10. The opening area of the second mask 80 corresponds to the second channel 202, so that hydrogen ions can be injected into the second channel 202 through the second mask 80 when the hydrogen ions are injected. The non-opening region of the second mask 80 corresponds to the first channel 201, so that the implantation of hydrogen ions into the first channel 201 can be blocked during the implantation of hydrogen ions.
S260, implanting hydrogen ions at the second dose and the second doping energy into the second channel so that the hydrogen ion concentration of the second channel is different from that of the first channel.
Specifically, with continued reference to fig. 9, hydrogen ions of a second dose and a second doping energy are implanted into the second channel 202, blocked from the first channel 201 by the non-opening of the second reticle 80. The first channel 201 is devoid of hydrogen ion implantation.
Thus, in the above process, a first dose of hydrogen ions of a first doping energy is implanted into the first channel 201 and a second dose of hydrogen ions of a second doping energy is implanted into the second channel 202. By setting the first dose to be different from the second dose, the concentration of hydrogen ions in the first channel 201 and the concentration of hydrogen ions in the second channel 202 are different, so that the subthreshold swing of the driving transistor formed by the first channel 201 is different from that of the switching transistor formed by the second channel 202, thereby enabling the driving transistor to meet the control of gray scale and enabling the switching transistor to have better switching speed.
Illustratively, table 1 provides electrical levels for a drive transistor and a switching transistor as provided in the prior art. Table 2 shows the electrical levels of another driving transistor and switching transistor according to the present disclosure. The electrical parameters of the driving transistor are electrical parameters corresponding to the DTFT, and the electrical parameters of the switching transistor are electrical parameters corresponding to the STFT. In addition, SS is a subthreshold swing. As can be seen from tables 1 and 2, after the channel hydrogen ion implantation, the hydrogen ion concentration of the first channel 201 is smaller than that of the second channel 202, and the subthreshold swing of the driving transistor is larger than that of the switching transistor, so that the driving transistor can meet the gray scale control, and meanwhile, the switching transistor has a better switching speed.
TABLE 1
TABLE 2
S270, an array device is formed based on the channel, the array device including a driving transistor formed based on the first channel and a switching transistor formed based on the second channel.
And S280, forming a light-emitting device layer on the side, far away from the substrate, of the array device.
On the basis of the above technical solution, when the first channel 201 is a channel of the driving transistor and the second channel 202 is a channel of the switching transistor, the first dose is smaller than the second dose, and the first doping energy is smaller than the second doping energy.
Specifically, in the process of manufacturing the transistor, the process of driving the transistor is the same as the process of switching the transistor. When the first channel 201 is a channel of the driving transistor and the second channel 202 is a channel of the switching transistor, by setting the first dose to be smaller than the second dose and the first doping energy to be smaller than the second doping energy, the concentration of hydrogen ions in the first channel 201 is smaller than that in the second channel 202, and the subthreshold swing of the driving transistor corresponding to the first channel 201 is further larger than that of the switching transistor corresponding to the second channel 202, so that the switching transistor can meet the control of gray scale, and meanwhile, the driving transistor can ensure stability when driving the OLED to emit light.
Illustratively, the first dose is in the range of less than or equal to 1E+12ions/cm2, the second dose is in the range of 3E+12-5E+12ions/cm 2, and the first doping energy and the second doping energy are in the range of less than or equal to 5KV. That is, by setting the first dose smaller than the second dose, it is possible to realize that the subthreshold swing of the driving transistor corresponding to the first channel 201 is larger than the subthreshold swing of the switching transistor corresponding to the second channel 202.
It should be noted that, in the above process, the first doping energy and the second doping energy may be equal on the basis that the first dose is smaller than the second dose.
Fig. 10 is a schematic diagram of another method for manufacturing a display panel according to an embodiment of the invention. As shown in fig. 10, the manufacturing method of the display panel includes:
s310, providing a substrate.
S320, forming a channel on the substrate, wherein the channel comprises a first channel and a second channel.
And S330, forming a gate insulating layer on one side of the channel away from the substrate.
Specifically, fig. 11 is a schematic diagram of a display panel structure corresponding to step S330 of the method for manufacturing a display panel according to an embodiment of the present invention. As shown in fig. 11, a gate insulating layer 31 is formed on a side of the channel 20 away from the substrate 10, and the gate insulating layer 31 is in contact with the channel 20. The interface of gate insulation layer 31 in contact with channel 20 has dangling bonds that increase the subthreshold swing of the transistor.
S340, a first mask plate is arranged on one side, far away from the substrate, of the gate insulating layer, an opening area of the first mask plate corresponds to the first channel, and a non-opening area of the first mask plate corresponds to the second channel.
Specifically, fig. 12 is a manufacturing flowchart corresponding to step S340 of the manufacturing method of the display panel according to the embodiment of the present invention. As shown in fig. 12, the first mask 70 is disposed on a side of the gate insulating layer 31 away from the substrate 10. The opening region of the first mask 70 corresponds to the gate insulating layer 31 corresponding to the first channel 201, so that hydrogen ions can be injected into the first channel 201 through the first mask 70 and the gate insulating layer 31 when the hydrogen ions are injected. The non-opening region of the first mask 70 corresponds to the gate insulating layer 31 corresponding to the second channel 202, so that the hydrogen ion implantation can be blocked from being implanted into the second channel 202 and the gate insulating layer 31 corresponding to the second channel 202.
S350, implanting hydrogen ions with a third dose and a third doping energy into the first channel.
Specifically, with continued reference to fig. 12, the second channel 202 and the gate insulating layer 31 corresponding to the second channel 202 are blocked by the non-opening of the first mask 70, and hydrogen ions of the third dose and the third doping energy are implanted into the first channel 201. The second channel 202 is devoid of hydrogen ion implantation.
S360, removing the first mask plate, and arranging a second mask plate on one side, far away from the substrate, of the gate insulating layer, wherein an opening area of the second mask plate corresponds to the second channel, and a non-opening area of the second mask plate corresponds to the first channel.
Specifically, fig. 13 is a manufacturing flowchart corresponding to step S360 of the manufacturing method of the display panel according to the embodiment of the present invention. As shown in fig. 13, after the injection of hydrogen ions into the first channel 201 is completed, the first mask 70 is removed, and a second mask 80 is disposed on the side of the gate insulating layer 31 away from the substrate 10. The opening region of the second mask 80 corresponds to the gate insulating layer 31 of the second channel 202, so that hydrogen ions can be injected into the second channel 202 through the second mask 80 and the gate insulating layer 31 when hydrogen ions are injected. The non-opening region of the second mask 80 corresponds to the gate insulating layer 31 corresponding to the first channel 201, so that the hydrogen ion implantation can be blocked from being implanted into the first channel 201 and the gate insulating layer 31 during the hydrogen ion implantation.
And S370, implanting hydrogen ions with a fourth dose and a fourth doping energy into the second channel.
Specifically, with continued reference to fig. 13, the first channel 201 and the gate insulating layer 31 corresponding to the first channel 201 are blocked by the non-open region of the second reticle 80, and the hydrogen ions of the fourth dose and the fourth doping energy are implanted into the second channel 202. The first channel 201 is devoid of hydrogen ion implantation.
Thus, in the above process, a third dose and a third doping energy of hydrogen ions are implanted into the first channel 201 and a fourth dose and a fourth doping energy of hydrogen ions are implanted into the second channel 202. By setting the third dose to be different from the fourth dose and the third doping energy to be different from the fourth doping energy, the concentration of hydrogen ions in the first channel 201 and the concentration of hydrogen ions in the second channel 202 are different, so that subthreshold swing of a driving transistor formed by the first channel 201 is different from that of a switching transistor formed by the second channel 202, thereby enabling the driving transistor to meet the control of gray scale and enabling the switching transistor to have better switching speed.
Illustratively, table 3 provides electrical levels of another driving transistor and switching transistor according to the present disclosure. As can be seen from tables 1 and 3, the concentration of hydrogen ions in the first channel corresponding to the driving transistor is smaller than that in the second channel corresponding to the switching transistor, so that the subthreshold swing of the driving transistor is larger than that of the switching transistor, thereby enabling the driving transistor to meet the gray scale control and enabling the switching transistor to have a better switching speed.
As is clear from tables 2 and 3, when the channel is directly subjected to hydrogen ion implantation, the difference between the hydrogen ion concentration in the channel of the driving transistor and the hydrogen ion concentration in the channel of the switching transistor is smaller than the difference between the hydrogen ion concentration in the channel of the driving transistor and the hydrogen ion concentration in the channel of the switching transistor when the channel is subjected to hydrogen ion implantation through the gate insulating layer. Moreover, by implanting hydrogen ion concentration into the channel, the threshold voltage Vth of the transistor is relatively forward biased, and the channel dopant amount can be reduced in the latter stage, thereby reducing the burden of the particle implantation apparatus. The contact resistance RC1 of the channel of the transistor and the source-drain electrode layer and the channel equivalent capacitance C1 are reduced integrally, so that the contact performance of the transistor is increased.
TABLE 3 Table 3
S380, an array device is formed based on the channel, the array device including a driving transistor formed based on the first channel and a switching transistor formed based on the second channel.
S390, forming a light-emitting device layer on one side of the array device away from the substrate.
On the basis of the technical scheme, when the first channel is a channel of the driving transistor, the second channel is a channel of the switching transistor, the third dose is smaller than the fourth dose, and the third doping energy is smaller than the fourth doping energy. Similarly, by setting the third dose smaller than the fourth dose and the third doping energy smaller than the fourth doping energy, the concentration of hydrogen ions in the first channel 201 is smaller than that in the second channel 202, and the subthreshold swing of the driving transistor corresponding to the first channel 201 is further larger than that of the switching transistor corresponding to the second channel 202, so that the driving transistor can meet the control of gray scale, and meanwhile, the switching transistor has a good switching speed. Illustratively, the third dose is in the range of less than or equal to 1E+12ions/cm2, the fourth dose is in the range of 3E+12-5E+12ions/cm 2, and the third and fourth doping energies are in the range of 5KV-10KV.
It should be noted that, on the basis that the third dose is smaller than the fourth dose, the third doping energy and the fourth doping energy may be equal. In addition, the doping energy can control the movement depth of the hydrogen ions along the vertical direction of the substrate, and the concentration of the hydrogen ions in the channel 20 can be controlled by controlling the doping energy. In other embodiments, the third doping energy may be set smaller than the fourth doping energy, so that the concentration of hydrogen ions corresponding to the first channel 201 is more stored in the gate insulating layer 31 corresponding to the first channel 201, and thus the concentration of hydrogen ions in the first channel 201 may be further reduced, and the subthreshold swing of the driving transistor corresponding to the first channel 201 is larger.
Fig. 14 is a schematic diagram of another method for manufacturing a display panel according to an embodiment of the invention. As shown in fig. 14, the manufacturing method of the display panel includes:
s410, providing a substrate.
S420, forming a channel on the substrate, wherein the channel comprises a first channel and a second channel.
S430, fluorine ions are injected into the channel.
Specifically, the channel comprises fixed positive charges, and fluorine ions can be coupled with the fixed positive charges in the channel through fluorine ion injection, so that defects in the channel are repaired, and subthreshold swing of a transistor corresponding to the channel can be reduced.
Illustratively, when fluorine ions are injected into the channel, the injection dosage of the fluorine ions is 1E+12-2E+12 ions/cm < 2 >, and the doping energy is 10KV.
S440, enabling the first channel and the second channel to contain hydrogen ions with different concentrations.
S450, an array device is formed based on the channel, the array device including a driving transistor formed based on the first channel and a switching transistor formed based on the second channel.
And S460, forming a light-emitting device layer on the side, far away from the substrate, of the array device.
On the basis of the above technical solutions, forming a channel on a substrate includes:
an amorphous silicon layer is formed on a substrate.
And carrying out dehydrocrystallization on the amorphous silicon to form a polysilicon layer.
Specifically, when amorphous silicon is converted into polysilicon, an annealing process is further included for achieving recrystallization.
The polysilicon layer is patterned to form a channel.
The embodiment of the invention also provides a display panel. Fig. 15 is a schematic structural diagram of a display panel according to an embodiment of the present invention. The display panel 100 is manufactured by the manufacturing method of the display panel according to any embodiment of the present invention.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (9)
1. A method for manufacturing a display panel, comprising:
providing a substrate;
forming a channel on the substrate, the channel including a first channel and a second channel;
implanting fluorine ions into the channel;
providing voltages on two sides of the first channel and the second channel, providing hydrogen sources for the first channel and the second channel, performing hydrogen ion implantation on the first channel and the second channel, and enabling the first channel and the second channel to contain hydrogen ions with different concentrations;
forming an array device based on the channel, the array device including a driving transistor formed based on the first channel and a switching transistor formed based on the second channel;
a light emitting device layer is formed on a side of the array device remote from the substrate.
2. The method of claim 1, wherein doping the first channel and the second channel with hydrogen ions and causing the first channel and the second channel to contain different concentrations of hydrogen ions comprises:
a first mask plate is arranged on one side, far away from the substrate, of the channel, an opening area of the first mask plate corresponds to the first channel, and a non-opening area of the first mask plate corresponds to the second channel;
implanting hydrogen ions at a first dose and a first doping energy into the first channel;
removing the first mask; a second mask plate is arranged on one side, far away from the substrate, of the channel, an opening area of the second mask plate corresponds to the second channel, and a non-opening area of the second mask plate corresponds to the first channel;
the second channel is implanted with hydrogen ions at a second dose and a second doping energy such that the hydrogen ion concentration of the second channel is different from the first channel.
3. The method of claim 2, wherein the first channel is a channel of a drive transistor and the second channel is a channel of a switching transistor, the first dose is less than the second dose, and the first doping energy is less than the second doping energy.
4. The method of claim 2, wherein the first dose is in a range of less than or equal to 1e+12ions/cm2, the second dose is in a range of 3e+12-5e+12ions/cm 2, and the first doping energy and the second doping energy are in a range of less than or equal to 5KV.
5. The method of manufacturing of claim 1, wherein the first channel and the second channel are made to contain hydrogen ions of different concentrations, further comprising:
forming a gate insulating layer on one side of the channel away from the substrate;
a first mask plate is arranged on one side, far away from the substrate, of the gate insulating layer, an opening area of the first mask plate corresponds to the first channel, and a non-opening area of the first mask plate corresponds to the second channel;
implanting hydrogen ions at a third dose and a third doping energy into the first channel;
removing the first mask; a second mask plate is arranged on one side, far away from the substrate, of the gate insulating layer, an opening area of the second mask plate corresponds to the second channel, and a non-opening area of the second mask plate corresponds to the first channel;
the second channel is implanted with hydrogen ions at a fourth dose and a fourth doping energy.
6. The method of claim 5, wherein the first channel is a channel of a drive transistor, the second channel is a channel of a switching transistor, the third dose is less than the fourth dose, and the third doping energy is less than the fourth doping energy.
7. The method of claim 5, wherein the third dose is less than or equal to 1e+12ions/cm2, the fourth dose is 3e+12-5e+12ions/cm 2, and the third doping energy and the fourth doping energy are in the range of 5KV-10KV.
8. The method according to claim 1, wherein the fluorine ion is implanted into the channel at a dose of 1e+12-2e+12 ions/cm2 and a doping energy of 10KV.
9. A display panel prepared by the method of any one of claims 1-8.
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