CN110798370A - Bus protocol debugging method and device based on universal interface and terminal equipment - Google Patents
Bus protocol debugging method and device based on universal interface and terminal equipment Download PDFInfo
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- CN110798370A CN110798370A CN201810870087.6A CN201810870087A CN110798370A CN 110798370 A CN110798370 A CN 110798370A CN 201810870087 A CN201810870087 A CN 201810870087A CN 110798370 A CN110798370 A CN 110798370A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/18—Protocol analysers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/08—Protocols for interworking; Protocol conversion
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Abstract
The invention is suitable for the technical field of communication, and provides a debugging method and a debugging device based on a universal interface bus protocol and terminal equipment, wherein the debugging method comprises the following steps: detecting a starting signal, and switching a bus protocol signal line to a universal interface; receiving a bus protocol debugging signal sent by a debugging card through the universal interface, and debugging according to the debugging signal; and if normal starting is detected, finishing debugging. The invention can debug the mainboard by accessing the universal interface, thereby avoiding the debugging card from mistakenly connecting and damaging the circuit and saving the space of the mainboard.
Description
Technical Field
The invention belongs to the technical field of communication, and particularly relates to a bus protocol debugging method and device based on a universal interface and terminal equipment.
Background
The LPC (Low Pin Count) protocol is a 33 MHz 4-bit parallel bus protocol based on the Intel standard, and the LPC bus is a data address command multiplexing bus defined by Intel corporation. In order to start and debug a desktop computer and a server, a debug card based on the LPC protocol is often used. The debugging card interfaces in the market are mainly pins and sockets, a debugging interface corresponding to the debugging card interface needs to be found during debugging, and if the debugging card interface is mistakenly connected or reversely connected, a mainboard to be tested and a debugging card circuit can be damaged; the corresponding debugging interface is occupied or the debugging mainboard does not have the corresponding interface, and the LPC debugging card cannot be used; in addition, in the prior art, a corresponding mainframe box needs to be opened in the debugging process, so that a great deal of inconvenience exists in the debugging process, and a certain mainboard space needs to be occupied.
Disclosure of Invention
In view of this, embodiments of the present invention provide a bus protocol debugging method and apparatus based on a universal interface, and a terminal device, so as to solve the problems in the prior art that an interface is easily misconnected and occupies a motherboard space.
A first aspect of an embodiment of the present invention provides a bus protocol debugging method based on a universal interface, including:
detecting a starting signal, and switching a bus protocol signal line to a universal interface;
receiving a bus protocol debugging signal sent by a debugging card through the universal interface, and debugging according to the debugging signal;
and if normal starting is detected, finishing debugging.
A second aspect of the embodiments of the present invention provides a bus protocol debugging apparatus based on a universal interface, including:
the protocol line switching module is used for detecting a starting signal and switching a bus protocol signal line to the universal interface;
the protocol debugging module is used for receiving a bus protocol debugging signal sent by a debugging card through the universal interface and debugging according to the debugging signal;
and the starting detection module is used for finishing debugging if normal starting is detected.
A third aspect of an embodiment of the present invention provides a terminal device, including: the debugging method comprises the steps of a memory, a processor and a computer program which is stored in the memory and can run on the processor, wherein when the processor executes the calculation and the program, the debugging method realizes the debugging method based on the bus protocol of the universal interface.
A fourth aspect of an embodiment of the present invention provides a computer-readable storage medium, including: the computer storage medium stores a computer program which, when executed by a processor, implements the steps of the universal interface based bus protocol debugging method described above.
Compared with the prior art, the embodiment of the invention has the following beneficial effects: according to the embodiment of the invention, when a starting-up signal is detected, a bus protocol signal line on the mainboard is switched to the universal interface, the debugging card is inserted into the universal interface, a bus protocol debugging signal is sent, the bus protocol of the mainboard is debugged according to the debugging signal, and if normal starting is detected, the debugging is finished; the debugging of the bus protocol is completed through the universal interface, the problem that the debugging card is inserted with a wrong interface to damage a mainboard and a debugging card circuit is solved, the multiplexing of the universal interface is realized, and the occupation of the mainboard space is reduced.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 is a schematic diagram of a general-purpose interface-based bus protocol debugging method according to an embodiment of the present invention;
fig. 2 is a schematic flow chart illustrating an implementation of a general-interface-based bus western medicine debugging method according to a second embodiment of the present invention;
fig. 3 is an exemplary diagram of a voltage conversion principle provided by the second embodiment of the present invention;
fig. 4 is a schematic diagram of a bus protocol debugging apparatus based on a universal interface according to a third embodiment of the present invention;
fig. 5 is a schematic diagram of a terminal device according to an embodiment of the present invention.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
In order to explain the technical means of the present invention, the following description will be given by way of specific examples.
Example one
Fig. 1 is a schematic diagram illustrating a general-purpose interface-based bus protocol debugging method according to an embodiment of the present invention, where the method is used for debugging bus protocols of a desktop and a server; before the desktop is started, the debugging card is accessed through the interface, and the protocol signal conversion module of the mainboard is used for converting the universal protocol signal and the bus protocol signal so as to realize the switching of the signal of the universal interface; when the bus protocol is debugged, the signal line at the interface is converted into the bus protocol signal line, so that a debugging card can be accessed into the universal interface to debug the bus protocol, and the bus protocol can be debugged on the front panel of the mainboard without opening a mainframe box; detect the normal start-up of mainboard through inside monitoring module, then accomplish the debugging, go out the interface signal line and switch back original general interface signal circuit, can insert other ordinary interface device through the interface to can realize the multiplexing of ordinary interface, when carrying out bus protocol debugging, need not to open the mainframe box, made things convenient for the operation flow of mainboard bus debugging, reduced the occupation in mainboard space.
Example two
Fig. 2 is a schematic view of an implementation flow of a bus protocol debugging method based on a universal interface according to an embodiment of the present invention, where the method may be applied to debugging a bus protocol in a motherboard starting process, and as shown in the figure, the method may include the following steps:
step S201, detecting a power-on signal, and switching the bus protocol signal line to the universal interface.
In this embodiment, when the desktop and the server are booted and debugged, a debug card based on the low pin count LPC protocol is used to debug LPC bus protocol signals.
The bus protocol signal is determined by the mainboard, and the universal interface can be a common serial port or a common network port. Before the desktop is started, a debugging card can be accessed to the general interface, and when a starting signal is detected, the LPC bus protocol signal is switched to the general interface through a complex programmable logic device CPLD, and the switching of a protocol signal circuit can be realized through programming or a digital integrated circuit.
It should be noted that, an LPC bus protocol signal is switched to a general interface, and the general interface at least has a serial port or a network port with 9 pins, which meets seven data line pins of an LPC protocol bus; if other protocol buses can also determine the type of the common interface which can be connected according to the number of the required data lines.
Further, before detecting the power-on signal and switching the bus protocol signal line to the universal interface, the method further includes:
and adjusting the output voltage of the universal interface to the voltage required by debugging the bus protocol.
In this embodiment, when the debug card performs the debug operation, if the required voltage value does not match the voltage value that can be provided by the interface, the output voltage of the universal interface needs to be adjusted to the voltage required by the bus protocol debug, for example, the voltage required by the LPC debug card is 3.3V, and if the universal interface is a USB interface and the output voltage is 5V, the voltage needs to be adjusted to the voltage value 3.3V that is required by the normal operation of the debug card, as shown in the exemplary diagram of the voltage conversion principle provided in this embodiment shown in fig. 3, in addition, the voltage conversion circuit may be disposed on the motherboard or may be disposed in the debug card. If the bus protocol signal is debugged, the bus protocol signal can be adjusted or converted according to the required voltage.
Step S202, receiving a bus protocol debugging signal sent by a debugging card through the universal interface, and debugging according to the debugging signal.
In this embodiment, the bus protocol signal is accessed to the universal interface, and the voltage is adjusted to the voltage value required by the bus protocol debug card, so that the debugging of the startup of the motherboard can be performed according to the debug signal sent by the debug card accessed to the universal interface. In the debugging process, a signal of a starting-up state is generated and sent to a driving unit of a debugging card for analysis, the analyzed debugging code can be displayed through a nixie tube arranged on the debugging card, and the debugging code can be displayed through numbers or letters; the debugging code displayed by the nixie tube can comprise digital symbols generated by a debugging process, such as data, addresses, commands and the like; and judging the starting state according to the displayed debugging codes, and preliminarily positioning the system fault occurrence position in the starting process according to the display of the nixie tube.
Further, the receiving, by the universal interface, a bus protocol debug signal sent by a debug card, and performing debugging according to the debug signal includes:
and acquiring debugging codes generated in the debugging process, and debugging according to the debugging codes.
In this embodiment, the debug card may be a bus protocol debug card that satisfies a universal serial USB interface, and during the start-up process of debugging the motherboard according to the debug signal, the debug card may generate a corresponding debug code, and may locate a fault point in the boot process according to the debug code, thereby implementing targeted debugging of the motherboard. Through the multiplexing of the common serial interface, the space of the mainboard is saved, the access of the debugging card is convenient, and the problem of circuit damage caused by the error of the debugging card interface is avoided.
In step S203, if normal startup is detected, debugging is completed.
In this embodiment, when the host is started, the BIOS detects the BIOS and the system self-start program, and when it is detected that the host is successfully started or started, sends a signal indicating that the host is successfully started to the CPLD, and completes debugging of the motherboard.
Further, if normal startup is detected, after completing debugging, the method further includes:
and switching the universal interface to an original protocol signal line.
In this embodiment, after the motherboard is debugged and the complex programmable logic device CPLD receives the smooth startup signal sent by the BIOS, the protocol at the interface is switched back to the original protocol signal line, for example, the original USB3.0 protocol interface is switched back to the USB3.0 protocol line; if the network port is other universal network ports, switching back to the protocol line corresponding to the universal network port.
Further, the bus protocol debugging method based on the universal interface further includes:
the universal interface comprises a universal serial port or a universal network port;
the bus protocol is a low pin count LPC bus protocol.
In this embodiment, the universal interface may be a universal serial port or a universal network port, but the universal serial port or the universal network port needs to satisfy the condition of 9 pins, so that the requirement that 7 data lines are needed for debugging the LPC protocol bus can be satisfied.
According to the embodiment of the invention, the bus protocol debugging card can be accessed through switching the protocol signal line of the universal interface to debug the bus protocol of the mainboard, the debugging code in the debugging process is used for positioning the fault point in the host starting process, the fault debugging is carried out according to the debugging code, the normal starting of the host is detected, the debugging is completed, and the universal interface is switched back to the original protocol signal line, so that the multiplexing of the universal interface is realized, the space of the mainboard is saved, the problem that the debugging card is mistakenly inserted to damage the circuit is avoided, and the debugging work of the mainboard is greatly facilitated.
It should be noted that, within the technical scope of the present disclosure, other sequencing schemes that can be easily conceived by those skilled in the art should also be within the protection scope of the present disclosure, and detailed description is omitted here.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.
EXAMPLE III
Fig. 4 is a schematic diagram of a bus protocol debugging apparatus based on a universal interface according to a third embodiment of the present invention, and for convenience of description, only the parts related to the embodiment of the present invention are shown.
The bus protocol debugging device based on the universal interface comprises:
the protocol line switching module 41 is used for detecting a starting signal and switching a bus protocol signal line to a general interface;
the protocol debugging module 42 is used for receiving a bus protocol debugging signal sent by the debugging card through the universal interface and debugging according to the debugging signal;
and a start detection module 43, configured to complete debugging if normal start is detected.
Further, the apparatus further comprises:
and the voltage regulating module is used for regulating the output voltage of the universal interface to the voltage required by debugging of the bus protocol.
Further, the apparatus further comprises:
and the debugging code acquisition module is used for acquiring debugging codes generated in the debugging process and debugging according to the debugging codes.
Through this embodiment, realized the multiplexing of general interface, do not occupy the mainboard space, and when the mainboard of debugging desktop machine, need not to open the mainframe box and look for the interface that corresponds with the debugging card, the general serial ports or the net gape of direct access front panel can realize the debugging of mainboard, the debugging is accomplished then switches back the original agreement signal circuit of interface to can not influence the normal use of general interface yet, avoided the debugging card interface to connect the wrong problem that leads to the circuit to damage.
It will be apparent to those skilled in the art that, for convenience and simplicity of description, the foregoing division of the functional modules is merely illustrated, and in practical applications, the above function distribution may be performed by different functional units and modules as needed, that is, the internal structure of the mobile terminal is divided into different functional units or modules to perform all or part of the above described functions. Each functional module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional modules are only used for distinguishing one functional module from another, and are not used for limiting the protection scope of the application. The specific working process of the module in the mobile terminal may refer to the corresponding process in the foregoing method embodiment, and is not described herein again.
Fig. 5 is a schematic diagram of a terminal device according to an embodiment of the present invention. As shown in fig. 5, the terminal device 5 of this embodiment includes: a processor 50, a memory 51 and a computer program 525 stored in said memory 51 and executable on said processor 50. The processor 50 executes the computer program 52 to implement the steps in the above-mentioned embodiments of the universal interface based bus protocol debugging method, such as the steps 101 to 103 shown in fig. 1. Alternatively, the processor 50, when executing the computer program 52, implements the functions of the modules/units in the above-mentioned device embodiments, such as the functions of the modules 41 to 43 shown in fig. 4.
Illustratively, the computer program 52 may be partitioned into one or more modules/units that are stored in the memory 51 and executed by the processor 50 to implement the present invention. The one or more modules/units may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution process of the computer program 52 in the terminal device 5.
The terminal device 5 may be a desktop computer, a notebook, a palm computer, a cloud server, or other computing devices. The terminal device may include, but is not limited to, a processor 50, a memory 51. Those skilled in the art will appreciate that fig. 5 is merely an example of a terminal device 5 and does not constitute a limitation of terminal device 5 and may include more or fewer components than shown, or some components may be combined, or different components, e.g., the terminal device may also include input-output devices, network access devices, buses, etc.
The Processor 50 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 51 may be an internal storage unit of the terminal device 5, such as a hard disk or a memory of the terminal device 5. The memory 51 may also be an external storage device of the terminal device 5, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like, which are provided on the terminal device 5. Further, the memory 51 may also include both an internal storage unit and an external storage device of the terminal device 5. The memory 51 is used for storing the computer program and other programs and data required by the terminal device. The memory 51 may also be used to temporarily store data that has been output or is to be output.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present invention. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other ways. For example, the above-described embodiments of the apparatus/terminal device are merely illustrative, and for example, the division of the modules or units is only one logical division, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated modules/units, if implemented in the form of software functional units and sold or used as separate products, may be stored in a computer readable storage medium. Based on such understanding, all or part of the flow of the method according to the embodiments of the present invention may also be implemented by a computer program, which may be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method embodiments may be implemented. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, and the like. It should be noted that the computer readable medium may contain other components which may be suitably increased or decreased as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media which may not include electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.
Claims (10)
1. A bus protocol debugging method based on a universal interface is characterized by comprising the following steps:
detecting a starting signal, and switching a bus protocol signal line to a universal interface;
receiving a bus protocol debugging signal sent by a debugging card through the universal interface, and debugging according to the debugging signal;
and if normal starting is detected, finishing debugging.
2. The universal interface based bus protocol debugging method of claim 1, wherein before detecting the boot signal and switching the bus protocol signal line to the universal interface, further comprising:
and adjusting the output voltage of the universal interface to the voltage required by debugging the bus protocol.
3. The bus protocol debugging method based on the universal interface of claim 1, wherein the receiving, by the universal interface, the bus protocol debugging signal sent by the debugging card and performing debugging according to the debugging signal comprises:
and acquiring debugging codes generated in the debugging process, and debugging according to the debugging codes.
4. The universal interface based bus protocol debugging method of claim 1 wherein, after completing debugging if normal startup is detected, further comprising:
and switching the universal interface to an original protocol signal line.
5. The universal interface based bus protocol debugging method of claim 1,
the universal interface comprises a universal serial port or a universal network port;
the bus protocol is a low pin count LPC bus protocol.
6. A bus protocol debugging device based on a universal interface is characterized by comprising:
the protocol line switching module is used for detecting a starting signal and switching a bus protocol signal line to the universal interface;
the protocol debugging module is used for receiving a bus protocol debugging signal sent by a debugging card through the universal interface and debugging according to the debugging signal;
and the starting detection module is used for finishing debugging if normal starting is detected.
7. The universal interface based bus protocol debugging apparatus of claim 6 further comprising:
and the voltage regulating module is used for regulating the output voltage of the universal interface to the voltage required by debugging of the bus protocol.
8. The universal interface based bus protocol debugging apparatus of claim 6 further comprising:
and the debugging code acquisition module is used for acquiring debugging codes generated in the debugging process and debugging according to the debugging codes.
9. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1 to 5 when executing the computer program.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 5.
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| CN111464365A (en) * | 2020-04-17 | 2020-07-28 | 支付宝(杭州)信息技术有限公司 | Equipment control method and system |
| CN111522766A (en) * | 2020-04-27 | 2020-08-11 | 浙江大华技术股份有限公司 | Communication system, method, device, equipment and storage medium thereof |
| CN112379660A (en) * | 2020-11-13 | 2021-02-19 | 英博超算(南京)科技有限公司 | UART for automobile automatic driving domain controller and debugging system and method |
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Application publication date: 20200214 |