CN110798213A - Anomaly detection method, anomaly protection method, data detector and DAC system - Google Patents
Anomaly detection method, anomaly protection method, data detector and DAC system Download PDFInfo
- Publication number
- CN110798213A CN110798213A CN201911039629.6A CN201911039629A CN110798213A CN 110798213 A CN110798213 A CN 110798213A CN 201911039629 A CN201911039629 A CN 201911039629A CN 110798213 A CN110798213 A CN 110798213A
- Authority
- CN
- China
- Prior art keywords
- input data
- data
- abnormal
- zero
- digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1071—Measuring or testing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
The invention discloses an abnormality detection method, an abnormality protection method, a data detector and a DAC system, wherein the abnormality detection method based on the input data of the DAC is applied to detecting the input data of a digital-to-analog converter and comprises the following steps: according to the sequence of input data of the digital-to-analog converter, after the number of the input data reaches a preset detection counting threshold value, judging whether the number of zero crossing points in the input data is abnormal or not, and simultaneously judging whether the signal energy of the input data is abnormal or not; and if the two judgment results are both true, determining that the input data is abnormal. The exception protection method comprises the following steps: and after determining that the input data is abnormal, sending an interrupt signal to an external CPU, modifying an input data source, reconfiguring internal parameters of the digital-to-analog converter, and continuing to execute the abnormal detection method. The data detector is used for executing the modularized device of the abnormality detection method, and the DAC system comprises the data detector which is matched with the CPU to complete the abnormality detection of the input data of the digital-to-analog converter.
Description
Technical Field
The invention relates to the technical field of audio digital-to-analog converters, in particular to an input data abnormity detection method based on a DAC (digital-to-analog converter), an abnormity protection method, a data detector with an abnormal data detection function and a low-precision DAC system.
Background
The classical audio digital-to-analog converter is mainly Sigma-delta DAC and is widely applied in audio systems, but due to its complex circuit structure, the power consumption and area of digital circuit design are undoubtedly increased, the low-precision digital-to-analog converter can meet the requirements of general audio product applications, such as floor sweeping robots, doorbells, alarms and other products, the data source of the digital-to-analog converter in practical application is the result of system software processing, because there may be misoperation in the system software level or error factors of original audio data decoded by software, the data source sent to the digital-to-analog converter by the system software will present abnormal audio data like white noise, such error data will be processed by the internal circuit of the digital-to-analog converter due to lack of corresponding detection technical means, when the energy accumulated in short time for the data sent to the digital-to-analog converter exceeds a certain range, the current output by the power amplifier of the analog circuit in the digital-to-analog converter may be increased instantaneously, which may cause the power amplifier to overheat, and the chip may burn out without warning.
Disclosure of Invention
In order to solve the technical defects, the technical scheme discloses an abnormal detection method, a data detector and a system of DAC input data, which are applied to a sweeping robot, the technical scheme is a low-power-consumption and low-cost DAC design, the basic sound quality requirement of the sweeping robot can be met, the phenomenon that the whole machine of the sweeping robot is damaged can be avoided by detecting abnormal data design, and the specific technical scheme is as follows:
an abnormality detection method for input data based on a DAC, the abnormality detection method being applied to detecting input data of a digital-to-analog converter, the abnormality detection method comprising: according to the sequence of input data of the digital-to-analog converter, after the number of the input data reaches a preset detection counting threshold value, judging whether the number of zero crossing points in the input data is abnormal or not, and simultaneously judging whether the signal energy of the input data is abnormal or not; and if the two judgment results are both true, determining that the input data is abnormal. The technical scheme judges whether input data is abnormal or not by counting the zero crossing point and signal energy information accumulated in certain data, overcomes the influence of white noise randomly generated by data sent into a DAC, and avoids the serious consequence of chip damage caused by data abnormality; meanwhile, the complexity of the detection control logic of the DAC internal detection circuit is reduced.
Further, the method for judging whether the number of zero-crossing points in the input data is abnormal after the number of the input data reaches one preset detection counting threshold value comprises the following steps: counting a zero-crossing detection result of input data, and recording the counting result as a zero-crossing counting value; according to the sequence of the input data of the digital-to-analog converter, when the number of the input data of the digital-to-analog converter reaches a preset detection counting threshold value, judging whether a zero-crossing counting value is larger than a preset zero-crossing counting threshold value, and if so, determining that the number of zero-crossing points in the input data is abnormal; the preset zero-crossing count threshold is a pre-configured signal sampling number, is related to the sampling rate of the digital-to-analog converter, and is the number of zero-crossing points allowed by a normal signal input by the digital-to-analog converter. According to the technical scheme, normal zero crossing and abnormal zero crossing of input data are screened by counting a zero crossing detection result of the input data and setting a judgment threshold value, so that the abnormal number of zero crossing points in the input data is detected. The technical scheme detects the abnormal condition of input data from the angle of signal hopping frequency.
Further, the method for detecting the zero crossing of the input data of the digital-to-analog converter comprises the following steps: according to the sequence of the input data of the digital-to-analog converter, when two input data with different sign bits are detected, a zero crossing point is determined to exist between the two input data, namely the zero crossing of the input data of the digital-to-analog converter is detected.
Further, the method for determining whether the signal energy of the input data is abnormal after the number of the input data reaches one preset detection count threshold value includes: calculating the signal amplitude difference of two adjacent input data, counting the signal amplitude difference larger than a preset amplitude threshold value, and recording the counting result as an abnormal amplitude difference counting value, wherein the signal amplitude difference is the absolute value of the difference value of the two adjacent input data; according to the sequence of the input data of the digital-to-analog converter, when the number of the input data of the digital-to-analog converter reaches a preset detection counting threshold value, judging whether an abnormal amplitude difference counting value is larger than a preset amplitude difference counting value, and if so, determining that the signal energy of the input data is abnormal; the preset amplitude difference count value is the maximum count value of the data of the amplitude of the abnormal signal allowed to appear by the digital-to-analog converter and is configured in advance. According to the technical scheme, the influence of the factor that the amplitude of the signal is suddenly changed due to the abnormal error of the input data is considered, and the abnormal energy condition of the input data is detected by using the frequency of the abnormal change amplitude, so that the detection result is more comprehensive.
Further, the preset detection count threshold is the number of input data of the digital-to-analog converter in a preset detection period. The technical scheme is equivalent to limit the detection time and avoid burning out of the digital-to-analog converter due to energy accumulation.
An input data abnormity protection method based on DAC, the abnormity protection method comprises executing the abnormity detection method, after determining that the input data of the digital-to-analog converter is abnormal, sending an interrupt signal to an external CPU, and simultaneously controlling the digital-to-analog converter to stop processing the input data; after receiving the interrupt signal, the CPU changes a data source corresponding to input data of the digital-to-analog converter and reconfigures internal parameters of the digital-to-analog converter; then the digital-to-analog converter is restarted to continue inputting data, and the abnormality detection method is executed. The technical scheme shields the DAC input data in time, further prevents the sudden change of the signal amplitude of the input data, protects the DAC circuit more directly and rapidly, and effectively prevents a chip from being damaged.
A data detector with abnormal data detection function, the data detector is a detection function device of a digital-to-analog converter, the data detector comprises an input data counter, a zero-crossing abnormal judgment module, an energy abnormal judgment module and a data abnormal determination module; the input data counter is used for counting the number of input data of the digital-to-analog converter in a preset detection period; the zero-crossing abnormity judging module is used for judging whether the number of zero-crossing points in the input data is abnormal or not when the count value of the input data counter reaches a preset detection count threshold value; the energy abnormity judging module is used for judging whether the signal energy of the input data is abnormal or not when the counting value of the input data counter reaches a preset detection counting threshold value; and the data abnormity determining module is used for detecting the abnormal condition of the input data of the digital-to-analog converter according to the judgment results of the zero-crossing abnormity judging module and the energy abnormity judging module. The data detector provided by the technical scheme can detect the abnormal results of the abnormal zero crossing of the signal corresponding to the input data of the DAC and the overlarge amplitude change, so that the digital-to-analog converter shields the input data at a proper time, and timely instructs a related system module to take protective measures, thereby improving the reliability of the whole circuit.
Further, the zero-crossing abnormity judgment module comprises a zero-crossing judgment submodule, a zero-crossing counter and a first abnormity comparison submodule; wherein: the zero-crossing judgment submodule is used for receiving input data of the digital-to-analog converter, determining that a zero-crossing point exists between the two input data when the two input data with different sign bits are detected, namely detecting the zero-crossing of the input data, and outputting a zero-crossing detection result; the zero-crossing counter is used for counting according to the zero-crossing detection result of the zero-crossing judgment submodule and outputting a zero-crossing count value; the first anomaly comparison submodule is used for judging whether a zero-crossing count value output by the zero-crossing counter is greater than a preset zero-crossing count threshold value or not when the count value of the input data counter reaches one preset detection count threshold value, and if yes, determining that the number of zero-crossing points in the input data is abnormal; the preset zero-crossing count threshold is a pre-configured signal sampling number, is related to the sampling rate of the digital-to-analog converter, and is the number of zero-crossing points allowed by a normal signal input by the digital-to-analog converter. According to the technical scheme, a counter is used for counting a zero-crossing detection result of input data and comparing the zero-crossing detection result with a set judgment threshold value, so that normal zero-crossing and abnormal zero-crossing of the input data are screened, and the abnormal number of zero-crossing points in the input data is detected. The technical scheme detects the abnormal condition of input data from the angle of signal hopping frequency.
Further, the energy abnormity judgment module comprises an abnormity amplitude difference judgment submodule, an abnormity amplitude difference counter and a second abnormity comparison submodule; the abnormal amplitude difference judgment submodule is used for calculating the signal amplitude difference of two adjacent input data according to the sequence of the input data of the digital-to-analog converter, then judging whether the calculated signal amplitude difference is greater than a preset amplitude threshold value, if so, determining that the signal amplitude difference is abnormal, and outputting an amplitude difference abnormal detection result; the abnormal amplitude difference counter is used for counting according to the amplitude difference abnormal detection result output by the abnormal amplitude difference judgment submodule and outputting an abnormal amplitude difference counting value; the second anomaly comparison submodule judges whether the abnormal amplitude difference count value output by the abnormal amplitude difference counter is greater than a preset amplitude difference count value or not when the count value of the input data counter reaches one preset detection count threshold value, and determines that the signal energy of the input data is abnormal; wherein, the signal amplitude difference is the absolute value of the difference between two adjacent input data; the preset amplitude difference count value is the maximum count value of the data of the abnormal signal amplitude allowed to appear by the digital-to-analog converter and is configured in advance. According to the technical scheme, the influence factor of signal amplitude mutation caused by abnormal errors of input data is considered, and the abnormal condition of the input data is detected by using the frequency of the abnormal change amplitude, so that the detection result is more comprehensive.
Further, the preset detection count threshold is the number of input data of the digital-to-analog converter in a preset detection period. The technical scheme is equivalent to limit the detection time and avoid burning out of the digital-to-analog converter due to energy accumulation. The effectiveness of the detection is enhanced.
A DAC system, the DAC system comprising: DAC control logic module, asynchronous FIFO module and the data detector; the DAC control logic module is used for controlling the asynchronous FIFO module to read and write data input from the outside of the DAC system according to an output instruction of an external CPU; the asynchronous FIFO module is used for finishing the interaction of the data of the external clock domain of the DAC system and the data of the internal clock domain of the DAC system under the control of the DAC control logic module so as to transmit and input the normal digital signals into the data detector; the data detector is used for detecting the abnormal condition of the output data of the asynchronous FIFO module, and when the input data is determined to be abnormal, the data abnormity determining module in the data detector sends an interrupt signal to an external CPU, so that the DAC control logic module closes the asynchronous FIFO module and suspends the detection work of the data detector. The DAC system shields the input data at a proper time, so that the possibility of overlarge current is reduced, overcurrent protection is more direct, overlarge current can be effectively prevented, and the reliability of the whole circuit is improved. On the other hand, the DAC system only needs some simple control logic and asynchronous FIFO, registers, comparators and a small number of adders, and the architecture greatly reduces the hardware area and the design complexity.
Further, a data source of the DAC system comprises an external CPU and data and instructions stored by a DMA (direct memory access), and enters the DAC system through an APB (advanced peripheral bus); the DAC system also comprises a selector used for selecting data and instructions input by the CPU or the DMA. The technical scheme does not need a hardware circuit to process complex operations such as filtering, oversampling rate and signal modulation, thereby simplifying the logic structure of the circuit.
Further, the DAC system further comprises a CIC filter, a DAC digital-end circuit, and a DAC analog-end circuit, wherein: and the CIC filter is used for receiving the data output by the data detector and performing signal amplitude attenuation and interpolation processing on the data within a preset bandwidth so as to reduce the influence of abnormal data output by the data detector, which is an abnormal condition caused by the asynchronous FIFO module when the data detector outputs an interrupt signal and is not closed soon afterwards. The technical scheme reduces the occurrence probability of signal abnormal conditions to a certain extent; the CIC filter is an interpolation filter, so that the data sampling rate of the whole design can be improved, namely, the time domain waveform of the finally output audio signal is smoother, and the performance is further improved.
Drawings
Fig. 1 is a flowchart of an abnormality detection method for DAC-based input data according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a DAC system according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of a data detector with an abnormal data detection function according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention discloses an input data anomaly detection method based on a DAC (digital-to-analog converter), which is applied to detecting input data of the digital-to-analog converter, wherein the input data of the digital-to-analog converter comprises audio data; in practical application, a data source of the DAC is software, and data sent to the DAC by the data source includes abnormal audio data, such as white noise data, due to misoperation of the software or an error in original audio data decoded by the software.
It is noted that the DAC is a digital-analog hybrid integrated circuit. Although the whole DAC is designed with a plurality of protective measures, such as overcurrent protection of the PA and temperature detection of a chip, a current value which is about 2 times higher than a normal value due to data errors still occurs under the aforementioned conditions; furthermore, when the data supplied to the DAC contains white noise, since the white noise data is random and has sudden energy change, the amplitude of the sudden change of the data supplied to the DAC may cause the output voltage of the power amplifier PA to exceed 2V at worst, while the normal audio data changes more smoothly, typically not more than 1V. The input data anomaly detection method based on the DAC provided by the embodiment of the invention can exactly detect the condition of the sudden change of the signal amplitude, and a related system module is used for making protective measures. The abnormity detection method is applied to an audio system of the sweeping robot, the DAC design with low power consumption and low cost can be realized on the sweeping machine system, the basic sound quality requirement of the sweeping robot can be met, and the phenomenon that the whole sweeping machine is damaged can be avoided through detecting abnormal data design.
As an embodiment, as shown in fig. 1, the abnormality detection method includes:
step S101, counting data input into the digital-to-analog converter in real time according to the sequence of the input data of the digital-to-analog converter, and then entering step S102, or executing step S102 at the same time.
Step S102, carrying out zero-crossing detection on input data to obtain the number of zero-crossing points, meanwhile, calculating the signal amplitude difference of two adjacent input data in real time, and then entering step S103.
Step S103, counting the zero crossing points detected in the step S102 according to the sequence of the input data of the digital-to-analog converter, recording the zero crossing count values, and detecting the abnormal condition of the input data from the angle of the signal hopping frequency; meanwhile, according to the sequence of the input data of the digital-to-analog converter, the signal amplitude difference which is calculated in the step S102 and is larger than a preset amplitude threshold value is extracted through comparison and judgment, counted and recorded as an abnormal amplitude difference counting value, and then the step S104 is carried out; wherein, the signal amplitude difference is the absolute value of the difference between two adjacent input data.
And step S104, judging whether the count value of the input data of the digital-to-analog converter reaches a preset detection count threshold value, if so, entering step S105, otherwise, returning to step S101, and repeating the counting detection step. The preset detection count threshold is the number of input data of the digital-to-analog converter in a preset detection period. The step is equivalent to limit the detection time, and the digital-to-analog converter is prevented from being burnt out due to energy accumulation.
Step S105, determining whether the zero-crossing count value obtained by counting the zero-crossing point in step S103 is greater than a preset zero-crossing count threshold value, and simultaneously determining whether the abnormal amplitude difference count value obtained by counting in step S103 is greater than a preset amplitude difference count value, if both the determination conditions are met, entering step S106, otherwise, entering step S107. The step judges whether the input data is abnormal or not by counting the zero crossing point and the signal energy information accumulated in certain data, wherein the step counts whether the average energy in a certain period is abnormal or not by counting the number of times of amplitude abnormality in the certain period. Therefore, the influence of white noise randomly generated by data sent into the DAC is overcome, and the serious consequence of chip damage caused by data abnormity is avoided; meanwhile, the complexity of the detection control logic of the DAC internal detection circuit is reduced.
In step S105, the preset zero-crossing count threshold is a preconfigured number of signal samples, is related to the sampling rate of the dac, and is the number of zero-crossing points allowed by the normal signal input by the dac, for example, the sampling rate Fs =16KHz, and the Time is the number of zero-crossing points of the normal input signal, which can be regarded as the number of zero-crossing points of the normal input signal, after the count value of the input DATA of the dac reaches the preset detection count threshold, the preset zero-crossing count threshold DATA _ CNT _ THRESH = Fs × 1000 Time. Normal zero crossing and abnormal zero crossing of the input data are screened by counting the zero crossing detection result of the input data and setting a judgment threshold value, so that the abnormal number of zero crossing points in the input data is detected.
In step S105, the preset amplitude difference count value is the maximum count value of the data of the amplitude of the abnormal signal allowed to occur by the digital-to-analog converter, and is configured in advance. Step S105 considers the influence of the factor that the input data is abnormal and error causes abrupt change in signal amplitude, and detects the abnormal condition of the input data by using the frequency of occurrence of the abnormal change amplitude, so that the detection result is more comprehensive. Assuming that the present embodiment performs abnormal signal energy detection on 100 data input into the digital-to-analog converter, step S103 scans the signal amplitudes of two adjacent data from the 1 st to the 100 th, and calculates the signal amplitude difference of the two adjacent data in turn.
And step S106, determining that the input data of the digital-to-analog converter is abnormal, and understanding from the angle of the frequency spectrum characteristic of normal audio data that the input data of the digital-to-analog converter has abnormality in frequency and amplitude, namely, the signal jump abnormality and the signal amplitude abnormality.
And step S107, determining that the input data of the digital-to-analog converter is normal.
It is worth noting that the threshold value for comparison is set by simulating the performance and effect of the Matlab algorithm, and the purpose of detecting abnormal data is achieved on the premise of not affecting the normal application of the Matlab algorithm.
As an embodiment, when the count value of the number of input data reaches one of the preset detection count threshold values, the method for determining whether the number of zero-crossing points in the input data is abnormal includes: counting the zero-crossing detection result of the input data, and recording as a zero-crossing count value; when the number count value of the input data of the digital-to-analog converter reaches one preset detection count threshold value, judging whether the zero-crossing count value is greater than a preset zero-crossing count threshold value, and if so, determining that the number of zero-crossing points in the input data is abnormal; the preset zero-crossing counting threshold is a preset signal sampling number and is related to the preset detection counting threshold and the sampling rate of the digital-to-analog converter. In the embodiment, normal zero-crossing and abnormal zero-crossing of input data are screened by counting a zero-crossing detection result of the input data and setting a judgment threshold, wherein the number of the normal zero-crossing points is a preset zero-crossing counting threshold, so that the abnormal number of the zero-crossing points in the input data is detected. The embodiment detects the abnormal condition of the input data from the angle of the signal jump frequency.
Specifically, the method for detecting the zero crossing of the input data of the digital-to-analog converter comprises the following steps: when two input data with different sign bits are detected, a zero crossing point is determined to exist between the two input data, namely the zero crossing of the input data of the digital-to-analog converter is detected. It should be noted that if adjacent samples have different signs, they are called zero crossings, so that the number of zero crossings can be calculated, i.e. the number of times the sign is changed in this way. Because the signal transmitted to the DAC by the system software is data fixed into hexadecimal by decimal, and the highest bit represents the sign bit, it can directly judge whether the highest bit of the hexadecimal after fixed-point is different to judge the identification signal pulse, i.e. it sets X (n) as the nth sampling point, X (n +1) as the n +1 sampling point, X [ m-1] (n) represents the mth bit data of the nth sampling point, if the logical XOR result between the two sampling points satisfies X [ m-1] (n) and X [ m-1] (n +1) is 1, it is determined that a zero point exists between the two sampling data points, so that the number of zero-crossing points is simple to calculate, and the interference of low-frequency signals is overcome.
As an embodiment, after the number of input data reaches one preset detection count threshold, the method for determining whether the signal energy of the input data is abnormal includes: calculating the signal amplitude difference of two adjacent input data, counting the signal amplitude difference which is greater than a preset amplitude threshold value, and recording as an abnormal amplitude difference counting value, wherein the signal amplitude difference is the absolute value of the difference value of the two adjacent input data; according to the sequence of the input data of the digital-to-analog converter, when the number of the input data of the digital-to-analog converter reaches a preset detection counting threshold value, judging whether the abnormal amplitude difference counting value is larger than a preset amplitude difference counting value, and if so, determining that the signal amplitude of the input data is abnormal. In this embodiment, a preset amplitude difference count value is set to prevent misjudgment when the current is unstable and cause overcurrent protection malfunction, where the preset amplitude difference count value is a maximum count value of data of the amplitude of the abnormal signal allowed to occur by the digital-to-analog converter and is configured in advance. In the embodiment, the influence of the factor that the input data is abnormal and wrong to cause the sudden change of the signal amplitude is considered, and the abnormal energy condition of the input data is detected by using the frequency of the abnormal change amplitude, so that the detection result is more comprehensive.
On the basis of the foregoing anomaly detection method, another embodiment of the present invention provides an anomaly protection method for DAC-based input data, including: acquiring an abnormal state of input data of the DAC by performing the abnormality detection method; and after determining that the input data of the digital-to-analog converter is abnormal, sending an interrupt signal to an external CPU, simultaneously closing an enable signal of the DAC by a digital circuit with a related control function, and stopping the whole digital-to-analog converter from processing the input data.
After receiving the interrupt signal, the CPU indicates that the data sent into the digital-to-analog converter by the software has errors, so that the CPU sends an instruction to modify a data source corresponding to the input data of the digital-to-analog converter, namely the data sent into the digital-to-analog converter by the software, and reconfigures the internal parameters of the digital-to-analog converter; then the digital-to-analog converter is restarted to continue inputting data, and the abnormality detection method is executed. The embodiment shields the DAC input data when the data are abnormal, reduces the possibility of sudden change of the signal amplitude of the input data, can timely process the abnormal condition by the DAC circuit, has small delay time and sensitive response, ensures that the DAC circuit is more directly protected, and avoids the serious consequence of chip damage caused by abnormal data.
In order to better understand and appreciate the advantages of the above method of the present invention, a test embodiment is provided, wherein the preset detection count threshold is set to 0x100, the preset amplitude threshold is set to 0x3ff, the preset amplitude difference count value is set to 0x3f, and the preset zero crossing count threshold is set to 0 xff. By executing the abnormality detection method, after the number of input data of the digital-to-analog converter reaches 0x100, when the number of the signal amplitude difference of two adjacent data is detected to be larger than 0x3ff and exceeds 0x3f, and the number of zero-crossing points in the input data exceeds 0xff, the digital-to-analog converter sends an interrupt signal DAC _ INT to an external CPU, an enable signal of the DAC is turned off, and the output end of a digital circuit of the digital-to-analog converter is 0. And when the internal switch of the circuit turns on the enable signal DACEN of the DAC again, starting the next data code stream transmission.
The embodiment of the invention provides a data detector with an abnormal data detection function, which is used as a detection function device of a digital-to-analog converter, wherein the abnormal amplitude value and the energy value can be completely detected in the digital circuit design of a DAC. As shown in fig. 3, the data detector includes an input data counter, a zero-crossing abnormality determining module, an energy abnormality determining module, and a data abnormality determining module; the input data counter is used for counting the number of input data of the digital-to-analog converter in a preset detection period and counting the number of data transmitted to the data detector by the asynchronous FIFO module; the zero-crossing abnormity judging module is used for judging whether the number of zero-crossing points in the data transmitted to the data detector by the asynchronous FIFO module is abnormal or not after the count value of the input data counter reaches a preset detection count threshold value; the energy abnormity judging module is used for judging whether signal energy corresponding to data transmitted to the data detector by the asynchronous FIFO module is abnormal or not after the count value of the input data counter reaches a preset detection count threshold value; and the data abnormity determining module is used for detecting the abnormal condition of the input data of the digital-to-analog converter according to the judgment results of the zero-crossing abnormity judging module and the energy abnormity judging module, then sending the abnormal condition to the CPU, sending a command to the DAC control logic module by the CPU, and enabling the DAC control logic module to control the on-off of the data transmitted to the data detector by the asynchronous FIFO module. The data detector provided by the embodiment of the invention can detect the abnormal results of the abnormal zero crossing of the signal corresponding to the input data of the DAC and the overlarge amplitude change, so that the digital-to-analog converter can shield the zero crossing point of the input abnormal data such as white noise at a proper time, and timely instruct a related system module to take protective measures, thereby improving the reliability of the whole circuit.
Specifically, as shown in fig. 3, the zero-crossing abnormality determining module includes a zero-crossing determining submodule, a zero-crossing counter and a first abnormality comparing submodule; wherein: the zero-crossing judgment submodule is used for receiving the input data of the digital-to-analog converter and detecting the input data according to the input sequence of the digital-to-analog converter, when two input data with different sign bits are detected, a zero-crossing point exists between the two input data, namely the zero-crossing of the input data is detected, and a zero-crossing detection result is output; the zero-crossing counter is used for counting according to the zero-crossing detection result of the zero-crossing judgment submodule and outputting a zero-crossing count value; the first anomaly comparison submodule is used for judging whether a zero-crossing count value output by the zero-crossing counter is greater than a preset zero-crossing count threshold value or not after the count value of the input data counter reaches one preset detection count threshold value, and if yes, determining that the number of zero-crossing points in the input data is abnormal; the preset zero-crossing count threshold is a pre-configured signal sampling number, is related to the sampling rate of the digital-to-analog converter, and is the number of zero-crossing points allowed by a normal signal input by the digital-to-analog converter. The embodiment of the invention detects the abnormal condition of the input data from the angle of the signal hopping frequency, particularly uses a counter to count the zero-crossing detection result of the input data, and compares the zero-crossing detection result with the set judgment threshold value, thereby screening the normal zero-crossing and the abnormal zero-crossing of the input data and simultaneously detecting the abnormal number of the zero-crossing points in the input data.
Specifically, as shown in fig. 3, the energy anomaly determination module includes an anomaly amplitude difference determination submodule, an anomaly amplitude difference counter and a second anomaly comparison submodule; the abnormal amplitude difference judgment submodule is used for calculating the signal amplitude difference of two adjacent input data according to the sequence of the input data of the digital-to-analog converter, then judging whether the calculated signal amplitude difference is greater than a preset amplitude threshold value, if so, determining that the signal amplitude difference is abnormal, and outputting an amplitude difference abnormal detection result; the abnormal amplitude difference counter is used for counting according to the amplitude difference abnormal detection result output by the abnormal amplitude difference judgment submodule and outputting an abnormal amplitude difference counting value; the second anomaly comparison submodule judges whether the abnormal amplitude difference counting value output by the abnormal amplitude difference counter is larger than the preset amplitude difference counting value or not after the counting value of the input data counter reaches one preset detection counting threshold value, and determines that the signal energy of the input data is abnormal; wherein, the signal amplitude difference is the absolute value of the difference between two adjacent input data; the preset amplitude difference count value is the maximum count value of the data of the abnormal signal amplitude allowed to appear by the digital-to-analog converter and is configured in advance. In the embodiment of the invention, the influence factor of signal amplitude mutation caused by abnormal error of input data is considered, the abnormal energy condition of the input data is detected by using the frequency of abnormal change amplitude, namely, whether the average energy in a certain period is abnormal or not is counted by counting the frequency of amplitude abnormality in the certain period, so that the detection result is more comprehensive.
It should be noted that the data detector may execute an optional technical solution of the above-mentioned abnormality detection method and abnormality protection method, which includes all the contents of the abnormality detection method provided in the foregoing embodiment, and the same contents are not described herein again. The preset detection count threshold is the number of input data of the digital-to-analog converter in a preset detection period. The embodiment is equivalent to limiting the detection time, and avoids burning out of the digital-to-analog converter due to energy accumulation, thereby enhancing the detection effectiveness.
On the basis of the foregoing data detector, there is provided a DAC system, as shown in fig. 2, comprising: DAC control logic module, asynchronous FIFO module and the data detector; the DAC control logic module is used for controlling the asynchronous FIFO module to read and write data input from the outside of the DAC system according to an output instruction of an external CPU; the asynchronous FIFO module is used for finishing the interaction of the data of the external clock domain of the DAC system and the data of the internal clock domain of the DAC system under the control of the DAC control logic module so as to normally transmit and input the digital signals to the data detector; the data detector is used for detecting the abnormal condition of the output data of the asynchronous FIFO module, and when the input data is determined to be abnormal, the data abnormity determining module in the data detector sends an interrupt signal to an external CPU, so that the DAC control logic module closes the asynchronous FIFO module and suspends the detection work of the data detector. The DAC system only needs some simple control logics and asynchronous FIFOs, registers, comparators and a small number of adders, and the architecture greatly reduces the hardware area and the design complexity. The data detector helps the DAC system to shield input data at a proper time, so that the possibility of overlarge current is reduced, overcurrent protection is more direct, overlarge current can be effectively prevented, and the reliability of the whole circuit is improved.
It should be noted that the DAC system provided in this embodiment belongs to a low-precision DAC digital-to-analog converter, and can meet the requirements of general audio product applications, such as floor-sweeping robots, doorbells, alarms, and other products, and the DAC system is mainly configured with play instruction data in advance by software, and stores the play instruction data in a Memory Buffer as a data source of the DAC. In this embodiment, the data source of the DAC system includes data and instructions stored by an external CPU and a DMA, and enters the DAC system through an APB bus; the DAC system also comprises a selector used for selecting data and instructions input by the CPU or the DMA.
In the embodiment of the invention, data stored by a CPU or a DMA is sent to the asynchronous FIFO module through an APB bus protocol without a hardware circuit for processing complex operations such as filtering, oversampling rate, modulation signals and the like, wherein the DAC control logic module, the asynchronous FIFO module and register read-write control signals, register read-write values, addresses and the like related to the inside of the data detector are all controlled by the APB bus. However, the design of the DAC still has a certain risk that once the energy accumulated in the data sent to the DAC digital circuit by software in a short time exceeds a certain range, the current output by the DAC analog circuit is increased momentarily, and the whole chip is damaged. Therefore, the embodiment of the invention adopts the data detector to detect the abnormal data and feeds back a signal to the CPU to take protective measures. Thereby simplifying the circuit logic structure.
As shown in fig. 2, the DAC system further includes a CIC filter, a DAC digital-end circuit, and a DAC analog-end circuit, wherein: and the CIC filter is used for receiving the data output by the data detector and performing signal amplitude attenuation processing on the data within a preset bandwidth so as to reduce the influence of abnormal data output by the data detector, which is an abnormal condition caused by the asynchronous FIFO module when the data detector outputs an interrupt signal and is not closed soon afterwards. The CIC filter is an interpolation filter, so that the data sampling rate of the whole design can be improved, namely, the time domain waveform of the finally output audio signal is smoother, and the performance is further improved. A first-order compensation filter is added behind a CIC filter in a Sigma-delta DAC framework which is generally suitable for audio products to compensate the amplitude attenuation of an audio signal within 20 Hz-22 KH, but the design is different from the existing Sigma-delta DAC design, although the CIC filter design is also added, no compensation filter is added, and the reason is that: the DAC system of the embodiment is only applied to products with low requirements on audio signals and even single frequency points, the concerned bandwidth is very small, such as 20 Hz-4 KHz, the amplitude attenuation caused by the CIC filter in the bandwidth range has little influence on normal audio signals, the DAC application requirements with low performance requirements and small audio band range can be completely met, meanwhile, the whole DAC system has low requirements on processing speed, and the loss of power devices is reduced. The time domain waveform output by the CIC filter is smoother, and the system conversion performance can be further improved.
The internal circuit structure of the CIC filter provided by the embodiment of the invention mainly comprises an integrator and a filter, when the amplitude of data sent by the asynchronous FIFO module is too large or wrong, the CIC filter can attenuate the data within a certain amplitude within a passband range, the condition that the data with the too large amplitude is sent to a DAC analog-end circuit is prevented, abnormal data with different amplitudes possibly occurring can be attenuated, and the probability of overcurrent possibly generated by a rear-stage analog circuit is reduced to a certain extent.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
Claims (13)
1. An abnormality detection method for input data based on a DAC, the abnormality detection method being applied to detect input data of a digital-to-analog converter, the abnormality detection method comprising:
counting real-time input data according to the sequence of the input data of the digital-to-analog converter, judging whether the number of zero crossing points in the input data is abnormal or not when the number counting value of the input data reaches a preset detection counting threshold value, and simultaneously judging whether the signal energy of the input data is abnormal or not;
and if the two judgment results are both true, determining that the input data is abnormal.
2. The abnormality detection method according to claim 1, wherein said method of determining whether the number of zero-crossing points in the input data is abnormal when the count value of the number of input data reaches one of said preset detection count threshold values is:
counting a zero-crossing detection result of input data, and recording the counting result as a zero-crossing counting value;
when the number count value of the input data of the digital-to-analog converter reaches one preset detection count threshold value, judging whether the zero-crossing count value is greater than a preset zero-crossing count threshold value, and if so, determining that the number of zero-crossing points in the input data is abnormal;
the preset zero-crossing counting threshold is a preset signal sampling number and is related to the preset detection counting threshold and the sampling rate of the digital-to-analog converter.
3. The abnormality detection method according to claim 2, wherein the method of detecting zero-crossings of input data to the digital-to-analog converter includes:
when two input data different in sign bit are detected, it is determined that a zero-crossing point exists between the two input data of the digital-to-analog converter.
4. The abnormality detection method according to claim 1, wherein said determining whether the signal energy of the input data is abnormal when the count value of the number of input data reaches one of said preset detection count threshold values is performed by:
calculating the signal amplitude difference of two adjacent input data, counting the signal amplitude difference larger than a preset amplitude threshold value, and recording the counting result as an abnormal amplitude difference counting value, wherein the signal amplitude difference is the absolute value of the difference value of the two adjacent input data;
when the number count value of the input data of the digital-to-analog converter reaches one preset detection count threshold value, judging whether the abnormal amplitude difference count value is larger than a preset amplitude difference count value, and if so, determining that the signal energy of the input data is abnormal;
the preset amplitude difference count value is the maximum count value of the data of the amplitude of the abnormal signal allowed to appear by the digital-to-analog converter and is configured in advance.
5. The anomaly detection method according to any one of claims 1 to 4, wherein said preset detection count threshold is the number of input data of said digital-to-analog converter within a preconfigured detection period.
6. An anomaly protection method for input data based on a DAC, the anomaly protection method comprising:
executing the abnormality detection method according to any one of claims 1 to 5, sending an interrupt signal to an external CPU after determining that input data of the digital-to-analog converter is abnormal, and controlling the digital-to-analog converter to stop processing the input data;
after receiving the interrupt signal, the CPU changes a data source corresponding to input data of the digital-to-analog converter and reconfigures internal parameters of the digital-to-analog converter;
then restarting the digital-to-analog converter to continue inputting data and performing the abnormality detection method of any one of claims 1 to 5.
7. A data detector with abnormal data detection function is characterized in that the data detector is used as a detection function device of a digital-to-analog converter and comprises an input data counter, a zero-crossing abnormality judgment module, an energy abnormality judgment module and a data abnormality determination module;
the input data counter is used for counting the number of input data of the digital-to-analog converter in a preset detection period;
the zero-crossing abnormity judging module is used for judging whether the number of zero-crossing points in the input data is abnormal or not when the count value of the input data counter reaches a preset detection count threshold value;
the energy abnormity judging module is used for judging whether the signal energy of the input data is abnormal or not when the counting value of the input data counter reaches a preset detection counting threshold value;
and the data abnormity determining module is used for detecting the abnormal condition of the input data of the digital-to-analog converter according to the judgment results of the zero-crossing abnormity judging module and the energy abnormity judging module.
8. The data detector of claim 7, wherein the zero crossing anomaly determination module comprises a zero crossing determination submodule, a zero crossing counter and a first anomaly comparison submodule; wherein:
the zero-crossing judgment submodule is used for receiving the input data of the digital-to-analog converter, determining that a zero-crossing point exists between the two input data of the digital-to-analog converter when two input data with different sign bits are detected, and outputting a zero-crossing detection result;
the zero-crossing counter is used for counting according to the zero-crossing detection result of the zero-crossing judgment submodule and outputting a zero-crossing count value;
the first anomaly comparison submodule is used for judging whether a zero-crossing count value output by the zero-crossing counter is greater than a preset zero-crossing count threshold value or not when the count value of the input data counter reaches one preset detection count threshold value, and if yes, determining that the number of zero-crossing points in the input data is abnormal;
the preset zero-crossing count threshold is a pre-configured signal sampling number, is related to the sampling rate of the digital-to-analog converter, and is the number of zero-crossing points allowed by a normal signal input by the digital-to-analog converter.
9. The data detector of claim 7, wherein the energy anomaly determination module comprises an anomaly magnitude difference determination submodule, an anomaly magnitude difference counter and a second anomaly comparison submodule;
the abnormal amplitude difference judgment submodule is used for calculating the signal amplitude difference of two adjacent input data according to the sequence of the input data of the digital-to-analog converter, then judging whether the calculated signal amplitude difference is greater than a preset amplitude threshold value, if so, determining that the signal amplitude difference is abnormal, and outputting an amplitude difference abnormal detection result;
the abnormal amplitude difference counter is used for counting according to the amplitude difference abnormal detection result output by the abnormal amplitude difference judgment submodule and outputting an abnormal amplitude difference counting value;
the second anomaly comparison submodule judges whether the abnormal amplitude difference count value output by the abnormal amplitude difference counter is greater than a preset amplitude difference count value or not when the count value of the input data counter reaches one preset detection count threshold value, and determines that the signal energy of the input data is abnormal;
wherein, the signal amplitude difference is the absolute value of the difference between two adjacent input data; the preset amplitude difference count value is the maximum count value of the data of the abnormal signal amplitude allowed to appear by the digital-to-analog converter and is configured in advance.
10. The abnormality detection method according to any one of claims 7 to 9, wherein said preset detection count threshold is the number of input data of said digital-to-analog converter in a preconfigured detection period.
11. A DAC system, comprising: a DAC control logic module, an asynchronous FIFO module, and the data detector of any of claims 7 to 10;
the DAC control logic module is used for controlling the asynchronous FIFO module to read and write data input from the outside of the DAC system according to an output instruction of an external CPU;
the asynchronous FIFO module is used for finishing the interaction of the data of the external clock domain of the DAC system and the data of the internal clock domain of the DAC system under the control of the DAC control logic module so as to normally transmit and input the digital signals to the data detector;
the data detector is used for detecting the abnormal condition of the output data of the asynchronous FIFO module, and when the input data is determined to be abnormal, the data abnormity determining module in the data detector sends an interrupt signal to an external CPU, so that the DAC control logic module closes the asynchronous FIFO module and suspends the detection work of the data detector.
12. The DAC system of claim 11 wherein the data sources of the DAC system include external CPU and DMA stored data and instructions and enter the DAC system through the APB bus;
the DAC system also comprises a selector used for selecting data and instructions input by the CPU or the DMA.
13. The DAC system of claim 11 further comprising a CIC filter, a DAC digital side circuit, and a DAC analog side circuit, wherein:
and the CIC filter is used for receiving the data output by the data detector and performing signal amplitude attenuation and interpolation processing on the data in a preset bandwidth.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911039629.6A CN110798213B (en) | 2019-10-29 | 2019-10-29 | Abnormality detection method, abnormality protection method, data detector, and DAC system |
| PCT/CN2020/110687 WO2021082658A1 (en) | 2019-10-29 | 2020-08-24 | Abnormality detection method, abnormality protection method, data detector, and dac system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911039629.6A CN110798213B (en) | 2019-10-29 | 2019-10-29 | Abnormality detection method, abnormality protection method, data detector, and DAC system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110798213A true CN110798213A (en) | 2020-02-14 |
| CN110798213B CN110798213B (en) | 2022-06-10 |
Family
ID=69442038
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911039629.6A Active CN110798213B (en) | 2019-10-29 | 2019-10-29 | Abnormality detection method, abnormality protection method, data detector, and DAC system |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN110798213B (en) |
| WO (1) | WO2021082658A1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112165752A (en) * | 2020-09-08 | 2021-01-01 | 杭州涂鸦信息技术有限公司 | Method and system for adjusting abnormal zero signals of single-fire dimming double-control switch |
| WO2021082658A1 (en) * | 2019-10-29 | 2021-05-06 | 珠海市一微半导体有限公司 | Abnormality detection method, abnormality protection method, data detector, and dac system |
| US20220311398A1 (en) * | 2021-03-24 | 2022-09-29 | Kabushiki Kaisha Toshiba | Isolation amplifier and anomaly state detection device |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140146918A1 (en) * | 2012-11-27 | 2014-05-29 | Broadcom Corporation | Detection and Mitigation of an Abnormal Signal Condition Within a Power Amplifier (PA) |
| CN103916754A (en) * | 2012-12-31 | 2014-07-09 | 广州励丰文化科技股份有限公司 | Active loudspeaker based on multi-DSP system |
| CN107464552A (en) * | 2017-08-24 | 2017-12-12 | 徐银海 | A kind of distributed locomotive active noise reduction system and method |
| CN108492837A (en) * | 2018-03-23 | 2018-09-04 | 腾讯音乐娱乐科技（深圳）有限公司 | Detection method, device and the storage medium of audio burst white noise |
| CN109218915A (en) * | 2018-09-05 | 2019-01-15 | 厦门傅里叶电子有限公司 | Digital power amplifier chip and its direct current protecting method with direct current protecting function |
| CN109298700A (en) * | 2018-11-16 | 2019-02-01 | 湖南省湘电试验研究院有限公司 | A kind of method and system of real-time judge thermal power unit operation abnormal parameters variation |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7359853B2 (en) * | 2005-02-11 | 2008-04-15 | Clyde Holmes | Method and system for low bit rate voice encoding and decoding applicable for any reduced bandwidth requirements including wireless |
| CN105071810B (en) * | 2015-07-16 | 2018-04-20 | 南京邮电大学 | Successive approximation modulus conversion circuit based on signal autocorrelation |
| CN109994127B (en) * | 2019-04-16 | 2021-11-09 | 腾讯音乐娱乐科技（深圳）有限公司 | Audio detection method and device, electronic equipment and storage medium |
| CN110798213B (en) * | 2019-10-29 | 2022-06-10 | 珠海一微半导体股份有限公司 | Abnormality detection method, abnormality protection method, data detector, and DAC system |
-
2019
- 2019-10-29 CN CN201911039629.6A patent/CN110798213B/en active Active
-
2020
- 2020-08-24 WO PCT/CN2020/110687 patent/WO2021082658A1/en active Application Filing
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140146918A1 (en) * | 2012-11-27 | 2014-05-29 | Broadcom Corporation | Detection and Mitigation of an Abnormal Signal Condition Within a Power Amplifier (PA) |
| CN103916754A (en) * | 2012-12-31 | 2014-07-09 | 广州励丰文化科技股份有限公司 | Active loudspeaker based on multi-DSP system |
| CN107464552A (en) * | 2017-08-24 | 2017-12-12 | 徐银海 | A kind of distributed locomotive active noise reduction system and method |
| CN108492837A (en) * | 2018-03-23 | 2018-09-04 | 腾讯音乐娱乐科技（深圳）有限公司 | Detection method, device and the storage medium of audio burst white noise |
| CN109218915A (en) * | 2018-09-05 | 2019-01-15 | 厦门傅里叶电子有限公司 | Digital power amplifier chip and its direct current protecting method with direct current protecting function |
| CN109298700A (en) * | 2018-11-16 | 2019-02-01 | 湖南省湘电试验研究院有限公司 | A kind of method and system of real-time judge thermal power unit operation abnormal parameters variation |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021082658A1 (en) * | 2019-10-29 | 2021-05-06 | 珠海市一微半导体有限公司 | Abnormality detection method, abnormality protection method, data detector, and dac system |
| CN112165752A (en) * | 2020-09-08 | 2021-01-01 | 杭州涂鸦信息技术有限公司 | Method and system for adjusting abnormal zero signals of single-fire dimming double-control switch |
| CN112165752B (en) * | 2020-09-08 | 2023-04-07 | 杭州涂鸦信息技术有限公司 | Method and system for adjusting abnormal zero signals of single-fire dimming double-control switch |
| US20220311398A1 (en) * | 2021-03-24 | 2022-09-29 | Kabushiki Kaisha Toshiba | Isolation amplifier and anomaly state detection device |
| US11979122B2 (en) * | 2021-03-24 | 2024-05-07 | Kabushiki Kaisha Toshiba | Isolation amplifier and anomaly state detection device |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2021082658A1 (en) | 2021-05-06 |
| CN110798213B (en) | 2022-06-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110798213B (en) | Abnormality detection method, abnormality protection method, data detector, and DAC system | |
| JP2621614B2 (en) | Code error detection circuit | |
| CN1091552C (en) | Glitch suppressor circuit and method | |
| US8681853B2 (en) | Pulse density modulation method and apparatus | |
| WO2010032226A2 (en) | Data processing system comprising a monitor | |
| CN112462160A (en) | Clock surge detection circuit | |
| JP2707778B2 (en) | Noise removal circuit | |
| EP3716482A1 (en) | Digital noise filter | |
| KR20020053267A (en) | Glitch masking method for switching signal and apparatus thereof | |
| US6993544B2 (en) | Limit-cycle oscillation suppression method, system, and computer program product | |
| JPH04175917A (en) | Noise removing circuit | |
| US20230393923A1 (en) | Programmable fault violation filter | |
| KR970004359B1 (en) | Analog input interface device of the current, voltage signal of digital protection relay | |
| KR100392337B1 (en) | A circuits for generating minimum on/of pulse width | |
| JPH06101666B2 (en) | Adaptive noise eliminator | |
| WO2023235569A1 (en) | Programmable fault violation filter | |
| CN115963812A (en) | Instruction signal dislocation detection method and device and restoration method and device | |
| US5774853A (en) | Serial interface speech synthesizers | |
| SU1589314A1 (en) | Device for coding sound signals in frequency domain | |
| CN113258531A (en) | Method for solving protection misoperation caused by abnormal large number based on floating threshold | |
| JPH04315228A (en) | Microcomputer | |
| TWI235552B (en) | Slope-controlled self-adaptive threshold generator | |
| JPH0923148A (en) | Control circuit for simultaneous operation | |
| JPS6269120A (en) | Signal processing system | |
| JPH06196966A (en) | Moving average filter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: 519000 2706, No. 3000, Huandao East Road, Hengqin new area, Zhuhai, Guangdong Applicant after: Zhuhai Yiwei Semiconductor Co.,Ltd. Address before: Room 105-514, No.6 Baohua Road, Hengqin New District, Zhuhai City, Guangdong Province Applicant before: AMICRO SEMICONDUCTOR Co.,Ltd. |
|
| CB02 | Change of applicant information | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |