CN110768661A - Phase-locked amplifier based on neural network - Google Patents

Phase-locked amplifier based on neural network Download PDF

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CN110768661A
CN110768661A CN201911001982.5A CN201911001982A CN110768661A CN 110768661 A CN110768661 A CN 110768661A CN 201911001982 A CN201911001982 A CN 201911001982A CN 110768661 A CN110768661 A CN 110768661A
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signal
digital
neural network
analog
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CN110768661B (en
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秦熙
张闻哲
朱明东
王淋
荣星
杜江峰
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University of Science and Technology of China USTC
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/06Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop

Abstract

The application discloses a phase-locked amplifier based on a neural network, wherein a reference signal module generates a reference signal representing a signal generated by a system to be tested in a stable state according to a received input excitation signal, and the reference signal and the signal to be tested generated by the system to be tested according to the excitation signal are subjected to differential cancellation in an analog front-end module, so that only a useful signal generated due to the change of the system to be tested is left, the suppression of the power fluctuation of an excitation signal source is realized, the occupation ratio of the useful signal in a total analog input signal is improved, and the signal-to-noise ratio of the phase-locked amplifier based on the neural network is improved; in addition, the digital back-end module of the phase-locked amplifier also comprises a configured neural network, and the neural network identifies and removes the noise in the passband of the intermediate signal so as to realize the suppression of the noise in the bandwidth range of the phase-locked amplifier based on the neural network.

Description

Phase-locked amplifier based on neural network
Technical Field
The application relates to the technical field of signal measurement devices, in particular to a phase-locked amplifier based on a neural network.
Background
A Lock-in Amplifier (LIA), also called a phase detector, is a test and measurement instrument for detecting weak signals. In the detection process of weak signals, signals are often submerged in noise, and the phase-locked amplifier utilizes the characteristic that the detected signals are irrelevant to the noise and carries out relevant operation on the collected signals and the reference signals, so that the noise is suppressed, and the signal-to-noise ratio of the detected signals is improved. The lock-in amplifier can measure weak signals, so that the lock-in amplifier can be widely applied to the fields of atomic force microscopes, quantum computation, quantum measurement, medical detection and the like.
The phase-locked amplifier is generally divided into an analog phase-locked amplifier and a digital phase-locked amplifier, wherein the analog phase-locked amplifier uses an analog device to realize the core operation function of the phase-locked amplifier; the digital phase-locked amplifier digitizes the input waveform by using an analog-to-digital conversion circuit, and then processes the acquired digitized waveform by using chips such as a DSP, an FPGA and the like or upper computer software, thereby realizing operations such as multiplication, filtering and the like in a digital domain.
However, whether it is an analog lock-in amplifier or a digital lock-in amplifier, it is difficult to remove noise signals mixed in the signal bandwidth, and for the measurement of the input signal, the full-amplitude input signal is directly measured, not the part of the input signal reflecting the system change, which makes the amplitude change of the input signal brought by the small system change not well detected, so that the signal-to-noise ratio of the lock-in amplifier is low.
Disclosure of Invention
In order to solve the above technical problem, the present application provides a phase-locked amplifier based on a neural network, so as to achieve the purposes of removing noise signals aliased within a signal bandwidth range and improving the signal-to-noise ratio of the phase-locked amplifier.
In order to achieve the technical purpose, the embodiment of the application provides the following technical scheme:
a neural network based lock-in amplifier comprising: the device comprises a reference signal module, an analog front-end module, an analog-to-digital conversion module and a digital rear-end module; wherein the content of the first and second substances,
the digital back end module is used for receiving excitation signal configuration information transmitted by an upper computer and generating a digital data code of an excitation signal according to the excitation signal configuration information; the device comprises a neural network, a digital input signal processing unit, a signal processing unit and a signal processing unit, wherein the neural network is used for carrying out quadrature demodulation and first filtering processing on the digital input signal so as to remove noise outside a pass band in the digital input signal and obtain an intermediate signal, and the neural network is configured to identify and remove noise inside the pass band of the intermediate signal so as to obtain a target signal;
the analog-to-digital conversion module is used for converting the digital data code of the excitation signal into an excitation signal in an analog signal form; and for analog-to-digital converting an analog input signal to obtain said digital input signal;
the analog front-end module is used for carrying out first preprocessing on the excitation signal in the analog signal form so as to obtain an input excitation signal meeting the requirements of a system to be tested and the reference signal module; the analog-to-digital conversion module is used for carrying out cancellation processing and second preprocessing on a signal to be detected and a reference signal so as to generate the analog input signal meeting the working requirement of the analog-to-digital conversion module;
and the reference signal module is used for receiving the input excitation signal and generating the reference signal representing the signal generated by the system to be tested in the stable state according to the input excitation signal.
Optionally, the reference signal module includes: the device comprises a multiplexer, a grounding unit, a reference system and a gain bias phase adjusting circuit; wherein the content of the first and second substances,
the multiplexer comprises three input ends, the three input ends are respectively connected with the output ends of the grounding unit, the reference system and the gain bias phase adjusting circuit and used for determining one of a grounding unit output signal, a reference system output signal and a gain bias phase adjusting circuit output signal as the output signal according to a first selection instruction of the upper computer;
the grounding unit is used for providing a grounding voltage to bypass the reference signal module;
the gain bias phase adjusting circuit is used for adjusting the excitation signal to obtain an output signal of the gain bias phase adjusting circuit;
and the reference system is used for receiving the output signal of the gain bias phase adjusting circuit and determining a reference system output signal representing a signal generated by the system to be tested in a stable state according to the output signal of the gain bias phase adjusting circuit.
Optionally, the analog front end module includes: a differential input unit and an output drive unit, wherein,
the differential input unit is used for carrying out cancellation processing on a signal to be detected and a reference signal, and carrying out amplitude and bias adjustment and bandwidth limitation on the signal subjected to the cancellation processing so as to obtain the analog input signal meeting the working requirement of the analog-to-digital conversion module;
the output driving unit is used for driving the waveform of the excitation signal in the form of the digital signal and limiting the waveform bandwidth of the excitation signal in the form of the digital signal so as to generate the input excitation signal meeting the requirements of the system to be tested and the reference signal module.
Optionally, the digital back-end module includes a system control unit, an artificial intelligence signal processing unit, a first multiplier, a second multiplier, a direct digital synthesizer, a first digital low-pass filter, and a second digital low-pass filter, wherein,
the system control unit is used for receiving excitation signal configuration information transmitted by an upper computer and transmitting the excitation signal configuration information to the direct digital synthesizer;
the direct digital synthesizer is used for generating a first signal and a second signal which are orthogonal according to the excitation signal configuration information, wherein the first signal is a digital data code of the excitation signal;
the first multiplier is used for performing product operation on the digital input signal and the second signal and then performing filtering processing on the digital input signal and the second signal by using the first digital low-pass filter to obtain a first sub-signal;
the second multiplier is configured to perform a product operation on the digital input signal and the first signal, and then perform filtering processing on the digital input signal and the first signal by using the second digital low-pass filter to obtain a second sub-signal, where the first sub-signal and the second sub-signal form the intermediate signal;
the artificial intelligence signal processing unit is provided with a neural network configured by the upper computer and used for identifying and removing the noise in the pass band of the first sub-signal and the second sub-signal by using the neural network so as to obtain a target signal comprising a first target sub-signal and a second target sub-signal.
Optionally, the artificial intelligence signal processing unit further comprises a network parameter register, a phase calculation unit and an amplitude calculation unit, wherein,
the network parameter register stores a plurality of neural network parameters corresponding to different types of signals, so that the upper computer determines the neural network parameters used by the neural network in the network parameter register in the configuration process;
the phase calculation unit is used for calculating a phase angle of the target signal;
the amplitude calculating unit is used for calculating the amplitude of the target signal.
Optionally, the phase calculation unit is specifically configured to perform ratio operation and arc tangent operation on the first target sub-signal and the second target sub-signal to obtain a phase angle of the target signal.
Optionally, the amplitude calculating unit is configured to perform square and square operation on the first target sub-signal and the second target sub-signal to obtain the amplitude of the target signal.
Optionally, the system control unit is further configured to transmit the target signal, the phase angle of the target signal, and the amplitude of the target signal to the upper computer for display.
Optionally, the system control unit is further configured to store the neural network parameters input by the upper computer in the network parameter register according to a new instruction input by the upper computer; and the neural network parameter register is used for reading the neural network parameters stored in the network parameter register according to a reading instruction input by the upper computer and transmitting the neural network parameters to the upper computer.
Optionally, the analog-to-digital conversion module includes: an analog-to-digital conversion circuit and a digital-to-analog conversion circuit; wherein the content of the first and second substances,
the digital-to-analog conversion circuit is used for converting the digital data code of the excitation signal into an excitation signal in the form of an analog signal;
the analog-to-digital conversion circuit is used for performing analog-to-digital conversion on the analog input signal to obtain the digital input signal.
It can be seen from the foregoing technical solutions that, in the phase-locked amplifier based on the neural network, a reference signal module generates, according to a received input excitation signal, a reference signal representing a signal generated in a stable state of a system to be tested, and a differential cancellation is performed on the reference signal and a signal to be tested generated by the system to be tested according to the excitation signal in an analog front-end module, so that only a useful signal generated due to a change of the system to be tested is left, power fluctuation of an excitation signal source is suppressed, a ratio of the useful signal in a total analog input signal is increased, and a signal-to-noise ratio of the phase-locked amplifier based on the neural network is increased; in addition, the digital back-end module of the phase-locked amplifier also comprises a configured neural network, and the neural network identifies and removes the noise in the passband of the intermediate signal so as to realize the suppression of the noise in the bandwidth range of the phase-locked amplifier based on the neural network.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a neural network-based lock-in amplifier according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a reference signal module according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of an artificial intelligence signal processing unit according to an embodiment of the present application.
Detailed Description
As described in the background, analog lock-in amplifiers use analog devices to perform the lock-in amplifier core operational functions, including analog multipliers, analog low-pass filters, and analog oscillators for generating reference signals. Because the output signal after the operation of the analog device has smaller bandwidth and the performance requirement on the analog-digital conversion circuit is reduced, when the frequency of the measured signal is higher, the analog phase-locked amplifier can use an analog-digital conversion chip with lower sampling rate and bandwidth. However, the performance of the analog lock-in amplifier is limited because the analog device itself introduces extra noise during signal processing and is also susceptible to voltage, temperature and manufacturing process inconsistencies.
The digital phase-locked amplifier digitizes the input waveform by using an analog-to-digital conversion circuit, and then processes the acquired digitized waveform by using chips such as a DSP, an FPGA and the like or upper computer software, thereby realizing operations such as multiplication, filtering and the like in a digital domain. The full digital operation process can avoid the influence caused by the inconsistency of voltage, temperature and production and manufacturing processes, and no new noise is introduced except quantization noise. However, since the input signal needs to be directly collected, the sampling rate of the analog-to-digital conversion circuit needs to be twice the frequency range of the input signal to prevent signal aliasing, and the analog-to-digital conversion circuit also needs to have enough bandwidth to prevent the input signal from being distorted. At present, a common high-speed analog-to-digital conversion chip can usually reach a sampling rate of hundreds of MSps and an input bandwidth of hundreds of MHz, and has a good acquisition effect on input signals with the magnitude of the MHz bandwidth.
However, whether it is an analog lock-in amplifier or a digital lock-in amplifier, it is difficult to remove noise signals aliased in the signal bandwidth range, and for the measurement of the input signal, the full-amplitude input signal is directly measured, rather than the part of the input signal reflecting systematic changes, which makes the amplitude change of the input signal brought by the small systematic changes not well detectable.
In view of this, an embodiment of the present application provides a phase-locked amplifier based on a neural network, including: the device comprises a reference signal module, an analog front-end module, an analog-to-digital conversion module and a digital rear-end module; wherein the content of the first and second substances,
the digital back end module is used for receiving excitation signal configuration information transmitted by an upper computer and generating a digital data code of an excitation signal according to the excitation signal configuration information; the device comprises a neural network, a digital input signal processing unit, a signal processing unit and a signal processing unit, wherein the neural network is used for carrying out quadrature demodulation and first filtering processing on the digital input signal so as to remove noise outside a pass band in the digital input signal and obtain an intermediate signal, and the neural network is configured to identify and remove noise inside the pass band of the intermediate signal so as to obtain a target signal;
the analog-to-digital conversion module is used for converting the digital data code of the excitation signal into an excitation signal in an analog signal form; and for analog-to-digital converting an analog input signal to obtain said digital input signal;
the analog front-end module is used for carrying out first preprocessing on the excitation signal in the analog signal form so as to obtain an input excitation signal meeting the requirements of a system to be tested and the reference signal module; the analog-to-digital conversion module is used for carrying out cancellation processing and second preprocessing on a signal to be detected and a reference signal so as to generate the analog input signal meeting the working requirement of the analog-to-digital conversion module;
and the reference signal module is used for receiving the input excitation signal and generating the reference signal representing the signal generated by the system to be tested in the stable state according to the input excitation signal.
The phase-locked amplifier based on the neural network generates a reference signal representing a signal generated by a system to be tested in a stable state by a reference signal module according to a received input excitation signal, and performs differential cancellation on the reference signal and the signal to be tested generated by the system to be tested according to the excitation signal in an analog front-end module, so that only a useful signal generated due to the change of the system to be tested is left, the suppression of the power fluctuation of an excitation signal source is realized, the occupation ratio of the useful signal in the total analog input signal is improved, and the signal-to-noise ratio of the phase-locked amplifier based on the neural network is improved; in addition, the digital back-end module of the phase-locked amplifier also comprises a configured neural network, and the neural network identifies and removes the noise in the passband of the intermediate signal so as to realize the suppression of the noise in the bandwidth range of the phase-locked amplifier based on the neural network.
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The embodiment of the present application provides a phase-locked amplifier based on a neural network, as shown in fig. 1, including: a reference signal module 100, an analog front end module 200, an analog-to-digital conversion module 300, and a digital back end module 400; wherein the content of the first and second substances,
the digital back-end module 400 is configured to receive excitation signal configuration information transmitted by the upper computer 500, and generate a digital data code of an excitation signal according to the excitation signal configuration information; the device comprises a neural network, a digital input signal processing unit, a signal processing unit and a signal processing unit, wherein the neural network is used for carrying out quadrature demodulation and first filtering processing on the digital input signal so as to remove noise outside a pass band in the digital input signal and obtain an intermediate signal, and the neural network is configured to identify and remove noise inside the pass band of the intermediate signal so as to obtain a target signal;
the analog-to-digital conversion module 300 is configured to convert the digital data code of the excitation signal into an excitation signal in the form of an analog signal; and for analog-to-digital converting an analog input signal to obtain said digital input signal;
the analog front-end module 200 is configured to perform a first preprocessing on the excitation signal in the analog signal form to obtain an input excitation signal meeting requirements of the system to be tested and the reference signal module 100; and for performing cancellation processing and a second preprocessing on the signal to be measured and the reference signal to generate the analog input signal meeting the operating requirement of the analog-to-digital conversion module 300;
the reference signal module 100 is configured to receive the input excitation signal, and generate the reference signal representing a signal generated by the system under test in a stable state according to the input excitation signal.
Neural Networks (NNs), also known as Artificial Neural Networks (ans), or as Connection models (Connection models), or as Artificial intelligent Networks (ANNs). In this embodiment, the neural network in the digital back-end module 400 is a neural network that is trained in advance by a training sample and can identify a useful signal and noise in a pass band in an intermediate signal, and the configuration of the neural network refers to a process of selecting neural network parameters of the neural network by the upper computer 500, so that the neural network has a better identification effect on the noise in the pass band.
In addition, the in-pass band noise refers to a noise signal that is frequency-aliased with a useful signal in the intermediate signal. And the out-of-passband noise is removed by the quadrature demodulation and first filtering process of the digital back end module 400 to achieve removal of the full-band noise signal.
A possible structure of each module of the neural network-based lock-in amplifier provided in the embodiment of the present application is described below.
Referring to fig. 2 for the reference signal module 100 and the analog front end module 200, the reference signal module 100 includes: a multiplexer 101, a grounding unit 102, a reference system 103 and a gain bias phase adjusting circuit 104; wherein the content of the first and second substances,
the multiplexer 101 comprises three input ends, the three input ends are respectively connected with the output ends of the grounding unit 102, the reference system 103 and the gain offset phase adjusting circuit 104, and are used for determining one of a signal output by the grounding unit 102, a signal output by the reference system 103 and a signal output by the gain offset phase adjusting circuit 104 as the output signal according to a first selection instruction of the upper computer 500;
the ground unit 102, configured to provide a ground voltage to bypass the reference signal module 100;
the gain bias phase adjusting circuit 104 is configured to adjust the excitation signal to obtain an output signal of the gain bias phase adjusting circuit 104;
the reference system 103 is configured to receive the signal output by the gain offset phase adjustment circuit 104, and determine, according to the signal output by the gain offset phase adjustment circuit 104, an output signal of the reference system 103 that represents a signal generated in the system to be measured in a stable state.
The analog front end module 200 includes: a differential input unit 210 and an output driving unit 220, wherein,
the differential input unit 210 is configured to perform cancellation processing on the signal to be detected and the reference signal, and perform amplitude and bias adjustment and bandwidth limitation on the signal after the cancellation processing, so as to obtain the analog input signal meeting the operating requirement of the analog-to-digital conversion module 300;
the output driving unit 220 is configured to drive a waveform of the excitation signal in the form of the digital signal, and limit a waveform bandwidth of the excitation signal in the form of the digital signal, so as to generate an input excitation signal meeting requirements of the system under test and the reference signal module 100.
The reference system 103 typically replicates the system under test and is placed in a stable environment. Therefore, when the excitation signal is applied, the response condition of the reference system to the signal can reflect the output signal condition of the tested system in a stable state.
For example, if the system under test is a photo-resistor, the measurement is required to be the change in the resistance of the photo-resistor with the intensity of light. The reference system 103 is then a photo-resistor of the same type and the photo-resistor of the reference system 103 should be exposed to a steady illumination condition with an intensity as equal as possible to the average value of the illumination of the system under test.
In the present embodiment, a specific processing manner of the first preprocessing and the second preprocessing is defined, specifically, the second preprocessing is performed by the differential input unit 210, and includes performing amplitude and bias adjustment and bandwidth limitation on the signal after the cancellation processing; the first preprocessing is performed by the output driving unit 220, and includes driving the waveform of the excitation signal in the form of the digital signal and limiting the waveform bandwidth of the excitation signal in the form of the digital signal.
In this embodiment, a method for bypassing the reference signal module 100 is provided, that is, a specific form of an output signal is determined through a first selection instruction of the upper computer 500, and when the ground voltage provided by the ground unit 102 is used as the output signal, the purpose of bypassing the reference signal module 100 is achieved, because after the ground voltage and the signal to be tested output by the system to be tested are subjected to differential cancellation processing in the analog front-end module 200, the obtained signal is still the signal to be tested itself.
When the amplitude of an unwanted signal generated by the signal to be measured is constant or the reference system 103 is not easy to build, the output signal of the gain offset phase adjustment circuit 104 may be used as the output signal.
The specific working principle is as follows, and for simplicity of explanation, it is assumed that the amplitude of the excitation signal is biased to 0 and the phase of the excitation signal is 0.
The expression for the stimulus signal is:
ystim(t)=Astim(1+δV)cos(ωstimt) (1)
here the excitation signal ystim(t) is in cosine form, δ V is the power fluctuation of the excitation signal, and is much smaller than 1, Astim(1+ δ V) represents the amplitude of the excitation signal, ωstimRepresenting the frequency of the excitation signal.
The expression of the to-be-detected signal generated after the excitation signal passes through the to-be-detected system is as follows:
Figure BDA0002241604660000091
wherein S (t) is the amplitude change of the reflected system information brought by the system to be tested,
Figure BDA0002241604660000094
the phase delay caused by the system to be tested.
Carrying out Taylor expansion on the amplitude change of the reflected system information brought by the system to be tested, namely S (t) S0+S1t+S2t2+.. in weak signal measurement, S0Terms do not contribute to the test results, but generally S0>>Si(i 1, 2, 3.) therefore, there is less of a useful component in the signal to be measured.
Converting S (t) to S0+S1t+S2t2+., substituting the formula (2) to obtain a final expression of the signal to be measured:
Figure BDA0002241604660000092
the expression of the output signal of the gain amplitude phase adjusting circuit is as follows:
Figure BDA0002241604660000093
wherein, yref1(t) represents the gain amplitude phase adjustment circuit output signal, ArefRepresenting the amplitude value of the output signal after passing through the gain amplitude phase adjustment circuit,
Figure BDA0002241604660000101
indicating the phase delay introduced by the signal transmission path.
a) Since the output of the gain amplitude phase adjustment circuit is the result of the adjustment of the excitation signal, its power fluctuation δ V, and frequency ωstimCan also be faithfully preserved.
The phase adjustment circuit 104 is biased by adjusting the gain so that
Figure BDA0002241604660000102
And A isref=AstimSAnd 0, the output signal of the gain amplitude phase adjusting circuit and the signal to be measured can be cancelled.
Making a difference between the formulas (3) and (4), and substituting the difference into the adjustment
Figure BDA0002241604660000103
And A isref=AstimS0Then, the signal expression after the differential cancellation is:
Figure BDA0002241604660000104
as can be seen from the above formula, the cancellation process, including the maximum power fluctuation of the excitation signal, and the erroneous signal lines are eliminated, and the third step of the above formula approximately uses δ V < 1.
In this case, the signal expression obtained by performing cancellation processing on the signal to be detected and the reference signal is as follows:
Figure BDA0002241604660000105
namely, the reference signal module 100, which generates the reference signal by the gain offset phase adjustment circuit 104, realizes the suppression of the power fluctuation of the excitation signal and the elimination of the unwanted signal, and can improve the signal-to-noise ratio of the neural network-based lock-in amplifier. It is suitable for the amplitude of the useless signal generated by the system to be tested to be a constant S0The case (1).
When the amplitude of the useless signals generated by the system to be tested is not constant, the expression of the excitation signals is shown as a formula (1);
the expression of the to-be-measured signal generated by the excitation signal through the to-be-measured system is as follows:
Figure BDA0002241604660000106
the amount reflecting the amplitude change of the system information to be measured is S (t) +. DELTA.S (t). Wherein, S (t) is the amplitude variation of the signal to be measured caused by the useless system under test in the steady state, and Δ S (t) is the amplitude variation of the signal to be measured interested by the measurer, usually S (t) > Δ S (t).
The output signal of the gain amplitude phase adjustment circuit shown in formula (4) after passing through the reference system 103 is:
Figure BDA0002241604660000111
since the reference system 103 simulates the steady state of the system under test, the signal output by the reference system 103 will include the signal amplitude change s (t) caused by the system under test in the steady state. In addition, by adjusting the gain bias phase adjustment circuit 104, it is possible to make
Figure BDA0002241604660000112
Aref=AstimAfter the cancellation processing, the reference signal and the signal to be measured can generate cancellation.
The difference is made between the formulas (6) and (7) and substituted into the adjustment
Figure BDA0002241604660000113
Aref=AstimThen, the signal expression obtained is:
it can be seen that the cancellation process includes the maximum excitation signal power fluctuation term
Figure BDA0002241604660000115
And unwanted signal terms are eliminated, the third step of the above equation uses approximately δ V < 1.
In this case, the signal expression obtained by performing cancellation processing on the signal to be detected and the reference signal is as follows:
Figure BDA0002241604660000116
namely, the reference signal module 100, which generates the reference signal through the reference system 103, realizes the suppression of the power fluctuation of the excitation signal and the elimination of the unwanted signal, and the signal-to-noise ratio of the neural network based lock-in amplifier. Which is adapted to the situation where the amplitude of the unwanted signals generated by the system is not constant.
Referring to fig. 1 for a digital back end module 400, the digital back end module 400 includes a system control unit 470, an artificial intelligence signal processing unit 460, a first multiplier 410, a second multiplier 420, a direct digital synthesizer 450, a first digital low pass filter 430, and a second digital low pass filter 440, wherein,
the system control unit 470 is configured to receive excitation signal configuration information transmitted by the upper computer 500, and transmit the excitation signal configuration information to the direct digital synthesizer 450;
the direct digital synthesizer 450 is configured to generate a first signal and a second signal that are orthogonal according to the excitation signal configuration information, where the first signal is a digital data code of the excitation signal;
the first multiplier 410 is configured to perform a product operation on the digital input signal and the second signal, and then perform a filtering process on the digital input signal and the second signal by using the first digital low-pass filter 430 to obtain a first sub-signal;
the second multiplier 420 is configured to perform a product operation on the digital input signal and the first signal, and then perform a filtering process on the digital input signal and the first signal by using the second digital low-pass filter 440 to obtain a second sub-signal, where the first sub-signal and the second sub-signal form the intermediate signal;
the artificial intelligence signal processing unit 460 is provided with a neural network configured by the upper computer 500, and is configured to identify and remove noise in the pass band of the first sub-signal and the second sub-signal by using the neural network, so as to obtain a target signal including a first target sub-signal and a second target sub-signal.
Optionally, referring to fig. 3, the artificial intelligence signal processing unit 460 further includes a network parameter register 462, a phase calculation unit 463 and a magnitude calculation unit 464 in addition to the neural network 461, wherein,
the network parameter register 462 stores a plurality of neural network 461 parameters corresponding to different types of signals, so that the upper computer 500 determines the neural network 461 parameters used by the neural network 461 in the network parameter register 462 during the configuration process;
the phase calculation unit 463, configured to calculate a phase angle of the target signal;
the amplitude calculating unit 464 is configured to calculate an amplitude of the target signal.
To achieve signal acquisition, the digital back-end module 400 first performs a demodulation process on the input signal. For simplicity, the input signal form is illustrated by using equation (8) as an example, and it is assumed that the direct digital Synthesizer 450 (DDS) generates the demodulation signal with a phase of 0;
the first signal cos (ω) is generated by a direct digital synthesizer 450stimt) and a second signal-sin (ω)stimt) and the digital input signal is multiplied by it in the first and second multipliers 410 and 420, respectively, to obtain two signals, each represented by:
Figure BDA0002241604660000121
Figure BDA0002241604660000122
after the two signals are respectively processed by a digital low-pass filter, two paths of signals are obtained and output as follows:
Figure BDA0002241604660000123
Figure BDA0002241604660000124
in this process, the first digital low pass filter 430 and the second digital low pass filter 440 filter out twice the excitation signal frequency components, and also filter out the out-of-band noise in the signal of interest Δ S (t) to obtain Δ S' (t). Furthermore, through the demodulation process, two orthogonal signals, namely a first sub-signal and a second sub-signal, which are proportional to Δ S' (t) are restored. After signal demodulation, the intermediate signal is transmitted to the artificial intelligence signal processing unit 460 for subsequent operations. Here, the subsequent operations include amplitude calculation, phase calculation, and artificial intelligence noise reduction operation of the neural network 461.
Specifically, the phase calculating unit 463 is specifically configured to perform a ratio operation on the first target sub-signal and the second target sub-signal to obtain the first target sub-signal and the second target sub-signal
Figure BDA0002241604660000131
After the arctan operation, the phase angle of the target signal can be obtainedyQ' and yI' denotes the first target sub-signal and the second target sub-signal, respectively.
The amplitude calculation unit 464 is configured to perform a square and square operation on the first target sub-signal and the second target sub-signal to obtain an amplitude of the target signal
Optionally, in an embodiment of the present application, the system control unit 470 is further configured to transmit the target signal, the phase angle of the target signal, and the amplitude of the target signal to the upper computer 500 for display.
The system control unit 470 is further configured to store the neural network 461 parameter input by the upper computer 500 in the network parameter register 462 according to a new instruction input by the upper computer 500; and the neural network 461 parameter reading unit is used for reading the neural network 461 parameter stored in the network parameter register 462 according to a reading instruction input by the upper computer 500 and transmitting the neural network to the upper computer 500.
Still referring to fig. 3, optionally, the analog-to-digital conversion module 300 includes: an Analog-to-Digital Converter (ADC) circuit 310 and a Digital-to-Analog Converter (DAC) circuit 320; wherein the content of the first and second substances,
the analog-to-digital conversion circuit 310 is configured to convert the digital data code of the excitation signal into an excitation signal in the form of an analog signal;
the digital-to-analog conversion circuit 320 is configured to perform analog-to-digital conversion on an analog input signal to obtain the digital input signal.
In summary, the present application provides a phase-locked amplifier based on a neural network, in which a reference signal module 100 generates a reference signal representing a signal generated in a stable state of a system to be tested according to a received input excitation signal, and the reference signal and the signal to be tested generated by the system to be tested according to the excitation signal are subjected to differential cancellation in an analog front-end module 200, so that only a useful signal generated due to a change of the system to be tested is left, power fluctuation of an excitation signal source is suppressed, a ratio of the useful signal in a total analog input signal is increased, and a signal-to-noise ratio of the phase-locked amplifier based on the neural network is increased; in addition, the digital back end module 400 of the lock-in amplifier further includes a configured neural network 461, and the neural network 461 identifies and removes the noise in the pass band of the intermediate signal to achieve the suppression of the noise in the bandwidth range of the lock-in amplifier based on the neural network.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A neural network based lock-in amplifier, comprising: the device comprises a reference signal module, an analog front-end module, an analog-to-digital conversion module and a digital rear-end module; wherein the content of the first and second substances,
the digital back end module is used for receiving excitation signal configuration information transmitted by an upper computer and generating a digital data code of an excitation signal according to the excitation signal configuration information; the device comprises a neural network, a digital input signal processing unit, a signal processing unit and a signal processing unit, wherein the neural network is used for carrying out quadrature demodulation and first filtering processing on the digital input signal so as to remove noise outside a pass band in the digital input signal and obtain an intermediate signal, and the neural network is configured to identify and remove noise inside the pass band of the intermediate signal so as to obtain a target signal;
the analog-to-digital conversion module is used for converting the digital data code of the excitation signal into an excitation signal in an analog signal form; and for analog-to-digital converting an analog input signal to obtain said digital input signal;
the analog front-end module is used for carrying out first preprocessing on the excitation signal in the analog signal form so as to obtain an input excitation signal meeting the requirements of a system to be tested and the reference signal module; the analog-to-digital conversion module is used for carrying out cancellation processing and second preprocessing on a signal to be detected and a reference signal so as to generate the analog input signal meeting the working requirement of the analog-to-digital conversion module;
and the reference signal module is used for receiving the input excitation signal and generating the reference signal representing the signal generated by the system to be tested in the stable state according to the input excitation signal.
2. The neural network-based lock-in amplifier of claim 1, wherein the reference signal module comprises: the device comprises a multiplexer, a grounding unit, a reference system and a gain bias phase adjusting circuit; wherein the content of the first and second substances,
the multiplexer comprises three input ends, the three input ends are respectively connected with the output ends of the grounding unit, the reference system and the gain bias phase adjusting circuit and used for determining one of a grounding unit output signal, a reference system output signal and a gain bias phase adjusting circuit output signal as the output signal according to a first selection instruction of the upper computer;
the grounding unit is used for providing a grounding voltage to bypass the reference signal module;
the gain bias phase adjusting circuit is used for adjusting the excitation signal to obtain an output signal of the gain bias phase adjusting circuit;
and the reference system is used for receiving the output signal of the gain bias phase adjusting circuit and determining a reference system output signal representing a signal generated by the system to be tested in a stable state according to the output signal of the gain bias phase adjusting circuit.
3. The neural network-based lock-in amplifier of claim 1, wherein the analog front-end module comprises: a differential input unit and an output drive unit, wherein,
the differential input unit is used for carrying out cancellation processing on a signal to be detected and a reference signal, and carrying out amplitude and bias adjustment and bandwidth limitation on the signal subjected to the cancellation processing so as to obtain the analog input signal meeting the working requirement of the analog-to-digital conversion module;
the output driving unit is used for driving the waveform of the excitation signal in the form of the digital signal and limiting the waveform bandwidth of the excitation signal in the form of the digital signal so as to generate the input excitation signal meeting the requirements of the system to be tested and the reference signal module.
4. The neural network-based lock-in amplifier of claim 1, wherein the digital back-end module comprises a system control unit, an artificial intelligence signal processing unit, a first multiplier, a second multiplier, a direct digital synthesizer, a first digital low-pass filter, and a second digital low-pass filter, wherein,
the system control unit is used for receiving excitation signal configuration information transmitted by an upper computer and transmitting the excitation signal configuration information to the direct digital synthesizer;
the direct digital synthesizer is used for generating a first signal and a second signal which are orthogonal according to the excitation signal configuration information, wherein the first signal is a digital data code of the excitation signal;
the first multiplier is used for performing product operation on the digital input signal and the second signal and then performing filtering processing on the digital input signal and the second signal by using the first digital low-pass filter to obtain a first sub-signal;
the second multiplier is configured to perform a product operation on the digital input signal and the first signal, and then perform filtering processing on the digital input signal and the first signal by using the second digital low-pass filter to obtain a second sub-signal, where the first sub-signal and the second sub-signal form the intermediate signal;
the artificial intelligence signal processing unit is provided with a neural network configured by the upper computer and used for identifying and removing the noise in the pass band of the first sub-signal and the second sub-signal by using the neural network so as to obtain a target signal comprising a first target sub-signal and a second target sub-signal.
5. The neural network-based lock-in amplifier of claim 4, wherein the artificial intelligence signal processing unit further comprises a network parameter register, a phase calculation unit, and a magnitude calculation unit, wherein,
the network parameter register stores a plurality of neural network parameters corresponding to different types of signals, so that the upper computer determines the neural network parameters used by the neural network in the network parameter register in the configuration process;
the phase calculation unit is used for calculating a phase angle of the target signal;
the amplitude calculating unit is used for calculating the amplitude of the target signal.
6. The neural network-based lock-in amplifier of claim 5, wherein the phase calculation unit is specifically configured to obtain the phase angle of the target signal after performing a ratio operation and an arc tangent operation on the first target sub-signal and the second target sub-signal.
7. The neural network-based lock-in amplifier of claim 5, wherein the amplitude calculation unit is configured to perform a square sum and square operation on the first target sub-signal and the second target sub-signal to obtain the amplitude of the target signal.
8. The neural network-based lock-in amplifier of claim 5, wherein the system control unit is further configured to transmit the target signal, the phase angle of the target signal, and the amplitude of the target signal to the host computer for display.
9. The neural network-based lock-in amplifier as claimed in claim 5, wherein the system control unit is further configured to store the neural network parameters inputted by the upper computer in the network parameter register according to a new instruction inputted by the upper computer; and the neural network parameter register is used for reading the neural network parameters stored in the network parameter register according to a reading instruction input by the upper computer and transmitting the neural network parameters to the upper computer.
10. The neural network-based lock-in amplifier of claim 1, wherein the analog-to-digital conversion module comprises: an analog-to-digital conversion circuit and a digital-to-analog conversion circuit; wherein the content of the first and second substances,
the digital-to-analog conversion circuit is used for converting the digital data code of the excitation signal into an excitation signal in the form of an analog signal;
the analog-to-digital conversion circuit is used for performing analog-to-digital conversion on the analog input signal to obtain the digital input signal.
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