CN110739970A - Analog-to-digital conversion circuit, portable device, and analog-to-digital conversion method - Google Patents

Analog-to-digital conversion circuit, portable device, and analog-to-digital conversion method Download PDF

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CN110739970A
CN110739970A CN201911059500.1A CN201911059500A CN110739970A CN 110739970 A CN110739970 A CN 110739970A CN 201911059500 A CN201911059500 A CN 201911059500A CN 110739970 A CN110739970 A CN 110739970A
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signal
switching tube
output end
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input
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CN110739970B (en
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杨志飞
张海军
杜黎明
程剑涛
孙洪军
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Shanghai Awinic Technology Co Ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/124Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245Details of sampling arrangements or methods

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Abstract

The invention provides analog-to-digital conversion circuits, portable equipment and an analog-to-digital conversion method, wherein the circuits comprise a th integrator, an integration module, a summer, a quantizer and a digital-to-analog converter, the th integrator is used for processing at least received voltage signals to obtain th integration signals, the th integration signals are respectively input into the integration module and the summer, the integration module is used for generating second integration signals according to th integration signals and inputting the second integration signals into the summer to obtain second input signals, the quantizer is used for performing quantization operation on the second input signals to obtain a PDM data stream and outputting the PDM data stream, and the digital-to-analog converter is used for performing digital-to-analog conversion on the PDM data stream to obtain current feedback signals and outputting the current feedback signals to a th integrator.

Description

Analog-to-digital conversion circuit, portable device, and analog-to-digital conversion method
Technical Field
The present invention relates to the field of semiconductor integrated circuit technology, and more particularly, to types of analog-to-digital conversion circuits, portable devices, and analog-to-digital conversion methods.
Background
In order to maximize the extreme power performance of the Bluetooth loudspeaker and the mobile phone loudspeaker without damaging the loudspeaker cavity, the loudspeaker current needs to be detected in real time and then converted into a voltage signal, the analog voltage signal is converted into a Pulse Density Modulation (PDM) (supplemented by Chinese meaning) signal by an analog-to-digital conversion module and then sent to a digital algorithm module, parameters such as the loudspeaker diaphragm displacement and the loudspeaker temperature are calculated in real time, so that the output current of the power amplifier is controlled, the loudspeaker is protected, and the loudspeaker is prevented from being damaged due to the fact that the loudspeaker is excessively large in displacement or excessively high in temperature.
The inventor researches and discovers that the existing analog-to-digital conversion module usually adopts a discrete-time analog-to-digital conversion module, however, the discrete-time analog-to-digital conversion module can only work under a lower sampling frequency, so that the control effect of a digital algorithm module under a higher sampling frequency is poorer, and the effect of protecting a loudspeaker is poorer.
Disclosure of Invention
The invention aims to provide analog-to-digital conversion circuits, which can improve the applicable sampling frequency range during working.
To solve the above problems, the following solutions are proposed:
the invention discloses in aspect analog-to-digital conversion circuits, which include:
integrator, integration module, summer, quantizer and digital-to-analog converter, wherein, the integration module includes at least second integrators;
the th integrator is configured to convert the received voltage signal into a th current signal, process at least the th current signal to obtain a th input signal, perform an integration operation on the th input signal to obtain a th integrated signal, and input the th integrated signal to the integration module and the summer, respectively;
the integration module is used for generating a second integration signal corresponding to each second integrator according to the th integration signal and inputting each second integration signal to the summer;
the summator is used for summing the th integrated signal and each second integrated signal to obtain a second input signal;
the quantizer is configured to perform a quantization operation on the second input signal, obtain a Pulse Density Modulation (PDM) data stream corresponding to the second input signal, and output the PDM data stream;
the digital-to-analog converter is configured to perform digital-to-analog conversion on the PDM data stream output by the quantizer, obtain a current feedback signal corresponding to the PDM data stream, and output the current feedback signal to the th integrator;
the th integrator is further configured to subtract the th current signal from the current feedback signal to obtain the th input signal.
The above analog-to-digital conversion circuit, optionally, the th integrator, includes:
an th transconductance amplifier, a current adder, a th positive terminal capacitor and a th negative terminal capacitor;
the negative input end of the th transconductance amplifier is connected with the negative output end of the voltage input end, and the positive input end of the th transconductance amplifier is connected with the positive output end of the voltage input end;
an positive input end of the current adder is connected with a positive output end of the transconductance amplifier, a negative input end of the current adder is connected with a negative output end of the transconductance amplifier, a second positive input end of the current adder is connected with a positive output end of the digital-to-analog converter, and a second negative output end of the current adder is connected with a negative output end of the digital-to-analog converter;
the positive output end of the current adder is connected with the end of the positive side capacitor, and the other end of the positive side capacitor is grounded;
the negative output terminal of the current adder is connected to the terminal of the negative side capacitor, and the other terminal of the negative side capacitor is grounded.
Optionally, in the analog-to-digital conversion circuit, when the integration module includes a plurality of second integrators, the second integrators are sequentially connected in series in the integration module, and each of the second integrators has the same structure, and each of the second integrators includes a second transconductance amplifier, a second positive end capacitor and a second negative end capacitor, where a negative output end of the second transconductance amplifier is connected to the end of the second negative end capacitor, the other end of the second negative end capacitor is grounded, a positive output end of the second transconductance amplifier is connected to the end of the second positive end capacitor, and the other end of the second positive end capacitor is grounded;
the positive input end of the first integrator in the second integrators connected in series in sequence is connected with the negative output end of the th integrator, and the negative input end is connected with the positive output end of the th integrator;
in each second integrator connected in series in sequence, a positive output end of each second transconductance amplifier is connected with a positive port on the summer, and a negative output end of each second transconductance amplifier is connected with a negative port on the summer;
in two adjacent second integrators connected in series in sequence, the positive input ends of the rear second integrators are connected with the negative output ends of the front second integrators, and the negative input ends of the rear second integrators are connected with the positive output ends of the front second integrators.
The above analog-to-digital circuit, optionally, further includes in the integration module:
a third transconductance amplifier;
the positive output end of the last second integrator in the second integrators sequentially connected in series is connected with the positive input end of the third transconductance amplifier, the negative output end of the last second integrator is connected with the negative input end of the third transconductance amplifier, the positive input end of the last second integrator is connected with the negative output end of the third transconductance amplifier, and the negative input end of the last second integrator is connected with the positive output end of the third transconductance amplifier.
Optionally, the analog-to-digital converter includes an exclusive or circuit, an th inverter, a second inverter, a third inverter, a th switching tube, a second switching tube, a third switching tube, a fourth switching tube, a fifth switching tube, and a sixth switching tube;
an th input end of the exclusive-or circuit is connected with a clock circuit, a second input end of the exclusive-or circuit is respectively connected with an output end of the quantizer and an input end of the second inverter, and an output end of the exclusive-or circuit is respectively connected with an input end of the th inverter and a grid electrode of the fourth switch tube;
the output end of the th inverter is connected with the third switching tube;
the output end of the second phase inverter is respectively connected with the input end of the third phase inverter and the grid electrode of the second switching tube;
the output end of the third inverter is connected with the gate of the th switching tube;
the grid electrode of the fifth switching tube and the grid electrode of the sixth switching tube are both connected with the output end of the current bias circuit;
the source electrode of the fifth switching tube is grounded, and the drain electrode of the fifth switching tube is respectively connected with the source electrode of the switching tube and the source electrode of the second switching tube;
the source electrode of the sixth switching tube is grounded, and the drain electrode of the sixth switching tube is respectively connected with the source electrode of the third switching tube and the source electrode of the fourth switching tube;
the drain electrode of the th switching tube and the drain electrode of the fourth switching tube are connected with the th output end;
and the drain electrode of the second switching tube and the drain electrode of the third switching tube are connected with a second output end.
The second aspect of the present invention discloses kinds of portable devices, including:
the control circuit, the sound source power amplification circuit, the sound source and the analog-to-digital conversion circuit are arranged in the circuit; the control circuit is respectively connected with the analog-to-digital conversion circuit and the sound source power amplification circuit, and the sound source is respectively connected with the analog-to-digital conversion circuit and the sound source power amplification circuit;
the analog-to-digital conversion circuit is used for performing analog-to-digital conversion on a voltage signal corresponding to current currently input to the sound source to obtain a Pulse Density Modulation (PDM) data stream;
the control circuit generates a control signal according to the PDM data stream, and sends the control signal to the sound source power amplification circuit so as to control the sound source power amplification circuit to output current with the size corresponding to the control signal to the sound source.
The third aspect of the invention discloses analog-to-digital conversion methods, which comprise:
integrating the th input signal to obtain a th integrated signal;
integrating the th integrated signal at least times to obtain integrated signals after each integration, thereby obtaining at least integrated signals;
summing the th integrated signal and the at least integrated signals to obtain a second input signal;
performing quantization operation on the second input signal to obtain a Pulse Density Modulation (PDM) data stream corresponding to the second input signal;
and performing digital-to-analog conversion on the PDM data stream to obtain a current feedback signal corresponding to the PDM data stream.
The above method, optionally, further includes:
receiving a voltage signal, and converting the voltage signal into an th current signal;
and obtaining a th input signal by subtracting the th current signal and the current feedback signal.
The method described above, optionally, the process of the quantization operation includes:
continuously sampling the second input signal according to an external clock signal to obtain each signal sampling value;
if the signal sampling value obtained by current sampling is not the first signal sampling value, determining the difference value between the signal sampling value and the signal sampling value obtained by previous times of sampling;
and carrying out low-order quantization on the difference value.
In the method, optionally, if or more of the at least integrated signals exceed a preset amplitude, the or more integrated signals are discarded during the summation.
Compared with the prior art, the invention has the following advantages:
the invention provides analog-to-digital conversion circuits, portable devices and analog-to-digital conversion methods, the circuits comprise a th integrator, an integrating module, a summer, a quantizer and a digital-to-analog converter, wherein the integrating module comprises at least second integrators, a th integrator for converting a received voltage signal into a th current signal, processing at least a th current signal to obtain a th input signal, integrating the th input signal to obtain a th integrated signal, and inputting the th integrated signal to the integrating module and the summer, respectively, the integrating module for generating a second integrated signal corresponding to each second integrator according to the th integrated signal and inputting each second integrated signal to the summer, the summer is for performing an integrating operation on the th integrated signal and each second integrated signal to obtain a second input signal, the quantizer for performing an input operation on the second integrated signal and each second integrated signal to obtain a second integrated signal corresponding sampling frequency difference, the quantizer is used for obtaining a higher sampling frequency difference between the second integrated signal and the sampling frequency difference of the sampling frequency of the sampling signal, and the sampling frequency difference between the sampling frequency of the sampling signal and the sampling frequency difference of the sampling signal obtained PDM, and the sampling frequency difference of the sampling signal obtained by the integrated circuit, and the feedback , so that the sampling circuit can be used for improving the sampling frequency of the sampling signal under the sampling circuit, and the sampling frequency of the sampling circuit, and the sampling circuit, so that the sampling circuit, and the working frequency of the working frequency.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of analog-to-digital conversion circuits provided by the present invention;
FIG. 2 is an exemplary diagram of transfer function simulation waveforms of analog-to-digital conversion circuits provided in the present invention;
fig. 3 is a schematic structural diagram of a digital-to-analog converter in the analog-to-digital conversion circuits provided by the invention;
fig. 4 is a waveform diagram of a digital-to-analog converter of analog-to-digital conversion circuits provided by the invention;
fig. 5 is a schematic structural diagram of kinds of portable devices provided by the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only partial embodiments of of the present invention, rather than all embodiments.
The invention provides an analog-to-digital conversion circuit which can convert an analog voltage signal into a digital PDM signal, and has high sampling frequency and low power consumption.
The following describes a specific implementation of the present invention with respect to a schematic diagram of an analog-to-digital conversion circuit structure.
Referring to fig. 1, a schematic structural diagram of an analog-to-digital conversion circuit provided by an embodiment of the present invention is shown, including:
, an integrator 101, an integration module 102, a summer 103, a quantizer 104, and a digital-to-analog converter 105, wherein the integration module 102 comprises at least second integrators;
the th integrator 101 is configured to convert a received voltage signal into a th current signal, process at least the th current signal to obtain a th input signal, perform an integration operation on the th input signal to obtain a th integrated signal, and input the th integrated signal to the integration module 102 and the summer 103, respectively;
the integration module 102 is configured to generate a second integration signal corresponding to each second integrator according to the th integration signal, and input each second integration signal to the summer 103;
the summer 103 is configured to perform a summation operation on the th integrated signal and each of the second integrated signals to obtain a second input signal;
the quantizer 104 is configured to perform a quantization operation on the second input signal, obtain a Pulse Density Modulation (PDM) data stream corresponding to the second input signal, and output the PDM data stream;
the digital-to-analog converter 105 is configured to perform digital-to-analog conversion on the PDM data stream output by the quantizer 104, obtain a current feedback signal corresponding to the PDM data stream, and output the current feedback signal to the -th integrator 101;
the th integrator 101 is further configured to subtract the th current signal from the current feedback signal to obtain the th input signal.
The th integrator 101 converts a received voltage signal into a th current signal, processes the th current signal and a received current feedback signal to obtain a th input signal, specifically obtains a th input signal by subtracting the th current signal and the current feedback signal, integrates and filters the th input signal to obtain a th integrated signal, and inputs the th integrated signal to the summer 103 and the th integration module respectively.
It should be noted that the integration module 102 may include or more second integrators, and optionally, the integration module may include 3 second integrators, and the electrical parameters of the second integrators may be the same or different, and each second integrator amplifies the received signal, and integrates and filters the amplified signal to obtain a corresponding second integrated signal.
The summer 103 provided by the embodiment of the invention is provided with a plurality of groups of signal input ports, each group of signal input ports is connected with -th integrators 101 or second integrators, and the summer 103 carries out summation operation on the received -th integrated signals and the second integrated signals to obtain second input signals.
An th input end of the quantizer 104 provided in the embodiment of the present invention is connected to the summer 103, and a second end of the quantizer is connected to an external clock circuit, and is configured to perform continuous sampling on a second input signal according to a clock signal input by the external clock circuit to obtain a plurality of signal sample values, and perform low-order quantization on a difference between each two adjacent signal sample values to obtain a PDM data stream, that is, determine a difference between signal sample values obtained by sampling the second input signal by two adjacent sample points, and determine a square waveform currently output by the quantizer according to the difference, where optionally, the quantizer 104 is a 1-bit quantizer.
In the circuit provided in the embodiment of the present invention, the -th integrator 101 includes:
an th transconductance amplifier GM1, a current adder CA, a th positive terminal capacitor C1P and a th negative terminal capacitor C1N;
the negative input end of the th transconductance amplifier GM1 is connected with the negative output end of the voltage input end, and the positive input end of the th transconductance amplifier GM1 is connected with the positive output end of the voltage input end;
an th positive input end of the current adder CA is connected to the th positive output end of the th transconductance amplifier, a th negative input end of the current adder CA is connected to the th negative output end of the th transconductance amplifier GM1, a second positive input end of the current adder CA is connected to the positive output end of the digital-to-analog converter 105, and a second negative output end of the current adder CA is connected to the negative output end of the digital-to-analog converter 105;
the positive output end of the current adder CA is connected with the end of the positive side capacitor, and the other end of the positive side capacitor is grounded;
the negative output terminal of the current adder CA is connected to the terminal of the negative side capacitor, and the other terminal of the negative side capacitor is grounded.
In the method provided by the embodiment of the invention, the th transconductance amplifier converts a voltage signal into a current signal, the current signal is input into a current adder, the current adder performs difference on the received current signal and a current feedback signal to obtain a th input signal, and a th positive end capacitor and a th negative end capacitor perform integral filtering on the th input signal to obtain a th integral signal.
It should be noted that the integral slope of the th integrator GM1-C1 to the capacitance is:
(VIN*Gm1-IDAC)/C1N
where VIN is the input voltage, Gm1 is the transconductance parameter of the th integrator, IDAC is the current feedback signal, and C1N is the capacitance parameter.
In the circuit provided in the embodiment of the present invention, based on the above scheme, optionally, when the integration module 102 includes a plurality of second integrators, each of the second integrators is sequentially connected in series in the integration module, and each of the second integrators has the same structure, where each of the second integrators includes a second transconductance amplifier, a second positive end capacitor, and a second negative end capacitor, a negative output end of the second transconductance amplifier is connected to an end of the second negative end capacitor, another end of the second negative end capacitor is grounded, a positive output end of the second transconductance amplifier is connected to a end of the second positive end capacitor, and another end of the second positive end capacitor is grounded;
the positive input end of the first integrator in the second integrators connected in series in sequence is connected with the negative output end of the th integrator, and the negative input end of the first integrator is connected with the positive output end of the th integrator;
in each second integrator connected in series in sequence, a positive output end of each second transconductance amplifier is connected with a positive port on the summer, and a negative output end of each second transconductance amplifier is connected with a negative port on the summer;
in two adjacent second integrators connected in series in sequence, the positive input ends of the rear second integrators are connected with the negative output ends of the front second integrators, and the negative input ends of the rear second integrators are connected with the positive output ends of the front second integrators.
In the circuit provided in the embodiment of the present invention, based on the above scheme, optionally, the integration module 102 further includes:
a third transconductance amplifier;
the positive output end of the last second integrator in the second integrators sequentially connected in series is connected with the positive input end of the third transconductance amplifier, the negative output end of the last second integrator is connected with the negative input end of the third transconductance amplifier, the positive input end of the last second integrator is connected with the negative output end of the third transconductance amplifier, and the negative input end of the last second integrator is connected with the positive output end of the third transconductance amplifier.
In the integration module 102 according to the embodiment of the present invention, the third transconductance amplifier can amplify the integrated signal of the last second integrator and feed the amplified integrated signal back to the capacitor of the integrator connected to the last second integrator.
Specifically, if the integration module comprises second integrators, the third transconductance amplifier transconductors integrated signals generated by the second integrators into second current signals and respectively feeds back the second current signals to a positive terminal capacitor and a second negative terminal capacitor through the output end of the third transconductance amplifier, wherein the positive output end of the third transconductance amplifier is connected with the positive terminal capacitor, and the negative output end of the third transconductance amplifier is connected with the negative terminal capacitor, and if the second integrators of the integration module are multiple, the third transconductance amplifier transconductors the integrated signals generated by the last second integrator of the integration module into second current signals and respectively feeds back the second current signals to the second positive terminal capacitor and the second negative terminal capacitor of the second integrator connected with the last second integrator.
In the integration module 102 according to the embodiment of the present invention, resonators are formed by the last second integrator and the third transconductance amplifier in the second integrators connected in series in sequence, so that the noise transfer function NTF generates a notch in the low frequency band of the signal, and quantization noise in the band is suppressed.
In practical application, the integration module may include 3 second integrators, that is, the analog-to-digital conversion circuit provided by the present invention includes four-order integrators, so that the noise transfer function can be obtained as follows:
Figure BDA0002257526880000101
wherein c1, c2, c3 and c4 are parameters of the transfer function;
b1 and C1 are determined by a stage GM1-C integrator:
Figure BDA0002257526880000102
c2 is determined by the second stage GM2-C integrator:
Figure BDA0002257526880000103
c3 is determined by a third stage GM3-C integrator:
Figure BDA0002257526880000104
c4 is determined by the fourth stage GM4-C integrator:
Figure BDA0002257526880000105
g is determined by the resonator:
Figure BDA0002257526880000106
wherein Gm1 is a transconductance parameter of the th integrator, Gm2 is a transconductance parameter of the second integrator 1, Gm3 is a transconductance parameter of the second integrator 2, Gm4 is a transconductance parameter of the second integrator 3, and Gm5 is a transconductance parameter of the third transconductance amplifier.
Referring to fig. 2, the simulated waveforms of the Signal transfer function STF and the Noise transfer function NTF provided for the embodiment of the present invention are that the Noise amplitude in the low frequency is greatly suppressed by the Noise shaping of the fourth-order integrator, the Noise is pushed to the high frequency, and notches notch are provided in the low frequency band, so that the Noise energy in the frequency point or frequency range of interest is lower to obtain a higher Signal-to-Noise Ratio (SNR).
In the circuit provided in the embodiment of the present invention, based on the above scheme, specifically, the digital-to-analog converter 105, as shown in fig. 3, includes an exclusive or circuit XOR1, a inverter INV1, a second inverter INV2, a third inverter INV3, a switch NM1, a second switch NM2, a third switch NM3, a fourth switch NM4, a fifth switch NM5, and a sixth switch NM 6;
a input end of the exclusive-or circuit XOR1 is connected to a clock circuit, a second input end of the exclusive-or circuit XOR1 is respectively connected to the output end of the quantizer 104 and the input end of the second inverter INV2, and an output end of the exclusive-or circuit XOR1 is respectively connected to an input end of the inverter INV1 and the gate of the fourth switching tube NM 4;
an output end of the th inverter INV1 is connected to the gate of the third switching tube NM 3;
the output end of the second inverter INV2 is connected to the input end of the third inverter INV3 and the gate of the second switch tube NM2 respectively;
an output end of the third inverter INV3 is connected to a gate of the switching tube NM 1;
the grid electrode of the fifth switching tube NM5 and the grid electrode of the sixth switching tube NM6 are both connected with the output end of the current bias circuit;
the source of the fifth switching tube NM5 is grounded, and the drain of the fifth switching tube NM5 is connected to the source of the switching tube NM1 and the source of the second switching tube NM2 respectively;
the source of the sixth switching tube NM6 is grounded, and the drain of the sixth switching tube NM6 is connected to the source of the third switching tube NM3 and the source of the fourth switching tube NM4, respectively;
the drain of the th switching tube NM1 and the drain of the fourth switching tube NM4 are connected to the output end ;
the drain of the second switching tube NM2 and the drain of the third switching tube NM3 are connected to a second output terminal.
Specifically, the digital-TO-analog converter is an RTZ _ DAC (RETURN TO ZERO _ DAC) circuit.
The RTZ-DAC circuit converts a voltage signal into a current integration signal, the XOR circuit outputs a low level when the level of a sampling clock frequency signal input by the clock circuit is consistent with the level of the PDM data stream, and the XOR circuit outputs a high level when the level of the sampling clock frequency signal is not consistent with the level of the PDM data stream.
Note that any inverters among the th inverter, the second inverter, and the third inverter convert a low level to a high level when receiving the low level, and convert the high level to the low level when receiving the high level.
As shown in fig. 4, the 4 signal waveforms in fig. 4 are, from top to bottom, a sampling clock frequency signal waveform, a PDM data stream signal waveform, a positive output end current signal waveform of the digital-to-analog converter, and a negative output end current signal waveform of the digital-to-analog converter, where when the sampling clock signal is at a low level and the PDM data stream is at a low level, a feedback current at a positive output end of the digital-to-analog converter is-1, and a feedback current at a negative output end is + 1; when the sampling clock frequency signal is at a high level and the PDM data stream is at a low or high level, the feedback current of the positive output end and the feedback current of the negative output end of the digital-to-analog converter are both reset to zero; when the sampling clock frequency is low level and the PDM data flow is high level, the feedback current of the positive output end of the digital-to-analog converter is +1, and the feedback current of the negative output end of the digital-to-analog converter is-1. Such RTZ timing reduces the effect of intersymbol interference of the feedback DAC signal.
In the embodiment of the invention, the th switching tube NM1, the second switching tube NM2, the third switching tube NM3, the fourth switching tube NM4 and the fifth switching tube NM5 may all be NMOS tubes.
The invention provides analog-to-digital conversion circuits, which comprise a th integrator, an integrating module, a summer, a quantizer and a digital-to-analog converter, wherein the integrating module comprises at least second integrators, a st integrator for converting a received voltage signal into a nd current signal, processing at least a th current signal to obtain an th input signal, integrating the th input signal to obtain a th integrated signal, and inputting the th integrated signal to the integrating module and the summer respectively, the integrating module for generating a second integrated signal corresponding to each second integrator according to the th integrated signal and inputting each second integrated signal to the summer, the summer for summing the th integrated signal and each second integrated signal to obtain a second input signal, the quantizer for performing a quantization operation on the second input signal to obtain a second integrated signal corresponding to the second integrated signal, a quantizer for performing a digital-to-analog-to-digital conversion on the second input signal to obtain a second integrated signal, and a digital-to-analog-to-digital converter feedback data stream, and providing a feedback signal for increasing the sampling frequency of the sampled PDM data stream, and the integrated signal, wherein the integrated circuit is capable of outputting a high-speed data stream, and providing a high-feedback signal for improving the PDM conversion efficiency of the PDM conversion circuit, and providing a high-gain an electrical-to-feedback signal, and a high-feedback signal for the high-gain an output signal of the PDM conversion signal of the integrated circuit 3637.
The embodiment of the invention discloses kinds of portable equipment, the structural schematic diagram of the equipment is shown in fig. 5, and the equipment specifically comprises:
the control circuit 201, the sound source power amplifier circuit 202, the sound source 203 and the analog-to-digital conversion circuit 204 of any of claims 1-5, wherein the control circuit 201 is connected with the analog-to-digital conversion circuit 204 and the sound source power amplifier circuit 202, respectively, and the sound source 203 is connected with the analog-to-digital conversion circuit 204 and the sound source power amplifier circuit 202, respectively;
the analog-to-digital conversion circuit 204 is configured to perform analog-to-digital conversion on a voltage signal corresponding to a current currently input to the sound source 203 to obtain a Pulse Density Modulation (PDM) data stream;
the control circuit 201 generates a control signal according to the PDM data stream, and sends the control signal to the sound source power amplifier circuit 202, so as to control the sound source power amplifier circuit 202 to output a current with a magnitude corresponding to the control signal to the sound source 203.
In a specific implementation, the portable device may include, but is not limited to, a mobile phone, a tablet computer, other Universal Serial Bus (USB) interface devices, and the like.
The embodiment of the invention discloses analog-to-digital conversion methods, which specifically comprise the following steps:
integrating the th input signal to obtain a th integrated signal;
integrating the th integrated signal at least times to obtain integrated signals after each integration, thereby obtaining at least integrated signals;
summing the th integrated signal and the at least integrated signals to obtain a second input signal;
and carrying out quantization operation on the second input signal to obtain a Pulse Density Modulation (PDM) data stream corresponding to the second input signal.
In the method provided in the embodiment of the present invention, based on the implementation process, specifically, the method further includes:
receiving a voltage signal, and converting the voltage signal into an th current signal;
performing digital-to-analog conversion on the PDM data stream to obtain a current feedback signal corresponding to the PDM data stream;
and obtaining a th input signal by subtracting the th current signal and the current feedback signal.
In the method provided in the embodiment of the present invention, based on the implementation process, specifically, the process of the quantization operation includes:
continuously sampling the second input signal according to an external clock signal to obtain each signal sampling value;
if the signal sampling value obtained by current sampling is not the first signal sampling value, determining the difference value between the signal sampling value and the signal sampling value obtained by previous times of sampling;
and carrying out low-order quantization on the difference value.
In the method provided in the embodiment of the present invention, based on the implementation process described above, specifically, if or more than one of the at least integrated signals exceed a preset amplitude, the or more than one integrated signal are discarded during the summation.
For the concrete implementation process and implementation principle of the method provided by the embodiment of the present invention and the analog-to-digital conversion circuit shown in the above embodiment, reference may be made to these steps, which are not described herein again.
In this application, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises an series of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
The system and system embodiments described above are merely illustrative, wherein the elements described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., may be located in places, or may be distributed over a plurality of network elements.
further appreciate that the various illustrative components and algorithm steps described in connection with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of functionality for clarity of explanation of interchangeability of hardware and software.
Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention.

Claims (10)

  1. An analog-to-digital conversion circuit of type, comprising:
    integrator, integration module, summer, quantizer and digital-to-analog converter, wherein, the integration module includes at least second integrators;
    the th integrator is configured to convert the received voltage signal into a th current signal, process at least the th current signal to obtain a th input signal, perform an integration operation on the th input signal to obtain a th integrated signal, and input the th integrated signal to the integration module and the summer, respectively;
    the integration module is used for generating a second integration signal corresponding to each second integrator according to the th integration signal and inputting each second integration signal to the summer;
    the summator is used for summing the th integrated signal and each second integrated signal to obtain a second input signal;
    the quantizer is configured to perform a quantization operation on the second input signal, obtain a Pulse Density Modulation (PDM) data stream corresponding to the second input signal, and output the PDM data stream;
    the digital-to-analog converter is configured to perform digital-to-analog conversion on the PDM data stream output by the quantizer, obtain a current feedback signal corresponding to the PDM data stream, and output the current feedback signal to the th integrator;
    the th integrator is further configured to subtract the th current signal from the current feedback signal to obtain the th input signal.
  2. 2. The circuit of claim 1, wherein the th integrator comprises:
    an th transconductance amplifier, a current adder, a th positive terminal capacitor and a th negative terminal capacitor;
    the negative input end of the th transconductance amplifier is connected with the negative output end of the voltage input end, and the positive input end of the th transconductance amplifier is connected with the positive output end of the voltage input end;
    an positive input end of the current adder is connected with a positive output end of the transconductance amplifier, a negative input end of the current adder is connected with a negative output end of the transconductance amplifier, a second positive input end of the current adder is connected with a positive output end of the digital-to-analog converter, and a second negative output end of the current adder is connected with a negative output end of the digital-to-analog converter;
    the positive output end of the current adder is connected with the end of the positive side capacitor, and the other end of the positive side capacitor is grounded;
    the negative output terminal of the current adder is connected to the terminal of the negative side capacitor, and the other terminal of the negative side capacitor is grounded.
  3. 3. The circuit of claim 1, wherein when the integration module comprises a plurality of second integrators, each of the second integrators is connected in series in the integration module, and each of the second integrators has the same structure, and comprises a second transconductance amplifier, a second positive end capacitor and a second negative end capacitor, wherein the negative output terminal of the second transconductance amplifier is connected with terminals of the second negative end capacitor, the other terminal of the second negative end capacitor is grounded, the positive output terminal of the second transconductance amplifier is connected with terminal of the second positive end capacitor, and the other terminal of the second positive end capacitor is grounded;
    the positive input end of the first integrator in the second integrators connected in series in sequence is connected with the negative output end of the th integrator, and the negative input end of the first integrator is connected with the positive output end of the th integrator;
    in each second integrator connected in series in sequence, a positive output end of each second transconductance amplifier is connected with a positive port on the summer, and a negative output end of each second transconductance amplifier is connected with a negative port on the summer;
    in two adjacent second integrators connected in series in sequence, the positive input ends of the rear second integrators are connected with the negative output ends of the front second integrators, and the negative input ends of the rear second integrators are connected with the positive output ends of the front second integrators.
  4. 4. The circuit of claim 3, wherein the integration module further comprises:
    a third transconductance amplifier;
    the positive output end of the last second integrator in the second integrators sequentially connected in series is connected with the positive input end of the third transconductance amplifier, the negative output end of the last second integrator is connected with the negative input end of the third transconductance amplifier, the positive input end of the last second integrator is connected with the negative output end of the third transconductance amplifier, and the negative input end of the last second integrator is connected with the positive output end of the third transconductance amplifier.
  5. 5. The circuit of claim 1, wherein the digital-to-analog converter comprises an exclusive-or circuit, an inverter, a second inverter, a third inverter, a switching tube, a second switching tube, a third switching tube, a fourth switching tube, a fifth switching tube and a sixth switching tube;
    an th input end of the exclusive-or circuit is connected with a clock circuit, a second input end of the exclusive-or circuit is respectively connected with an output end of the quantizer and an input end of the second inverter, and an output end of the exclusive-or circuit is respectively connected with an input end of the th inverter and a grid electrode of the fourth switch tube;
    the output end of the th inverter is connected with the third switching tube;
    the output end of the second phase inverter is respectively connected with the input end of the third phase inverter and the grid electrode of the second switching tube;
    the output end of the third inverter is connected with the gate of the th switching tube;
    the grid electrode of the fifth switching tube and the grid electrode of the sixth switching tube are both connected with the output end of the current bias circuit;
    the source electrode of the fifth switching tube is grounded, and the drain electrode of the fifth switching tube is respectively connected with the source electrode of the switching tube and the source electrode of the second switching tube;
    the source electrode of the sixth switching tube is grounded, and the drain electrode of the sixth switching tube is respectively connected with the source electrode of the third switching tube and the source electrode of the fourth switching tube;
    the drain electrode of the th switching tube and the drain electrode of the fourth switching tube are connected with the th output end;
    and the drain electrode of the second switching tube and the drain electrode of the third switching tube are connected with a second output end.
  6. A portable device of the type , comprising:
    a control circuit, a sound source power amplifier circuit, a sound source and the analog-to-digital conversion circuit of any of claims 1-5, wherein the control circuit is respectively connected with the analog-to-digital conversion circuit and the sound source power amplifier circuit, and the sound source is respectively connected with the analog-to-digital conversion circuit and the sound source power amplifier circuit;
    the analog-to-digital conversion circuit is used for performing analog-to-digital conversion on a voltage signal corresponding to current currently input to the sound source to obtain a Pulse Density Modulation (PDM) data stream;
    the control circuit generates a control signal according to the PDM data stream, and sends the control signal to the sound source power amplification circuit so as to control the sound source power amplification circuit to output current with the size corresponding to the control signal to the sound source.
  7. 7, A/D conversion method, comprising:
    integrating the th input signal to obtain a th integrated signal;
    integrating the th integrated signal at least times to obtain integrated signals after each integration, thereby obtaining at least integrated signals;
    summing the th integrated signal and the at least integrated signals to obtain a second input signal;
    and carrying out quantization operation on the second input signal to obtain a Pulse Density Modulation (PDM) data stream corresponding to the second input signal.
  8. 8. The method of claim 7, further comprising:
    receiving a voltage signal, and converting the voltage signal into an th current signal;
    performing digital-to-analog conversion on the PDM data stream to obtain a current feedback signal corresponding to the PDM data stream;
    and obtaining a th input signal by subtracting the th current signal and the current feedback signal.
  9. 9. The method of claim 7, wherein the quantization operation comprises:
    continuously sampling the second input signal according to an external clock signal to obtain each signal sampling value;
    if the signal sampling value obtained by current sampling is not the first signal sampling value, determining the difference value between the signal sampling value and the signal sampling value obtained by previous times of sampling;
    and carrying out low-order quantization on the difference value.
  10. 10. The method of claim 7, wherein if or more of the at least integrated signals exceed a predetermined magnitude, the or more integrated signals are discarded when summed.
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