CN110737126B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN110737126B CN110737126B CN201911054098.8A CN201911054098A CN110737126B CN 110737126 B CN110737126 B CN 110737126B CN 201911054098 A CN201911054098 A CN 201911054098A CN 110737126 B CN110737126 B CN 110737126B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Human Computer Interaction (AREA)
- Multimedia (AREA)
- Theoretical Computer Science (AREA)
Abstract
The invention discloses a display panel and a display device, and relates to the technical field of display, wherein the display panel comprises a display area and a non-display area; the display area comprises a fingerprint identification area, and the fingerprint identification area comprises a fingerprint identification circuit; the fingerprint identification circuit comprises a fingerprint identification unit, a power line and a voltage output line, wherein the power line and the voltage output line are electrically connected with the fingerprint identification unit; the display panel also comprises an array substrate, wherein the array substrate comprises a substrate base plate, a first metal layer arranged on one side of the substrate base plate, a second metal layer arranged on one side of the first metal layer far away from the substrate base plate and a third metal layer arranged on one side of the second metal layer far away from the substrate base plate; the power line and the voltage output line are both positioned on the third metal layer; need not to set up solitary rete structure for the power cord that the fingerprint identification unit links to each other and voltage output line to reduce the wiring quantity in fingerprint identification district, be favorable to simplifying the circuit structure in fingerprint identification district, can increase the aperture opening ratio in the display area that fingerprint identification district corresponds simultaneously.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
With the progress of modern society, the importance of personal identification and personal information security has gradually received attention. Because human fingerprints have uniqueness and invariance, the fingerprint identification technology has the characteristics of good safety, high reliability and simple and convenient use, so that the fingerprint identification technology is widely applied to various fields for protecting personal information safety, particularly the field of mobile terminals, such as mobile phones, notebook computers, tablet computers, digital cameras and the like. The fingerprint identification function is one of the commonly used functions of the electronic equipment at present, and has important significance for enhancing the safety of the electronic equipment, expanding the application range of the electronic equipment and the like.
The display area integrating fingerprint identification into the display device has become a trend, the fingerprint identification area comprises a fingerprint identification circuit, the fingerprint identification circuit comprises a fingerprint identification unit and a plurality of signal lines electrically connected with the fingerprint identification unit, and the circuit structure of the fingerprint identification area is complex and the wiring difficulty is high due to the fact that the number of the signal lines in the fingerprint identification area is large.
Disclosure of Invention
In view of this, the present invention provides a display panel and a display device, in which a display area of the display panel includes a fingerprint identification area, and a power line and a voltage output line electrically connecting the fingerprint identification area and a fingerprint identification unit are disposed on a third metal layer of an array substrate of the display panel, so as to facilitate simplification of a circuit structure of the fingerprint identification area.
In a first aspect, the present application provides a display panel comprising a display area and a non-display area; the display area comprises a fingerprint identification area which comprises a fingerprint identification circuit;
the fingerprint identification circuit comprises a fingerprint identification unit, and a power line and a voltage output line which are electrically connected with the fingerprint identification unit;
the display panel further comprises an array substrate, wherein the array substrate comprises a substrate base plate, a first metal layer arranged on one side of the substrate base plate, a second metal layer arranged on one side of the first metal layer far away from the substrate base plate and a third metal layer arranged on one side of the second metal layer far away from the substrate base plate;
the power line and the voltage output line are both located on the third metal layer.
In a second aspect, the present application provides a display device comprising a display panel.
Compared with the prior art, the display panel and the display device provided by the invention at least realize the following beneficial effects:
this application is with the integrated display area that advances display panel in fingerprint identification district, the fingerprint identification district includes the fingerprint identification circuit, the fingerprint identification circuit includes the fingerprint identification unit and power cord and the voltage output line that links to each other with the fingerprint identification unit electricity, through all setting up power cord and voltage output line in the third metal level of display panel array substrate, need not to set up solitary rete structure for power cord and voltage output line that the fingerprint identification unit links to each other, third metal level in the multiplexing array substrate can, so can reduce the wiring quantity in fingerprint identification district promptly, be favorable to simplifying the circuit structure in fingerprint identification district, still be favorable to increasing the aperture ratio in the display area that the fingerprint identification district corresponds.
Of course, it is not necessary for any product in which the present invention is practiced to achieve all of the above-described technical effects simultaneously.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is a schematic view of a display panel according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a fingerprint identification circuit according to an embodiment of the present application;
FIG. 3 is an AA' cross-sectional view of FIG. 1 according to an embodiment of the present application;
fig. 4 is a schematic routing diagram of a third metal layer according to an embodiment of the present disclosure;
fig. 5 is a partial top view of a display panel provided in an embodiment of the present application;
FIG. 6 is another cross-sectional view AA' of FIG. 1, as provided in accordance with an embodiment of the present application;
FIG. 7 is a cross-sectional view of a BB' of FIG. 1 according to an embodiment of the present disclosure;
fig. 8 is a top view of a display device according to an embodiment of the present application.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
The display area integrating fingerprint identification into the display device has become a trend, the fingerprint identification area comprises a fingerprint identification circuit, the fingerprint identification circuit comprises a fingerprint identification unit and a plurality of signal lines electrically connected with the fingerprint identification unit, and the circuit structure of the fingerprint identification area is complex and the wiring difficulty is high due to the fact that the number of the signal lines in the fingerprint identification area is large.
In view of this, the present invention provides a display panel and a display device, in which a display area of the display panel includes a fingerprint identification area, and a power line and a voltage output line electrically connecting the fingerprint identification area and a fingerprint identification unit are disposed on a third metal layer of an array substrate of the display panel, so as to facilitate simplification of a circuit structure of the fingerprint identification area.
Fig. 1 is a schematic diagram of a display panel according to an embodiment of the present disclosure, fig. 2 is a schematic diagram of a fingerprint identification circuit according to an embodiment of the present disclosure, fig. 3 is an AA' cross-sectional diagram of fig. 1 according to an embodiment of the present disclosure, fig. 4 is a schematic diagram of a trace of a third metal layer according to an embodiment of the present disclosure, please refer to fig. 1 to fig. 4, a display panel 100 is provided, and the display panel 100 includes a display area 10 and a non-display area 20; the display area 10 comprises a fingerprint identification area 30, and the fingerprint identification area 30 comprises a fingerprint identification circuit 200;
the fingerprint identification circuit 200 comprises a fingerprint identification unit 47, and a power line 531 and a voltage output line 532 which are electrically connected with the fingerprint identification unit 47;
the display panel 100 further includes an array substrate 40, where the array substrate 40 includes a substrate 41, a first metal layer 42 disposed on one side of the substrate 41, a second metal layer 43 disposed on one side of the first metal layer 42 away from the substrate 41, and a third metal layer 44 disposed on one side of the second metal layer 43 away from the substrate 41;
the power supply line 531 and the voltage output line 532 are both located in the third metal layer 44.
Specifically, the present application provides a display panel 100, the display panel 100 includes a display area 10 and a non-display area 20, the non-display area 20 of the display panel 100 may be present around the display area 10, as shown in fig. 1; the display area 10 of the display panel 100 includes a fingerprint identification area 30, that is, the fingerprint identification area 30 of the present application is integrated in the display area 10 of the display panel 100, and is not fingerprint-identified in the non-display area 20; the fingerprint identification area 30 of the application includes the fingerprint identification circuit 200, and the fingerprint identification circuit 200 includes the fingerprint identification unit 47 and a plurality of signal lines that are connected with the fingerprint identification unit 47 electricity, and the signal line that is connected with the fingerprint identification unit 47 includes power supply line 531 and voltage output line 532 at least, and this power supply line 531 is used for providing power signal for the fingerprint identification unit 47, and voltage output line 532 is used for outwards conducting the voltage signal of fingerprint identification unit 47.
It should be noted that fig. 1 only shows a part of the fingerprint identification area 30 integrated in the display area 10, the present application is not limited to multiplexing the area of the fingerprint identification area 30 and the area of the display area 10, in a specific case, the area of the fingerprint identification area 30 may be the same as the area of the display area 10, the present application is not specifically limited to this, and the area of the fingerprint identification area 30 may be adjusted accordingly according to actual requirements. Fig. 2 shows a schematic diagram of only one fingerprint identification circuit 200 electrically connected to one fingerprint identification unit 47, one fingerprint identification circuit 200 shown in fig. 2 for each fingerprint identification unit 47.
The display panel 100 further includes an array substrate 40, where the array substrate 40 includes a substrate 41, a first metal layer 42, a second metal layer 43, and a third metal layer 44, which are sequentially disposed, where the second metal layer 43 is disposed on a side of the first metal layer 42 away from the substrate 41, and the third metal layer 44 is disposed on a side of the second metal layer 43 away from the substrate 41. It should be noted that, in the present application, only the substrate 41, the first metal layer 42, the second metal layer 43, and the third metal layer 44 of the array substrate 40 are shown, the first metal layer 42 and the second metal layer 43 are separated by the insulating layer 46, and the second metal layer 43 and the third metal layer 44 are also separated by the insulating layer 46, and the present application does not limit that the array substrate 40 only includes the above-mentioned film layer structure, and does not limit that other film layer structures are not included between the above-mentioned film layers.
This application all sets up in the third metal level 44 of array substrate 40 through power cord 531 and the voltage output line 532 with fingerprint identification district 30, need not to set up solitary rete structure for power cord 531 and the voltage output line 532 that fingerprint identification unit 47 links to each other, third metal level 44 in multiplexing array substrate 40 can, arrange the setting through the rete to fingerprint identification district 30 part signal line, can enough reduce the wiring quantity in fingerprint identification district 30, be favorable to simplifying the circuit structure in fingerprint identification district 30, can increase the aperture ratio in the display area 10 that fingerprint identification district 30 corresponds simultaneously, be favorable to improving display panel 100's display effect.
Referring to fig. 3 and fig. 4, optionally, the display device further includes a plurality of touch electrodes 62 and touch signal lines 51 electrically connected to the touch electrodes 62 in a one-to-one correspondence manner, the touch signal lines 51 are located on the third metal layer 44, each touch signal line 51 extends along a first direction and is arranged along a second direction, and the first direction and the second direction intersect;
in the third metal layer 44, at least a portion of two adjacent touch signal lines 51 includes a first trace 53 and a second trace 52, the first trace 53 extends along a first direction and is arranged along a second direction, at least a portion of the first trace 53 is multiplexed as a power line 531, and at least a portion of the first trace 53 is multiplexed as a voltage output line 532; the second traces 52 extend in a first direction and are arranged in a second direction.
Specifically, the display panel 100 further includes touch electrodes 62 and touch signal lines 51 connected to the touch electrodes 62 in a one-to-one correspondence, and the touch signal lines 51 in this application are also disposed on the third metal layer 44 of the array substrate 40, i.e., disposed on the same layer as the power lines 531 and the voltage output lines 532. Each of the touch signal lines 51 is arranged in a manner extending along a first direction of the display panel 100 and arranged along a second direction, and the first direction and the second direction intersect with each other. In the third metal layer 44 of the array substrate 40, a first trace 53 and a second trace 52 are included between two touch signal lines 51 that are partially adjacent to each other, where the first trace 53 and the second trace 52 both extend along a first direction and are arranged along a second direction; in a specific case, the touch signal line 51, the first trace 53 and the second trace 52 in the third metal layer 44 are arranged in parallel. Wherein, a part of the first wire 53 is multiplexed as the power line 531, a part of the first wire 53 is multiplexed as the voltage output line 532, and since the power line 531 and the voltage output line 532 are electrically connected to the fingerprint identification unit 47, the first wire 53 that can be multiplexed as the power line 531 and the voltage output line 532 is located in the fingerprint identification area 30, that is, the orthographic projection of the first wire 53 on the substrate 41 of the array substrate 40 is located in the orthographic projection of the fingerprint identification area 30 on the substrate 41. The second trace 52 is located in a position where the non-fingerprint identification area of the display area 10 of the display panel 100 is located, that is, an orthogonal projection of the second trace 52 on the substrate 41 does not overlap an orthogonal projection of the fingerprint identification area 30 on the substrate 41. It should be noted that the second trace 52 is a dummy trace, and the second trace 52 is used for avoiding interference between the touch signal lines 51 when the display panel 100 operates.
It should be noted that, in the fingerprint identification area 30 of the present application, the dummy trace between the adjacent touch signal lines 51 in the original third metal layer 44 is set as a normal signal line, that is, there is no disconnected long trace, and the long trace is multiplexed to be electrically connected to the power line 531 and the voltage output line 532 of the fingerprint identification unit 47, and there is no need to additionally set the power line 531 and the voltage output line 532, so that the number of traces in the fingerprint identification area 30 of the display panel 100 is reduced, and there is no need to set a separate film structure for the power line 531 and the voltage output line 532 connected to the fingerprint identification unit 47, which is beneficial to simplifying the circuit structure of the fingerprint identification area 30, and at the same time, the aperture ratio in the display area 10 corresponding to the fingerprint identification area 30 can be increased.
Fig. 5 is a partial top view of the display panel according to the embodiment of the present disclosure, referring to fig. 1, fig. 4 and fig. 5, optionally, two adjacent touch signal lines 51 include a first space 54 along a second direction, and the power line 531 and the voltage output line 532 corresponding to the same fingerprint identification circuit 200 are located in the same first space 54.
Specifically, along the second direction, the adjacent touch signal lines 51 include a first interval 54 region, and in the fingerprint identification area 30 of the present application, the power line 531 and the voltage output line 532 corresponding to the same fingerprint identification circuit 200 are located in the same first interval 54; that is, in the fingerprint identification area 30, two adjacent touch signal lines 51 each include a power line 531 and a voltage output line 532 therebetween, and the power line 531 and the voltage output line 532 are electrically connected to the corresponding fingerprint identification unit 47, and are configured to provide a power signal to the fingerprint identification unit 47 and conduct the voltage signal to the outside. It should be noted that fig. 4 only schematically depicts a layout schematic diagram of the signal traces in the third metal layer 44, and the present application does not limit the signal traces to be linear, and also does not limit the number of the signal lines and the number and size of the touch electrodes 62, and the actual design and production can be adjusted and controlled according to the requirements.
With reference to fig. 1, fig. 4 and fig. 5, optionally, each second trace 52 includes a plurality of first line segments 521 insulated from each other along the first direction, the length of each first line segment 521 along the first direction is smaller than the length of the touch signal line 51, and a second space 55 is included between two adjacent first line segments 521.
Specifically, in order to avoid the occurrence of a dummy long trace in the non-fingerprint identification area on the third metal layer 44, each second trace 52 located in the non-fingerprint identification area of the display area 10 includes a plurality of first line segments 521 insulated from each other along the second direction, that is, each second trace 52 is composed of a plurality of first line segments 521, and two adjacent first line segments 521 along the second direction are arranged in an insulated manner, and a second interval 55 is included between two adjacent first line segments 521; in the first direction, the length of each first line segment 521 is smaller than the length of the touch signal line 51; in a specific case, the length of one second trace 52 formed by a plurality of first line segments 521 is the same as the length of the touch signal line 51. Therefore, the wiring structures in the display area 10 of the display panel 100 are arranged neatly, which is beneficial to facilitating the arrangement of other components inside the display panel 100. It should be noted that fig. 4 only schematically depicts the length and the number of the first line segments 521, and the length and the number of the first line segments 521 are not specifically limited in this application.
Referring to fig. 3 and fig. 5, optionally, the display panel 100 further includes a supporting pillar 56 and a light shielding layer 57; the light shielding layer 57 is located on the side of the third metal layer 44 away from the substrate 41; the supporting pillars 56 are positioned between the array substrate 40 and the light shielding layer 57; the orthographic projection of the supporting columns 56 on the substrate 41 at least partially overlaps the orthographic projection of the touch signal lines 51, the first routing lines 53 and the second routing lines 52 on the substrate 41.
Specifically, the display panel 100 at least further includes a liquid crystal layer 60, a support pillar 56, a light-shielding layer 57, and a color film substrate 61, where the liquid crystal layer 60 is disposed between the array substrate 40 and the color film substrate 61, and the color film substrate 61 is located on a side of the third metal layer 44 away from the substrate 41; the shading layer 57 is arranged on one surface of the color film substrate 61 close to the array substrate 40, and the supporting columns 56 are also arranged between the array substrate 40 and the shading layer 57, that is, the supporting columns 56 span the whole liquid crystal layer 60; the supporting columns 56 are used for supporting the array substrate 40 and the color film substrate 61 above and below the liquid crystal layer 60, so as to prevent the liquid crystal layer 60 from being deformed too much when being squeezed by an external force, thereby ensuring the normal display effect of the display panel 100. The orthographic projection of the support column 56 on the substrate 41 is partially overlapped with the orthographic projection of the touch signal line 51, the first routing line 53 and the second routing line 52 on the substrate 41; that is, a part of the supporting pillars 56 is disposed directly above the touch signal lines 51, the first traces 53, and the second traces 52 arranged on the third metal layer 44.
With continued reference to fig. 3 and 5, optionally, the orthographic projection of the supporting pillars 56 on the substrate base 41 does not overlap with the orthographic projection of the second spacers 55 on the substrate base 41.
Specifically, in the display area 10, along the second direction, a second space 55 is included between two adjacent first segments 521, and any supporting column 56 is not disposed in the second space 55, that is, an orthogonal projection of the supporting column 56 on the substrate base 41 does not overlap an orthogonal projection of the second space 55 on the substrate base 41; the supporting columns 56 are not arranged in the second intervals 55, so that the supporting columns 56 can be prevented from displacing in the second intervals 55 when the liquid crystal layer 60 is extruded by an external force; since the alignment of the liquid crystal layer 60 is affected by the displacement of the supporting pillars 56, the display effect of the display panel 100 is easily affected; therefore, the supporting columns 56 of the present application are not disposed in the second space 55, which is beneficial to ensure the display effect of the display panel 100.
With reference to fig. 3 and fig. 5, optionally, the orthographic projection of the light shielding layer 57 on the substrate 41 covers the orthographic projection of the support pillars 56 and the second spacers 55 on the substrate 41.
Specifically, in order to avoid light leakage, the light-shielding layer 57 is provided on the lower side of the color filter substrate 61 in the display panel 100, but the light-shielding layer 57 is not attached to the color filter substrate 61 entirely, and only an orthographic projection of the light-shielding layer 57 on the base substrate 41 can cover an orthographic projection of the support pillars 56 and the second spacers 55 on the base substrate 41. The orthographic projection of the light shielding layer 57 on the substrate 41 is limited to cover the orthographic projection of the supporting column 56 on the substrate 41, and the light leakage phenomenon caused by the fact that the supporting column 56 slightly displaces to enable liquid crystal molecules to shift or the light leakage phenomenon caused by the change of liquid crystal alignment can be avoided when the liquid crystal layer 60 is extruded by external large force.
With reference to fig. 3 and fig. 5, optionally, the orthographic projection of the second spacer 55 on the substrate base 41 includes a first edge 551 parallel to the second direction and a second edge 552 opposite to the first edge 551, the distance between the orthographic projection of the supporting pillar 56 on the substrate base 41 and the first edge 551 is smaller than the distance between the orthographic projection of the supporting pillar 56 on the substrate base 41 and the second edge 552, the distance between the supporting pillar 56 and the first edge 551 is D1, and D1 is greater than 3 μm.
Specifically, an orthogonal projection of the second space 55 between two adjacent first line segments 521 on the substrate 41 includes a first edge 551 and a second edge 552, the first edge 551 and the second edge 552 are both parallel to the second direction, and it can also be said that two broken edges of two adjacent first line segments 521 next to each other in the first direction are the first edge 551 and the second edge 552, respectively. The present application defines that the first edge 551 is closer to the orthographic projection of the supporting column 56 on the substrate base plate 41, that is, the distance between the orthographic projection of the supporting column 56 on the substrate base plate 41 and the first edge 551 is smaller than the distance between the orthographic projection of the supporting column 56 on the substrate base plate 41 and the second edge 552, and the distance between the orthographic projection of the supporting column 56 on the substrate base plate 41 and the first edge 551 is D1, wherein D1 > 3 μm. When the distance between the supporting pillar 56 and the second space 55 is too small, that is, when the distance between the orthographic projection of the supporting pillar 56 on the substrate 41 and the first edge 551 is D1 ≤ 3 μm, if the liquid crystal layer 60 is pressed by a large external force to cause a relative displacement of the position of the supporting pillar 56, the supporting pillar 56 may slide into the second space 55, which may affect the alignment of the liquid crystal, and cause the display panel 100 to be too bright or too dark. In the present application, D1 is limited to be larger than 3 μm to prevent the supporting pillars 56 from being too close to the second spacing 55, so as to avoid uneven thickness of the area between the array substrate 40 and the color filter substrate 61 in the display panel 100, and to be beneficial to ensuring the display effect of the display panel 100.
With reference to fig. 3 and fig. 5, optionally, the orthographic projection of the light-shielding layer 57 on the substrate 41 includes a third edge 571 parallel to the second direction and a fourth edge 572 opposite to the third edge 571, a distance between the third edge 571 and the second edge 552 is smaller than a distance between the third edge 571 and the first edge 551, a distance between the third edge 571 and the first edge 551 is smaller than a distance between the fourth edge 572 and the first edge 551/the second edge 552, a distance between the third edge 571 and the second edge 552 is D2, and D2 is greater than 3 μm.
Specifically, the orthographic projection of the arranged light shielding layer 57 on the substrate 41 may be a horizontal stripe shape, the horizontal stripe shape light shielding layer 57 extends along the second direction, and the light shielding layers are arranged along the first direction; the orthographic projection of the light-shielding layer 57 on the substrate 41 includes a third edge 571 and a fourth edge 572 parallel to the second direction, wherein the distance between the third edge 571 of the light-shielding layer 57 and the second edge 552 of the second spacer 55 is smaller than the distance between the third edge 571 and the first edge 551, and the distance between the third edge 571 and the first edge 551 is defined to be smaller than the distance between the fourth edge 572 and the first edge 551/second edge 552; that is, when comparing the projection of light-shielding layer 57 on substrate 41 with second space 55, the distance between third edge 571 of light-shielding layer 57 and second edge 552 of second space 55 is minimum, and the distance D2 between third edge 571 and second edge 552 is defined to be greater than 3 μm in the present application, so as to avoid that the edge of light-shielding layer 57 and second space 55 are too close; only if the distance D2 between the third edge 571 and the second edge 552 is greater than 3 μm, it can be effectively ensured that when the position of the supporting pillar 56 is shifted to cause a change in the liquid crystal alignment, the light shielding layer 57 can shield the highlight or too dark display caused by the change in the liquid crystal alignment, which is beneficial to achieving a good light shielding effect and ensuring good display of the display panel 100.
It should be noted that the light shielding layer 57 provided in the present application is a horizontal stripe shape, which is only a preferred embodiment, and the light shielding layer 57 may also be a block shape, and the present application is not particularly limited thereto, as long as the orthographic projection of the light shielding layer 57 on the substrate 41 can cover the orthographic projection of the support pillars 56 and the second spacers 55 on the substrate 41.
Fig. 6 is another cross-sectional view AA' of fig. 1 according to an embodiment of the present disclosure, referring to fig. 6, optionally, the array substrate 40 further includes a first electrode layer 45 located on a side of the third metal layer 44 away from the substrate 41, an insulating layer 46 is disposed between the first electrode layer 45 and the third metal layer 44, and in a display stage, the first electrode layer 45 is configured to receive a common voltage signal.
Specifically, the array substrate 40 further includes a first electrode layer 45 located on a side of the third metal layer 44 away from the substrate 41, an insulating layer 46 is disposed between the third metal layer 44 and the first electrode layer 45, the first electrode layer 45 is used for receiving a common voltage signal during a display stage of the display panel 100, and a portion of the first electrode layer 45 used for receiving the common voltage signal may be connected to the third metal layer 44 by a via penetrating through a space between the third metal layer 44 and the first electrode layer 45. Here, the first electrode layer 45 may be a transparent conductive electrode layer, and the material of the first electrode layer 45 may be indium tin oxide, that is, the first electrode layer 45 is an ITO electrode layer.
Fig. 7 is a BB' cross-sectional view of fig. 1 according to an embodiment of the present application, and referring to fig. 1 and fig. 7, optionally, the fingerprint identification circuit 200 further includes a reference voltage terminal Vbias, where the reference voltage terminal Vbias is located in the first electrode layer 45; in the fingerprint identification phase, the reference voltage terminal Vbias is electrically connected with the anode of the fingerprint identification unit 47 through a via hole, and within the fingerprint identification area 30, the reference voltage terminal Vbias is used for transmitting a reference voltage signal.
Specifically, the fingerprint identification circuit 200 of the present application further includes a reference voltage terminal Vbias, where Vbias is located in the first electrode layer 45, and during the fingerprint identification phase, Vbias of the present application may be electrically connected to the anode of fingerprint identification unit 47 through a via penetrating through insulating layer 46, that is, first electrode layer 45 in fingerprint identification area 30 is multiplexed to transmit a reference voltage signal during the fingerprint identification phase.
Referring to fig. 1, optionally, the fingerprint identification circuit 200 further includes a selection signal line Select, a Reset signal line Reset, a first capacitor Cst, a first thin film transistor T1, a second thin film transistor T2, and a third thin film transistor T3;
the reference voltage terminal Vbias is electrically connected to a first terminal of the first capacitor Cst, a gate of the first thin film transistor T1 is electrically connected to a Reset signal line Reset, a first pole of the first thin film transistor T1 is electrically connected to a cathode of the fingerprint recognition unit 47, a second terminal of the first capacitor Cst, and a gate of the second thin film transistor T2, a second pole of the first thin film transistor T1 is electrically connected to the power line 531 and a first pole of the second thin film transistor T2, a second pole of the second thin film transistor T2 is electrically connected to a first pole of the third thin film transistor T3, a gate of the third thin film transistor T3 is electrically connected to the selection signal line Select, and a second pole of the third thin film transistor T3 is electrically connected to the voltage output line 532.
Specifically, the reference voltage terminal Vbias in the fingerprint identification circuit 200 is electrically connected to a first terminal of the first capacitor Cst, a gate of the first thin film transistor T1 is electrically connected to the Reset signal line Reset, a first pole of the first thin film transistor T1 is electrically connected to a cathode of the fingerprint identification unit 47, a second terminal of the first capacitor Cst, and a gate of the second thin film transistor T2, a second pole of the first thin film transistor T1 is electrically connected to the power supply line 531, a first pole of the second thin film transistor T2, a second pole of the second thin film transistor T2 is electrically connected to a first pole of the third thin film transistor T3, a gate of the third thin film transistor T3 is electrically connected to the selection signal line Select, and a second pole of the third thin film transistor T3 is electrically connected to the voltage output line 532.
Fig. 8 is a top view of a display device according to an embodiment of the present application, please refer to fig. 8, and based on the same inventive concept, the present application further provides a display device 300, where the display device 300 includes a display panel 100, and the display panel 100 is any one of the display panels 100 provided in the present application.
It should be noted that, for the embodiments of the display device 300 provided in the embodiments of the present application, reference may be made to the above-mentioned embodiments of the display panel 100, and repeated descriptions are omitted. The display device 300 provided by the present application may be: any product and component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a navigator and the like.
As can be seen from the above embodiments, the display panel and the display device provided by the present invention at least achieve the following beneficial effects:
this application is with the integrated display area that advances display panel in fingerprint identification district, the fingerprint identification district includes the fingerprint identification circuit, the fingerprint identification circuit includes the fingerprint identification unit and power cord and the voltage output line that links to each other with the fingerprint identification unit electricity, through all setting up power cord and voltage output line in the third metal level of display panel array substrate, need not to set up solitary rete structure for power cord and voltage output line that the fingerprint identification unit links to each other, third metal level in the multiplexing array substrate can, so can reduce the wiring quantity in fingerprint identification district promptly, be favorable to simplifying the circuit structure in fingerprint identification district, still be favorable to increasing the aperture ratio in the display area that the fingerprint identification district corresponds.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (12)
1. A display panel, comprising a display region and a non-display region; the display area comprises a fingerprint identification area which comprises a fingerprint identification circuit;
the fingerprint identification circuit comprises a fingerprint identification unit, and a power line and a voltage output line which are electrically connected with the fingerprint identification unit;
the display panel further comprises an array substrate, wherein the array substrate comprises a substrate base plate, a first metal layer arranged on one side of the substrate base plate, a second metal layer arranged on one side of the first metal layer far away from the substrate base plate and a third metal layer arranged on one side of the second metal layer far away from the substrate base plate;
the power line and the voltage output line are both positioned on the third metal layer;
the touch control circuit further comprises a plurality of touch control electrodes and touch control signal lines which are electrically connected with the touch control electrodes in a one-to-one correspondence mode, the touch control signal lines are located on the third metal layer, each touch control signal line extends along a first direction and is distributed along a second direction, and the first direction is intersected with the second direction;
at least a part of the adjacent two touch signal lines of the third metal layer include a first routing line and a second routing line, the first routing line extends along the first direction and is distributed along the second direction, at least a part of the first routing line is multiplexed as the power line, and at least a part of the first routing line is multiplexed as the voltage output line; the second routing lines extend along the first direction and are arranged along the second direction.
2. The display panel according to claim 1, wherein two adjacent touch signal lines in the second direction include a first space therebetween, and the power line and the voltage output line corresponding to a same fingerprint identification circuit are located in the same first space.
3. The display panel according to claim 1, wherein along the first direction, each of the second traces includes a plurality of first line segments insulated from each other, and along the first direction, a length of each of the first line segments is smaller than a length of the touch signal line, and a second space is included between two adjacent first line segments.
4. The display panel according to claim 3, further comprising a support pillar and a light-shielding layer; the light shielding layer is positioned on one side of the third metal layer far away from the substrate; the supporting columns are positioned between the array substrate and the shading layer; the orthographic projection of the supporting columns on the substrate base plate is at least partially overlapped with the orthographic projection of the touch signal lines, the first routing lines and the second routing lines on the substrate base plate.
5. The display panel of claim 4, wherein an orthographic projection of the support posts on the substrate base plate does not overlap with an orthographic projection of the second spacers on the substrate base plate.
6. The display panel according to claim 4, wherein an orthographic projection of the light shielding layer on the substrate base plate covers an orthographic projection of the support posts and the second spacers on the substrate base plate.
7. The display panel of claim 5, wherein the orthographic projection of the second gap on the substrate base plate comprises a first edge parallel to the second direction and a second edge opposite to the first edge, the orthographic projection of the supporting column on the substrate base plate is closer to the first edge than the second edge, the distance between the orthographic projection of the supporting column on the substrate base plate is D1, and D1 is greater than 3 μm.
8. The display panel according to claim 7, wherein an orthographic projection of the light-shielding layer on the substrate comprises a third edge parallel to the second direction and a fourth edge opposite to the third edge, wherein a distance between the third edge and the second edge is smaller than a distance between the third edge and the first edge, and a distance between the third edge and the first edge is smaller than a distance between the fourth edge and the first edge/the second edge, and wherein a distance between the third edge and the second edge is D2, and D2 > 3 μm.
9. The display panel of claim 1, wherein the array substrate further comprises a first electrode layer located on a side of the third metal layer away from the substrate, an insulating layer is disposed between the first electrode layer and the third metal layer, and the first electrode layer is configured to receive a common voltage signal during a display phase.
10. The display panel of claim 9, wherein the fingerprint identification circuit further comprises a reference voltage terminal, the reference voltage terminal being located at the first electrode layer; in the fingerprint identification stage, the reference voltage end is electrically connected with the anode of the fingerprint identification unit through a through hole, and in the fingerprint identification area, the reference voltage end is used for transmitting a reference voltage signal.
11. The display panel according to claim 10, wherein the fingerprint recognition circuit further comprises a selection signal line, a reset signal line, a first capacitor, a first thin film transistor, a second thin film transistor, and a third thin film transistor;
the reference voltage end is electrically connected with the first end of the first capacitor, the grid electrode of the first thin film transistor is electrically connected with the reset signal line, the first pole of the first thin film transistor is electrically connected with the cathode of the fingerprint identification unit, the second end of the first capacitor and the grid electrode of the second thin film transistor, the second pole of the first thin film transistor is electrically connected with the power line and the first pole of the second thin film transistor, the second pole of the second thin film transistor is electrically connected with the first pole of the third thin film transistor, the grid electrode of the third thin film transistor is electrically connected with the selection signal line, and the second pole of the third thin film transistor is electrically connected with the voltage output line.
12. A display device characterized by comprising the display panel according to any one of claims 1 to 11.
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| CN201911054098.8A CN110737126B (en) | 2019-10-31 | 2019-10-31 | Display panel and display device |
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| CN201911054098.8A CN110737126B (en) | 2019-10-31 | 2019-10-31 | Display panel and display device |
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| CN110737126B true CN110737126B (en) | 2022-03-29 |
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| CN112102727B (en) * | 2020-09-28 | 2022-08-30 | 厦门天马微电子有限公司 | Display panel and display device |
| CN112768493B (en) * | 2020-12-29 | 2022-10-04 | 厦门天马微电子有限公司 | Display panel and display device |
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