CN110718456A - High-reliability T-shaped gate manufacturing method, T-shaped gate and high-electron-mobility transistor - Google Patents
High-reliability T-shaped gate manufacturing method, T-shaped gate and high-electron-mobility transistor Download PDFInfo
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Abstract
The invention discloses a T-shaped gate manufacturing method with high reliability, a T-shaped gate and a high electron mobility transistor, which comprises the following thermal deformation steps: uniformly heating the diffusion micro-shrinkage layer and the first layer of root cavity pattern in an oven baking mode to form a first layer of root cavity with arc corners; or the shape of the first layer of root cavity pattern with the arc corner is corrected in a mode of uniform heating through an oven after the heating through the hot plate, so that the formation of a thin layer is avoided. The first layer of root cavity is uniformly heated by the oven, or the pattern is corrected by the oven after being heated by the hot plate, so that an inward collapse thin layer formed by uneven heating of the first layer of root cavity pattern due to upward heat transfer caused by heating of the hot plate is eliminated, the formation of the first layer of root cavity pattern with high reliability is realized, the problem that the characteristic dimension is enlarged due to the fact that the thin layer is removed in acid etching is avoided, and the uniformity of the prepared T-shaped grid is further improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a T-shaped gate manufacturing method with high reliability, a T-shaped gate and a high-electron-mobility transistor.
Background
HEMT devices in MMICs, highest operating frequency fmaxIs the frequency at which the gain is reduced to 1, which is mainly determined by the gate length, transconductance and die parasitic parameters (e.g. gate resistance R)gAnd a capacitor C). MMIC of the commonly used millimeter-band to Ka-band requires HEMT gate lengths of 0.15 μm to 0.25 μm, which results in a severe reduction of the cross-section and thus in a gate resistance RgRapidly increasing gate resistance RgThe rapid increase of which severely limits the maximum operating frequency f of the transistormaxAnd the reliability of the gate under high output power and high leakage current is affected. In order to ensure high operating frequency and high reliability of HEMT devices, T-shaped gates with short gate length, large cross-section and low resistance are generally used.
Currently, in the conventional technique of fabricating a T-shaped gate of 0.15 μm to 0.25 μm, the thermal deformation step is performed by heating the semiconductor substrate on a hot plate. At the moment, heat is transferred from the bottom to the top, so that the photoresist and the thermal deformation agent in the first layer of cavity are heated unevenly up and down, and collapse at the bottom is serious, and a thin layer collapsing inwards is formed at the bottom of the first layer of cavity. The thin layer cannot be distinguished during critical dimension measurement, and the thin layer is easily removed in a subsequent semiconductor substrate acid etching process, so that the critical dimension of the actually grown T-shaped gate is larger than that observed, the process cannot be stably controlled, and further the deviation of the critical dimension of the T-shaped gate causes the uniformity of the T-shaped gate in the semiconductor substrate to be reduced.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, provides a T-shaped gate manufacturing method with high reliability, a T-shaped gate and a high electron mobility transistor, and solves the problems in the traditional thermal deformation step for manufacturing the T-shaped gate with the thickness of 0.15-0.25 mu m.
The purpose of the invention is realized by the following technical scheme: a manufacturing method of a T-shaped gate with high reliability comprises the following steps:
a thermal deformation step: uniformly heating the diffusion micro-shrinkage layer and the first layer of root cavity pattern in an oven baking mode to form an isolation layer and a first layer of root cavity with arc corners;
or the shape of the first layer of root cavity pattern with the arc corner is corrected in a mode of uniform heating through an oven after the heating through the hot plate, so that the formation of a thin layer is avoided.
When the diffusion micro-shrinkage layer and the first layer of root cavity pattern are uniformly heated in an oven heating mode, the following steps are sequentially carried out before the thermal deformation step is carried out:
forming a first layer of root cavity: coating a first layer of photoresist on a semiconductor substrate, and baking, I-line photoetching, developing and cleaning the first layer of photoresist to form a first layer of root cavity with a vertical surface;
forming a diffusion micro-scale layer: coating a water-soluble micro-shrinkage layer, performing diffusion baking on the micro-shrinkage layer to form a diffusion micro-shrinkage layer only on the surface of the vertical surface, and removing the micro-shrinkage layer material without photo-acid diffusion by a water washing mode.
When the first layer of root cavity pattern is uniformly heated by adopting an oven heating mode, the following steps are sequentially carried out after the thermal deformation step is carried out:
forming an upper-layer head cavity: coating a second layer of photoresist on the surface of the first layer of root cavity, and baking, I-line photoetching, developing and cleaning the second layer of photoresist to form an upper layer of head cavity;
preparing a T-shaped gate: and etching the semiconductor substrate by acid until the root starting point of the growth of the grid metal layer, depositing and stripping the grid metal, and removing the first layer of root cavity, the isolation layer and the upper layer of head cavity to form the T-shaped grid.
When the diffusion micro-layer and the first layer of root cavity pattern with the arc corner are corrected in a mode of uniform heating through an oven after the heating through a hot plate, the following steps are sequentially carried out before the thermal deformation step is carried out:
forming a first layer of root cavity: coating a first layer of photoresist on a semiconductor substrate, and baking, I-line photoetching, developing and cleaning the first layer of photoresist to form a first layer of root cavity with a vertical surface;
forming a diffusion micro-scale layer: coating a water-soluble micro layer and carrying out diffusion baking on the micro layer to form a diffusion micro layer only on the surface of the vertical surface, and removing the micro layer material which is not diffused by photoacid in a water washing mode;
forming a first layer of root cavity with arc corners: baking and heating the first layer of photoresist through a hot plate, and forming a first layer of root cavity with arc corners on the first layer of photoresist.
When the first layer of root cavity pattern with the arc corner is corrected in a mode of uniformly heating through an oven after the heat plate is heated, the following steps are sequentially carried out after the thermal deformation step is carried out:
forming an isolation layer: forming a surface polymer spacer layer by low power ion bombardment;
forming an upper-layer head cavity: coating a second layer of photoresist on the surface of the first layer of root cavity, and baking, I-line photoetching, developing and cleaning the second layer of photoresist to form an upper layer of head cavity;
preparing a T-shaped gate: and etching the semiconductor substrate by acid until the root starting point of the growth of the grid metal layer, depositing and stripping the grid metal, and removing the first layer of root cavity, the isolation layer and the upper layer of head cavity to form the T-shaped grid.
The baking temperature of the oven for baking the water-soluble micro-shrinkage layer to form the isolation layer is higher than that of the oven for baking the diffusion micro-shrinkage layer and the first layer root cavity.
The thickness of the diffusion miniature layer formed on the vertical surface is 50-100 nm; the width of the first layer of root cavity with the arc corners is 0.12-0.22 mu m.
The width of the graph of the first layer of root cavity with the vertical surface formed by cleaning is 0.35-0.55 mu m; the top width of the upper-layer head cavity is 0.8-1.3 mu m; the bottom width X of the upper-layer head cavity is smaller than the top width Y of the isolation layer; the width of the bottom of the T-shaped gate is 0.15-0.25 μm.
A T-shaped gate with high reliability is manufactured by the manufacturing method.
A high electron mobility transistor comprises the T-shaped gate.
The invention has the beneficial effects that: a T-shaped gate manufacturing method with high reliability, a T-shaped gate and a high electron mobility transistor have the following advantages:
1. uniformly heating the first layer of root cavity by adopting an oven, or correcting the pattern by the oven after heating by a hot plate, so as to eliminate an inward collapse thin layer formed by uneven heating of the first layer of root cavity pattern due to upward heat transfer caused by heating of the hot plate, realize formation of the first layer of root cavity pattern with high reliability, avoid the problem of characteristic size expansion caused by removal of the thin layer in acid etching, and further improve the uniformity of the prepared T-shaped grid;
2. in the manufacturing process of the invention, the water-soluble micro-shrinkage layer is subjected to diffusion baking to form a diffusion micro-shrinkage layer only on the surface of a vertical plane, so that the diffusion micro-shrinkage layer after baking deformation is partially arranged in the first layer root cavity, and the first layer root cavity is isolated from the upper layer of optical cement by direct contact to realize isolation;
3. the diffusion micro-shrinkage layer grown on the side wall can be good in uniformity by forming the diffusion micro-shrinkage layer firstly and then forming the first layer of root cavity with the arc corner.
Drawings
FIG. 1 is a flow chart of a method for forming an isolation layer by baking a microfilm;
FIG. 2 is a schematic diagram of the structure of the device in each step of forming an isolation layer by baking the micro-scale layer;
FIG. 3 is a flow chart of a method for achieving isolation using low power ion bombardment;
FIG. 4 is a schematic diagram of the device structure in each step of isolation using low power ion bombardment;
FIG. 5 is a schematic diagram of a device structure formed in accordance with the present invention;
FIG. 6 is a schematic structural comparison of the first layer root cavity with or without an inwardly collapsed lamella;
FIG. 7 is a schematic comparison of the first layer root cavity structure using only hot plate heating, only oven heating, and first hot plate and then oven modified patterning.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the description of the present invention, it should be noted that the terms "upper", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings or orientations or positional relationships that the products of the present invention conventionally use, which are merely for convenience of description and simplification of description, but do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.
In the description of the present invention, it should also be noted that, unless otherwise explicitly specified or limited, the terms "disposed," "mounted," and "connected" are to be construed broadly, e.g., as meaning fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
The technical solutions of the present invention are further described in detail below with reference to the accompanying drawings, but the scope of the present invention is not limited to the following.
Example 1
As shown in fig. 1, a method for manufacturing a highly reliable T-shaped gate includes the following steps:
s1, forming a first layer of root cavity: coating a first layer of photoresist on a semiconductor substrate, and baking, I-line photoetching, developing and cleaning the first layer of photoresist to form a first layer of root cavity with a vertical surface;
further, as shown in FIGS. 2(a) and (b), wherein the thickness of the I-line photoresist is
The image width of the first layer root cavity is 0.35-0.55 mu m.
S2, forming a diffusion micro-layer: coating a water-soluble micro layer and carrying out diffusion baking on the micro layer to form a diffusion micro layer only on the surface of the vertical surface, and removing the micro layer material which is not diffused by photoacid in a water washing mode;
further, as shown in FIGS. 2(c) and (d), the thickness of the diffusion micro-scale layer is 50 to 100 μm.
S3, thermal deformation step: the method comprises the steps of forming an isolation layer and forming a first layer of root cavity with arc corners; uniformly heating the first layer of root cavity pattern in an oven baking mode to form a first layer of root cavity with arc corners;
further, forming an isolation layer: controlling the shape of the micro layer to be formed by baking and heating in an oven so that the micro layer forms an isolation layer;
further, the specific content of the insulating layer formed by controlling the shape of the micro layer by baking the micro layer by using the oven is as follows:
the diffusion micro-shrinkage layer growing on the side wall has good uniformity by forming the diffusion micro-shrinkage layer firstly and then forming the first layer of root cavity with the arc corner; if the first layer of root cavity with the arc corners is formed firstly and then the diffusion micro-shrinkage layer is formed, the diffusion micro-shrinkage layer is not uniformly grown due to the existence of the arc radian, so that the cavity appearance of the diffusion micro-shrinkage layer is influenced, a full exposure process is additionally added, and the controllability and the process development difficulty are greatly increased.
Because the forming temperature of the stroke diffusion micro-shrinkage layer is lower than that of the first layer of root cavity with the arc corner, if the first layer of root cavity with the arc corner is used, the solvent of the photoresist can be evaporated at high temperature, so that the cavity which originally wants to sink in the middle shrinks towards two sides due to the reduction of the solvent and the reduction of the volume, and the collapse at one side and the shrinkage at the other side are difficult to control; the diffusion micro layer is formed first mainly because the diffusion micro layer covering the diffusion micro layer can block the evaporation of the solvent in the cavity, thereby ensuring the temperature stability.
Forming a microlayer as shown in (d) by reacting the water-soluble microlayer material shown in FIG. 2(c) with the sidewalls; after baking and heating by an oven, collapsing the pattern of the cavity shown in the step (d) to form a cavity pattern with a certain radian shown in the step (e); in the process, the thickness of the micro layer is controlled well, so that the width Y of the top of the micro layer in the step (f) is larger than the width X of the bottom of the upper layer head cavity, the micro layer can be isolated between the first layer of photoresist and the second layer of photoresist, the two layers of photoresist are prevented from being in direct contact with each other, and the influence of the second layer of photoresist on the first layer of root cavity graph is protected.
Furthermore, the isolation layer is formed by utilizing the diffusion micro-shrinkage layer, so that the process step of manufacturing the T-shaped gate can be saved, and the production efficiency is improved; damage to the semiconductor substrate due to ion bombardment is also avoided.
Or after heating through the hot plate, the appearance of the first layer of root cavity pattern with the arc corners is corrected in an oven uniform heating mode, so that the formation of a thin layer is avoided;
further, as shown in FIG. 2(e), the width of the first layer root cavity with the arc corners is 0.12-0.22 μm.
S4, forming an upper-layer head cavity: coating a second layer of photoresist on the surface of the first layer of root cavity, and baking, I-line photoetching, developing and cleaning the second layer of photoresist to form an upper layer of head cavity;
further, as shown in fig. 2(f), the top width of the upper layer head cavity is 0.8-1.3 μm, and the bottom width X of the upper layer head cavity is smaller than the top width Y of the isolation layer, so that the cavity pattern is completely covered and plays a role in protection.
S5, preparing a T-shaped grid: and (h) as shown in fig. 2(g) and (h), removing photoresist by ions, removing bottom residues, performing acid etching on the semiconductor substrate to the root starting point of the growth of the gate metal layer, depositing and stripping the gate metal, and removing the first layer of root cavity, the isolation layer and the upper layer of head cavity to form a T-shaped gate with the bottom width of 0.15-0.25 μm as shown in fig. 2(i) and 5.
Example 2
As shown in fig. 3, a method for manufacturing a highly reliable T-shaped gate includes the following steps:
s1, forming a first layer of root cavity: coating a first layer of photoresist on a semiconductor substrate, and baking, I-line photoetching, developing and cleaning the first layer of photoresist to form a first layer of root cavity with a vertical surface;
further, as shown in FIGS. 4(a) and (b), wherein the I-line photoresist has a thickness of
The image width of the first layer root cavity is 0.35-0.55 mu m.
S2, forming a diffusion micro-layer: coating a water-soluble micro layer and carrying out diffusion baking on the micro layer to form a diffusion micro layer only on the surface of the vertical surface, and removing the micro layer material which is not diffused by photoacid in a water washing mode;
further, as shown in FIGS. 4(c) and (d), the thickness of the diffusion micro-scale layer is 50 to 100 μm; therefore, a metal gate with the required shape and characteristic size is needed, and the two requirements can be met simultaneously by selecting the thickness of the diffusion micro-layer to be 50-100 mu m.
S3, forming a first layer of root cavity with arc corners: baking and heating the first layer of photoresist through a hot plate, and forming a first layer of root cavity with arc corners on the first layer of photoresist.
S4, thermal deformation step: uniformly heating the first layer of root cavity pattern in an oven baking mode to form a first layer of root cavity with arc corners;
or after heating through the hot plate, the appearance of the first layer of root cavity pattern with the arc corners is corrected in an oven uniform heating mode, so that the formation of a thin layer is avoided;
further, as shown in FIG. 4(e), the width of the first layer root cavity with the arc corners is 0.12-0.22 μm.
S5, forming an isolation layer: forming a surface polymer spacer layer by low power ion bombardment as shown in fig. 4 (f);
s6, forming an upper-layer head cavity: as shown in fig. 4(g), a second layer of photoresist is coated on the surface of the first layer of root cavity, and the second layer of photoresist is baked, I-line etched, developed and cleaned to form an upper layer of head cavity;
s7, preparing a T-shaped grid: and (h) as shown in fig. 4, removing photoresist by ions, removing the bottom residues, performing acid etching on the semiconductor substrate to the root starting point of the growth of the gate metal layer, depositing and stripping gate metal, and removing the first layer of root cavity, the isolation layer and the upper layer of head cavity to form a T-shaped gate with the bottom width of 0.15-0.25 μm as shown in fig. 4(j) and fig. 5.
The baking temperature of the oven for baking the water-soluble micro-shrinkage layer to form the diffusion micro-shrinkage layer is higher than that of the oven for baking the diffusion micro-shrinkage layer and the first layer root cavity.
Further, because the temperature required for baking the water-soluble micro-shrinkage layer by the oven to form the diffusion micro-shrinkage layer is different from the temperature required for baking the first root cavity with the oven to form the first root cavity which has the arc corner and has no inward collapse thin layer, the temperature required for the former is 120-130 ℃ higher than the temperature required for the latter is 90-105 ℃; therefore, the temperature when the diffusion micro-layer and the first layer root cavity are baked by the oven does not reach the critical value of 120 ℃ required when the water-soluble micro-layer is baked by the oven to form the diffusion micro-layer, so that the first layer of photoresist does not deform when the water-soluble micro-layer is baked first.
As shown in fig. 6 and 7, the first layer of root cavity is uniformly heated by the oven, or the pattern is corrected by the oven after being heated by the hot plate, so that an inward collapse thin layer formed by uneven heating of the first layer of root cavity pattern due to upward heat transfer caused by heating of the hot plate is eliminated, the formation of the first layer of root cavity pattern with high reliability is realized, the problem of characteristic size expansion caused by removal of the thin layer in acid etching is avoided, and the uniformity of the prepared T-shaped grid is further improved.
Another embodiment of the present application provides a highly reliable T-shaped gate, which is manufactured by the manufacturing method of any of the above embodiments.
Another embodiment of the present application provides a high electron mobility transistor including the T-shaped gate described above.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A manufacturing method of a T-shaped gate with high reliability is characterized in that: the manufacturing method comprises the following steps:
a thermal deformation step: uniformly heating the diffusion micro-shrinkage layer and the first layer of root cavity pattern in an oven baking mode to form an isolation layer and a first layer of root cavity with arc corners;
or the shape of the first layer of root cavity pattern with the arc corner is corrected in a mode of uniform heating through an oven after the heating through the hot plate, so that the formation of a thin layer is avoided.
2. The method for manufacturing a highly reliable T-shaped gate as claimed in claim 1, wherein: when the diffusion micro-shrinkage layer and the first layer of root cavity pattern are uniformly heated in an oven heating mode, the following steps are sequentially carried out before the thermal deformation step is carried out:
forming a first layer of root cavity: coating a first layer of photoresist on a semiconductor substrate, and baking, I-line photoetching, developing and cleaning the first layer of photoresist to form a first layer of root cavity with a vertical surface;
forming a diffusion micro-scale layer: coating a water-soluble micro-shrinkage layer, performing diffusion baking on the micro-shrinkage layer to form a diffusion micro-shrinkage layer only on the surface of the vertical surface, and removing the micro-shrinkage layer material without photo-acid diffusion by a water washing mode.
3. The method for manufacturing a highly reliable T-shaped gate as claimed in claim 2, wherein: when the diffusion micro-shrinkage layer and the first layer of root cavity pattern are uniformly heated in an oven heating mode, the following steps are sequentially carried out after the thermal deformation step is carried out:
forming an upper-layer head cavity: coating a second layer of photoresist on the surface of the first layer of root cavity, and baking, I-line photoetching, developing and cleaning the second layer of photoresist to form an upper layer of head cavity;
preparing a T-shaped gate: and etching the semiconductor substrate by acid until the root starting point of the growth of the grid metal layer, depositing and stripping the grid metal, and removing the first layer of root cavity, the isolation layer and the upper layer of head cavity to form the T-shaped grid.
4. The method for manufacturing a highly reliable T-shaped gate as claimed in claim 1, wherein: when the first layer of root cavity pattern with the arc corner is corrected in a mode of uniformly heating through an oven after the heat plate is heated, the following steps are sequentially carried out before the thermal deformation step is carried out:
forming a first layer of root cavity: coating a first layer of photoresist on a semiconductor substrate, and baking, I-line photoetching, developing and cleaning the first layer of photoresist to form a first layer of root cavity with a vertical surface;
forming a diffusion micro-scale layer: coating a water-soluble micro layer and carrying out diffusion baking on the micro layer to form a diffusion micro layer only on the surface of the vertical surface, and removing the micro layer material which is not diffused by photoacid in a water washing mode;
forming a first layer of root cavity with arc corners: baking and heating the first layer of photoresist through a hot plate, and forming a first layer of root cavity with arc corners on the first layer of photoresist.
5. The method for manufacturing a highly reliable T-shaped gate as claimed in claim 4, wherein: when the first layer of root cavity pattern with the arc corner is corrected in a mode of uniformly heating through an oven after the heat plate is heated, the following steps are sequentially carried out after the thermal deformation step is carried out:
forming an isolation layer: forming a surface polymer spacer layer by low power ion bombardment;
forming an upper-layer head cavity: coating a second layer of photoresist on the surface of the first layer of root cavity, and baking, I-line photoetching, developing and cleaning the second layer of photoresist to form an upper layer of head cavity;
preparing a T-shaped gate: and etching the semiconductor substrate by acid until the root starting point of the growth of the grid metal layer, depositing and stripping the grid metal, and removing the first layer of root cavity, the isolation layer and the upper layer of head cavity to form the T-shaped grid.
6. The method for manufacturing a highly reliable T-shaped gate as claimed in claim 2, wherein: the baking temperature of the oven for baking the water-soluble micro-shrinkage layer to form the diffusion micro-shrinkage layer is higher than the baking temperature of the oven for baking the diffusion micro-shrinkage layer and the first layer root cavity.
7. The method for manufacturing a highly reliable T-shaped gate as claimed in claim 2 or 4, wherein: the thickness of the diffusion miniature layer formed on the vertical surface is 50-100 nm; the width of the first layer of root cavity with the arc corners is 0.12-0.22 mu m.
8. A method for manufacturing a highly reliable T-shaped gate as claimed in claim 3 or 5, wherein: the width of the graph of the first layer of root cavity with the vertical surface formed by cleaning is 0.35-0.55 mu m; the top width of the upper-layer head cavity is 0.8-1.3 mu m; the bottom width X of the upper-layer head cavity is smaller than the top width Y of the isolation layer; the width of the bottom of the T-shaped gate is 0.15-0.25 μm.
9. A T-shaped grid with high reliability is characterized in that: is manufactured by the manufacturing method according to any one of claims 1 to 8.
10. A high electron mobility transistor, characterized by: comprising a T-shaped gate as claimed in claim 9.
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