CN110692196A - 基于反相器的差分放大器 - Google Patents
基于反相器的差分放大器 Download PDFInfo
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Abstract
一种电路可以包含第一电流源、第二电流源和电耦合在第一电流源和第二电流源之间的差分反相放大器。该差分反相放大器可以包含多个负载电阻器和多个二极管连接的金属氧化物半导体(MOS)钳位器,所述多个二极管连接的金属氧化物半导体(MOS)钳位器被配置为限制输出摆动并使共模干扰最小化。
Description
技术领域
本公开涉及电子放大器电路,更具体地,涉及反相放大器(inverter amplifier)比较器。
背景技术
某些先前的架构被配置用于低噪声高速差分放大器,这些放大器充当带有负载电阻器的简单差分对和差分反相放大器拓扑。对于低噪声高速应用,简单性可能很有用,因为额外的复杂性可能会使噪声性能、带宽或两者降级。对于便携式电池操作设备,有效利用电流可能是有用的。
图1示出了结合了用于增益和电阻负载的金属氧化物半导体(metal oxidesemiconductor,MOS)差分对的先前拓扑100的示例。该电路提供低噪声、合理的增益和高带宽。图2示出了由图1就所示器件尺寸和技术所示的拓扑100的交流电(alternatingcurrent,AC)、噪声和瞬态性能200。
虽然具有负载电阻器的差分对是低噪声拓扑,但是可以采用使用负沟道MOS(NMOS)和正沟道MOS(PMOS)差分对两者的配置的放大器拓扑。这些反相放大器拓扑可以提供性能的改善,因为偏置电流被用于在NMOS对和PMOS对两者中生成增益(gm)。图3示出了先前的差分反相放大器拓扑300的示例,其中偏置电流流过PMOS差分对和NMOS差分对两者,从而有效地将可用gm加倍,用于适当优化的器件定尺寸(sizing)。复制(replica)偏置电路被用于设置NMOS和PMOS偏置电流。这里,vcm被外部设置为vdd/2,并且复制偏置电路进行调节,使得PMOS电流源和NMOS电流源的栅极也处于vdd。
图3所示的差分反相放大器300可以用于高信号限制级,诸如参考中的时钟缓冲器。然而,存在严重的问题,使得这种***不适用于针对具有大动态范围的输入信号的高速低噪声放大器级。用于逐次逼近型(Successive Approximation Register,SAR)模数转换器(Analog to Digitial Converter,ADC)的比较器就是一种这样的应用。
图4示出了结果400,表明与vcm=vdd/2的期望输出共模相比,输出共模电压约为850mV。由于NMOS电流源和PMOS电流源两者的栅极都连接在图4中标记为vgn的节点上,因此电压接近vdd的一半。这使得电路对器件参数敏感,并且难以在期望输出共模电压处平衡。图6示出了蒙特卡罗失配(mismatch)模拟的结果600,并且输出共模在大部分的电源范围上变化,这可能导致电路表现出增益和带宽的过度变化。此外,由于动态余量(headroom)问题,电路可能在共模电压的极端情况下变得不可工作。
除了过度共模变化的问题之外,图3所示的电路300可能表现出依赖于信号的限制行为,这在SAR应用中是不希望的,因为这种行为可能导致失真。图4和图5之间的比较显示,输出共模电压和标记为vsp和vsn的两个公共源节点在30mV和500mV的输入信号情况之间表现出显著不同的行为。
取决于以下输入信号,该电路300具有三种不同的工作模式:小信号,没有限制并且输入器件工作在有源区中;中信号,输入开关器件进入三极管(triode)区并充当开关;以及大信号,输入器件充当开关并且电流源由于低动态余量而进入三极管区。小和中信号模式可能没有问题,但应当避免其中电流源被挤压(crush)的大信号模式。
所公开技术的实施例解决了现有技术中的这些和其他限制。
附图说明
图1示出了结合了用于增益和电阻负载的金属氧化物半导体(MOS)差分对的先前拓扑的示例。
图2示出了图1所示的拓扑的交流(AC)、噪声和瞬态性能。
图3示出了先前的差分反相放大器拓扑的示例。
图4示出了具有复制偏置的反相放大器的小信号响应的示例。
图5示出了具有复制偏置的反相放大器的大信号响应的示例。
图6示出了具有复制偏置的反相放大器的蒙特卡罗变化的示例。
图7示出了根据所公开技术的某些实施例的具有分离的复制偏置的共模反馈的差分反相放大器的示例。
图8示出了图7所示的具有分离的复制偏置的共模反馈的反相放大器的小信号响应的示例。
图9示出了图7所示的具有分离的复制偏置的共模反馈的反相放大器的大信号响应的示例。
图10示出了图7所示的具有分离的复制偏置的共模反馈的反相放大器的蒙特卡罗变化的示例。
图11示出了根据所公开技术的某些实施例的具有输出共模反馈的差分反相放大器的示例。
图12示出了图11所示的具有输出共模反馈的反相放大器的小信号响应的示例。
图13示出了图11所示的具有输出共模反馈的反相放大器的大信号响应的示例。
图14示出了图11所示的具有输出共模反馈的反相放大器的蒙特卡罗变化的示例。
图15示出了根据所公开技术的某些实施例的具有输出共模反馈和负载电阻器的差分反相放大器的示例。
图16示出了图15所示的具有输出共模反馈和负载电阻器的反相放大器的小信号响应的示例。
图17示出了图15所示的具有输出共模反馈和负载电阻器的反相放大器的大信号响应的示例。
图18示出了根据所公开技术的某些实施例的具有连接到vcm=vdd/2的负载电阻器的差分反相放大器的示例。
图19示出了图18所示的具有连接到vcm=vdd/2的负载电阻器的反相放大器的小信号响应的示例。
图20示出了图18所示的具有连接到vcm=vdd/2的负载电阻器的反相放大器的大信号响应的示例。
图21示出了图18所示的具有输出共模反馈的反相放大器的蒙特卡罗变化的示例。
图22示出了根据所公开技术的某些实施例的具有连接到vcm=vdd/2的负载电阻器和二极管连接的钳位器件的差分反相放大器的示例。
图23示出了图22所示的具有连接到vcm=vdd/2的负载电阻器和二极管连接的钳位器件的反相放大器的小信号响应的示例。
图24示出了图22所示的具有连接到vcm=vdd/2的负载电阻器和二极管连接的钳位器件的反相放大器的小信号响应的示例。
图25示出了图22所示的具有连接到vcm=vdd/2的负载电阻器和二极管连接的钳位器件的反相放大器的蒙特卡罗变化的示例。
具体实施方式
所公开技术的某些实施方式解决了上述共模问题,并提供输出限制以防止电流源进入三极管区。在某些实施例中,可以采用分离的偏置电流设置和共模电压控制。二极管连接的金属氧化物半导体(MOS)钳位器可用于限制输出摆动和使共模干扰最小化。差分电阻负载可用于改善带宽和使共模干扰最小化。负载电阻器的连接可用于使得共模电压(vcm)等于电压漏极(vdd)的一半,以便省略输出共模控制。负载电阻器和二极管连接的钳位器的组合可用于允许对增益/带宽的独立优化。
图7示出了根据所公开技术的某些实施例的具有分离的复制偏置的共模反馈的差分反相放大器700的示例。在示例拓扑700中,复制偏置电路被分成两部分:第一部分是PMOS镜和连接到PMOS差分对的电流源,并且第二部分是由反馈放大器控制的NMOS电流源。NMOS电流源和PMOS电流源节点vgn和vgp可以分离,使得一个电流源(这里是PMOS)提供偏置电流,而另一个电流源(这里是NMOS)由反馈环路调节以设置共模电压。
在该示例700中,共模电压vcm是外部连接到vdd/2,并且电路700被配置为将复制偏置的中心调节为也在vdd/2处。复制偏置中器件的布置旨在模仿放大器中的器件。
图8、9和10分别示出了示例性能曲线800、900和1000,它们表明输出共模可以在vdd/2处平衡,但是电路700仍然表现出依赖于信号的限制行为和输出共模的过度蒙特卡罗变化。对于生产电路来说,如此大变化的产量影响可能是有问题的。示例示出了将两个电流源分成一个固定电流源和第二受控源来设置共模电压。
图8所示的曲线800表明,该电路提供高增益、低带宽和600mV的输出共模。图9所示的曲线900表明,该电路表现出高增益、低带宽和输出共模变化。图10所示的曲线1000表明,该电路可能表现出过度的输出共模变化。
图11示出了根据所公开技术的某些实施例的具有输出共模反馈的差分反相放大器1100的示例。图11所示的拓扑1100包含PMOS电流源和NMOS电流源以及输出共模反馈。在该示例中,通过感测放大器的实际输出处而不是复制偏置电路处的共模,拓扑1100扩展了图7所示的拓扑700的概念。
在该示例1100中,共模电压vcm也是外部地连接到vdd/2。但是利用该电路1100,放大器的输出共模被配置为由两个大电阻器直接感测,使得输出共模被直接被调节到vdd/2。
图12、13和14分别示出了性能曲线1200、1300和1400,它们表明输出共模以vcm=vdd/2为中心,并且现在具有合理的蒙特卡罗变化。然而,图13表明,对于大输入信号,电流源节点vsp和vsn正在趋近电源和地。共模环路的稳定性也可能是一个问题,因为当电流源耗尽动态余量时,反馈会中断。
图12所示的曲线1200表明,该电路表现出高增益、低带宽和600mV的输出共模。图13所示的曲线1300表明,该电路表现出高增益、低带宽和输出共模变化。图14所示的曲线1400表明,该电路表现出合理的输出共模变化。
图15示出了根据所公开技术的某些实施例的具有输出共模反馈和负载电阻器的差分反相放大器1500的示例。在该示例中,放大器1500中的负载电阻器已经从高值共模感测电阻器(例如,图11所示的电路1100中的电阻器)减小到更小值(例如,3千欧姆(kohm))。这可能会将差分输出电压限制为偏置电流乘以两倍负载电阻器的值(例如,(Vout_max=Ibias*2*Rload))。最大差分输出摆动可以被设置为足够低于可用电源电压的值,以便为NMOS电流源和PMOS电流源两者提供动态余量。
类似于图11的拓扑1100,该拓扑1500中的共模电压vcm外部连接到vdd/2,但是放大器的输出共模被配置为由两个大电阻器直接感测,使得输出共模被直接调节到vdd/2。
分别由图16和17示出的性能曲线1600和1700表明,最大输出摆动已经减小,由于增益减小,带宽已经增加,并且输出共模现在被很好地控制。图16所示的曲线1600表明,该电路表现出减小的增益、高带宽和600mV的输出共模。图17所示的曲线1700表明,该电路提供减小的增益、高带宽和600mV的输出共模。
图15所示的电路1500解决了共模和限制问题,但是它仍然采用共模反馈电路。图16和17的曲线1600和1700分别表明,可能存在共模响应可能干扰差分信号的一些问题。有多种方法可以确保足够的共模稳定性并使共模扰动最小化。然而,避免共模反馈环路可能是有用的。
逐次逼近型(SAR)模数转换器(ADC)可以具有可用的外部过滤的共模电压。示出了根据所公开技术的某些实施例的具有连接到vcm=vdd/2的负载电阻器的差分反相放大器1800的示例的图18,已经被修改为将3000(3k)负载电阻器直接连接到vcm。这允许省略共模反馈环路。
分别由图19和20示出的性能曲线1900和2000表明,输出共模电压和标为vsp和vsn的公共源节点的扰动已经显著减小,例如,与分别由图16和17示出的曲线1600和1700相比。图19所示的曲线1900表明,该电路表现出减小的增益、高带宽和600mV的输出共模。图20所示的曲线2000表明,该电路表现出减小的增益、高带宽和600mV的输出共模。
图21示出了图18所示的具有输出共模反馈的反相放大器1800的蒙特卡罗变化2100的示例。图21所示的曲线2100表明,电路1800表现出合理的输出共模变化。
图18所示的电路1800可以为SAR比较器中的增益级带来合理的性能。然而,增益可能受到上述输出电压(例如,Vout_max=Ibias*2*Rload)的限制的约束。增益可以是总差分gm乘以两倍Rload(例如,Av=gm*2*Rload)。gm可能与Ibias相关,因此最大输出电压可能会约束该增益。
可以提供机制来允许独立地调节增益,以优化电路1800的增益、带宽和噪声。图22示出了根据所公开技术的某些实施例的具有连接到vcm=vdd/2的负载电阻器和二极管连接的钳位器件的差分反相放大器2200的示例。在图22所示的电路2200中增加二极管连接的钳位器件避免了最大输出电压约束,并且负载电阻器可以根据需要而增加(例如,在这种情况下为6kohm)。
图23和24分别示出了电路2200的电路响应,并且图25示出了输出共模电压的合理的部分到部分变化。图23所示的曲线2300表明,电路2200表现出合理的增益、带宽和输出共模。图24所示的曲线2400表明电路2200提供合理的增益、带宽和输出共模。曲线2400进一步表明,电路2200在不牺牲小信号增益的情况下提供减小的输出信号,并且仍具有简洁快速的限制(例如,与图20所示的曲线2000相比)。
图25示出了图22所示的具有连接到vcm=vdd/2的负载电阻器和二极管连接的钳位器件的反相放大器2200的蒙特卡罗变化2500的示例。图25所示的曲线2500表明,电路2200表现出合理的输出共模变化。
本发明的实施例可以结合到集成电路中,诸如声音处理电路或其他音频电路。继而,集成电路可以用于音频设备,诸如耳机、移动电话、便携式计算设备、长条状音箱(soundbar)、音频接孔、放大器、扬声器等。
所公开主题的先前描述的版本具有许多优点,这些优点对于普通技术人员来说是描述过的或者是显而易见的。即使如此,所有这些优点或特征并不是所公开的装置、***或方法的所有版本中都需要的。
此外,本书面说明提到了特定的特征。应当理解,本说明书中的公开内容包含这些特定特征的所有可能组合。例如,在特定方面或实施例的上下文中公开特定特征的情况下,该特征也可以尽可能地在其他方面和实施例的上下文中使用。
此外,当在本申请中提到具有两个或多个定义的步骤或操作的方法时,定义的步骤或操作可以以任何顺序或同时执行,除非上下文排除了这些可能性。
此外,术语“包括”及其语法等同物在本公开中用于表示其他组件、特征、步骤、过程、操作等可选地存在。例如,冠词“包括”或“其包括”组分A、B和C可以只包含组分A、B和C,或者可以包含组分A、B和C以及一个或多个其它组分。
此外,为了方便起见,使用了诸如“右”和“左”的方向,并参考了图中提供的图表。但是所公开的主题在实际使用中或者在不同的实施方式中可以具有多个方位。因此,图中垂直、水平、向右或向左的特征在所有实施方式中可能不具有相同的方位或方向。
尽管为了说明的目的已经说明和描述了本发明的具体实施例,但是应该理解,在不脱离本发明的精神和范围的情况下,可以进行各种修改。因此,除了所附权利要求书之外,本发明不应受到限制。
Claims (12)
1.一种装置,包括:
第一电流源;
第二电流源;以及
差分反相放大器,电耦合在所述第一电流源和所述第二电流源之间,所述差分反相放大器包含:
多个负载电阻器;以及
多个二极管连接的金属氧化物半导体(MOS)钳位器,被配置为限制输出摆动并使共模干扰最小化。
2.根据权利要求1所述的装置,其中所述第一电流源是具有电压vdd的正沟道MOS(PMOS)电流源。
3.根据权利要求2所述的装置,其中所述第二电流源是具有电压vss的负沟道MOS(NMOS)电流源。
4.根据权利要求3所述的装置,还包括多个负载电阻器,所述多个负载电阻器被配置为提供等于vdd/2的共模电压vcm。
5.根据权利要求1所述的装置,还包括差分电阻负载,以改善带宽并使共模反馈控制最小化。
6.根据权利要求4所述的装置,其中所述多个二极管连接的MOS钳位器和所述多个负载电阻器被配置为使得能够独立优化增益和带宽。
7.一种***,包括:
输入,被配置为接收输入电压;
输出,被配置为提供输出电压;以及
电耦合在所述输入和所述输出之间的电路,所述电路包括:
第一电流源;
第二电流源;以及
差分反相放大器,电耦合在所述第一电流源和所述第二电流源之间,所述差分反相放大器包含:
多个负载电阻器;以及
多个二极管连接的金属氧化物半导体(MOS)钳位器,被配置为限制输出摆动并使共模干扰最小化。
8.根据权利要求7所述的***,其中所述第一电流源是具有电压vdd的正沟道MOS(PMOS)电流源。
9.根据权利要求8所述的***,其中所述第二电流源是具有电压vss的负沟道MOS(NMOS)电流源。
10.根据权利要求9所述的***,所述电路还包括多个负载电阻器,所述多个负载电阻器被配置为提供等于vdd/2的共模电压vcm。
11.根据权利要求10所述的***,所述电路还包括差分电阻负载,以改善带宽并使共模反馈控制最小化。
12.根据权利要求10所述的***,其中,所述多个二极管连接的MOS钳位器和所述多个负载电阻器被配置为使得能够独立优化增益和带宽。
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US62/508,280 | 2017-05-18 | ||
PCT/US2018/033532 WO2018213799A1 (en) | 2017-05-18 | 2018-05-18 | Inverter-based differential amplifier |
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JP (1) | JP2020521377A (zh) |
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CA (1) | CA3063958A1 (zh) |
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CN110190852B (zh) * | 2019-06-12 | 2021-06-15 | 成都微光集电科技有限公司 | 一种高速比较器及其形成的模数转换器和读出电路 |
KR102644758B1 (ko) * | 2021-12-13 | 2024-03-06 | 엘에스일렉트릭(주) | 아날로그 출력 회로 및 이를 구비한 인버터 |
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US4808944A (en) * | 1987-11-23 | 1989-02-28 | Triquint Semiconductor, Inc. | High accuracy differential output stage |
US5485490A (en) * | 1992-05-28 | 1996-01-16 | Rambus, Inc. | Method and circuitry for clock synchronization |
US5939904A (en) * | 1998-02-19 | 1999-08-17 | Lucent Technologies, Inc. | Method and apparatus for controlling the common-mode output voltage of a differential buffer |
US6731135B2 (en) * | 2001-06-14 | 2004-05-04 | Artisan Components, Inc. | Low voltage differential signaling circuit with mid-point bias |
US6617888B2 (en) * | 2002-01-02 | 2003-09-09 | Intel Corporation | Low supply voltage differential signal driver |
ITVA20030034A1 (it) * | 2003-09-18 | 2005-03-19 | St Microelectronics Sa | Amplificatore differenziale con limitazione delle alte tensioni di modo comune di uscita. |
TWI333326B (en) * | 2007-03-26 | 2010-11-11 | Novatek Microelectronics Corp | Low differential output voltage circuit |
US7741911B2 (en) * | 2007-10-24 | 2010-06-22 | Industrial Technology Research Institute | Circuit and method for dynamic current compensation |
TWI479800B (zh) * | 2010-09-27 | 2015-04-01 | Novatek Microelectronics Corp | 差動放大器電路 |
US9083584B2 (en) * | 2013-08-16 | 2015-07-14 | Via Technologies, Inc. | Common mode modulation with current compensation |
US9236841B2 (en) * | 2013-09-19 | 2016-01-12 | Analog Devices, Inc. | Current-feedback operational amplifier |
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2018
- 2018-05-18 TW TW107117078A patent/TWI681623B/zh active
- 2018-05-18 TW TW108145952A patent/TWI720739B/zh active
- 2018-05-18 US US15/983,610 patent/US20180337645A1/en not_active Abandoned
- 2018-05-18 CA CA3063958A patent/CA3063958A1/en active Pending
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- 2018-05-18 WO PCT/US2018/033532 patent/WO2018213799A1/en active Application Filing
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US20180337645A1 (en) | 2018-11-22 |
DE112018002548T5 (de) | 2020-03-12 |
CA3063958A1 (en) | 2018-11-22 |
TW202030978A (zh) | 2020-08-16 |
TWI681623B (zh) | 2020-01-01 |
JP2020521377A (ja) | 2020-07-16 |
GB2592877A (en) | 2021-09-15 |
KR20200008141A (ko) | 2020-01-23 |
TW201902116A (zh) | 2019-01-01 |
TWI720739B (zh) | 2021-03-01 |
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