CN110673510B - Rowland-C navigation signal simulation platform based on CPU + FPGA - Google Patents
Rowland-C navigation signal simulation platform based on CPU + FPGA Download PDFInfo
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Abstract
The invention discloses a Rowland-C navigation signal simulation platform based on a CPU + FPGA, which adopts a framework combining software and hardware, and completes data transmission and communication between a CPU part and an FPGA part through a PCIE interface, wherein the CPU part is responsible for selecting a working mode, setting environmental parameters, calculating key parameters, framing data and issuing the data to the FPGA part, the FPGA part analyzes the data and completes the generation and combination of signals, and finally, the DAC is used for performing digital-to-analog conversion, so that the real-time generation of Rowland C navigation simulation signals is realized. Meanwhile, the invention realizes the continuous update of data and the real-time generation of signals between the FPGA and the CPU by designing an interrupt response mechanism. The invention has the advantages that: the device is portable, convenient to upgrade and low in price; the space is well upgraded and expanded, and the system upgrading speed is high; the system has time difference and positioning working modes, has good signal time sequence control, and is suitable for development, debugging, maintenance, verification, training, function expansion development and the like of receiving and monitoring equipment of a Rowland C navigation system.
Description
Technical Field
The invention belongs to the Field of wireless communication, and relates to a method for calculating key parameters, transmitting data, responding to an interrupt and generating a signal of a Roland-C navigation signal simulation platform, in particular to a Roland-C navigation signal simulation platform based on a Central Processing Unit (CPU) + Field Programmable Gate Array (FPGA).
Background
The remote navigation "Long range navigation" is abbreviated "Loran", transliterated to Roland. The Loran-C navigation system is a land-based remote hyperbolic radio navigation system, determines the position of a user by using the time difference of signals of a receiving and transmitting station of a carrier receiver, and is the most important remote navigation means of human before the satellite navigation technology appears. The emergence and development of satellite navigation technology threatens the development of the Roland-C navigation system once. However, with the technical weaknesses and deficiencies of the satellite navigation system in practical application, it is recognized that the reliance of the satellite navigation system as the only means of navigation, positioning and timing is both erroneous and dangerous, and other means of navigation must be backed up and supplemented. The Rowland-C navigation system has the good performances of stable signal transmission, long acting distance, strong anti-interference capability, high positioning precision and the like, can make up for the defects of the satellite navigation system to a great extent, can be used as a backup of the satellite navigation system, and can also well supplement and enhance the satellite navigation system. Meanwhile, the Roland-C navigation system can also realize the functions of time service, data communication and the like, and has great development prospect.
The research, debugging, maintenance, verification, training, function expansion and development and other work of the receiving and monitoring equipment of the Rowland C navigation system are generally carried out in a fixed area, the fixed and unchangeable place signal environment conflicts with a multi-chain multi-time difference signal and a complex signal environment which are actually required, and the efficient development of various work is restricted. In view of the situation, it is necessary to develop a loran C navigation signal simulator in which station chains and time differences can be set autonomously, the signal form is complete and accurate, the signal environment is real and rich, and the target position information can be provided in real time.
The Rowland C navigation signal simulation platform is a simulation source with high precision, can simulate various complex scenes met by a receiver on a carrier in various motion environments, provides simulation test signals which are as close to reality as possible, has the characteristics of flexibility, repeatability, customization and the like, and provides great convenience for research and development of related equipment functions of a Rowland C navigation system.
On one hand, the simulation platform provides customizable signal support for the research of receiving or monitoring equipment, and gets rid of various limitations of a test environment; on the other hand, with the development of the integrated navigation technology, the simulation platform can simulate signals according to needs, and the development of an integrated navigation system is promoted. Meanwhile, the simulation platform has the capability of supporting the self function development of the Rowland C technology.
The existing Rowland C signal simulation platform system architecture comprises three forms of software, hardware and software and hardware combination, wherein a software structure mainly simulates a Digital signal through the software and directly sends the Digital signal to a Digital receiver, a hardware architecture mainly uses DSP and FPGA to realize the Digital signal and carries out DAC (Digital to Analog Converter) conversion to obtain an Analog signal, the hardware and software combination architecture platform is divided into two parts of software and hardware, wherein the software part calculates navigation information and relevant parameters of the signal, and the hardware part generates an Analog navigation signal under the control of the software part. The software architecture platform can not generate signals in real time, and needs to consume a long time when generating signals with a high sampling rate, the hardware architecture platform has the problem of relatively fixed functions, and the software and hardware combined architecture can generate signals in real time for a long time and can realize rapid system upgrade and update, but a simulator of the architecture is developed aiming at a specific platform mostly, the price is relatively expensive and is limited by the corresponding platform to a certain extent.
The software architecture simulator is a software system which is developed by a developer according to user requirements by using professional data simulation software and can generate a specific digital signal in a simulation mode, and the simulator does not directly generate a real-time electromagnetic wave signal. The hardware architecture simulator takes a singlechip, an ARM and a DSP integrated circuit as cores, adopts a software and hardware collaborative design idea, and develops software and hardware design as a whole in parallel to finally form an equipment system capable of generating specific electromagnetic wave signals in real time. The performance advantage of the simulator is maximized by the aid of the platform, software and hardware functional modules cannot be separated, upgrading and updating are greatly influenced by hardware equipment, and redesigning and development are even needed during large upgrading, so that the simulator platform has the defects of complex development, long development period, large capital investment and the like. In addition, the hardware architecture simulator has the defects of poor portability and poor maintainability. The software and hardware combined architecture simulator is a system which takes a computer and a board card as cores and respectively designs and develops software and hardware. The platform makes full use of the powerful computing power of a computer CPU and a friendly user interface development environment, relevant parameters are transmitted to the board card through interfaces such as PCIE, USB3.0 and the like, and the board card generates corresponding signals in real time according to control parameters. With the development of computer technology, the current general computer platform can meet the requirements of a simulator system in the aspects of data processing, software resources and general interface data transmission, and has high cost performance. The platform with the combination of the software and the hardware can get rid of a plurality of limitations of the hardware, and has the advantages of low cost, good portability, convenient upgrading and maintenance and the like while ensuring excellent performance.
Disclosure of Invention
The invention aims to realize a Roland C navigation signal simulation platform based on a CPU and an FPGA, and provides the Roland-C navigation signal simulation platform based on the CPU and the FPGA, which is suitable for development, debugging, maintenance, verification, training, system function expansion and development and the like of a receiver and monitoring equipment. Meanwhile, the invention is suitable for a universal PC (Personal Computer) platform, has good compatibility and low price, and is convenient for maintenance and system upgrade.
The invention relates to a Rowland-C navigation signal simulation platform based on a CPU + FPGA, which comprises an initial configuration part, a parameter calculation part, a data communication part and a signal generation part.
The initial configuration part completes the configuration of system operation initialization parameters, including a motion model of a workbench chain and a user carrier selected by a working mode and initial state parameters; setting parameters of any station chain signal; signal cycle difference, power, interference and noise.
The parameter calculation part unit is used for calculating control parameters according to the initial parameters obtained in the initial configuration part, and comprises the calculation of the time difference of signals of the main station and the auxiliary station, the calculation of the relative speed, the calculation of the position update of a user, the judgment of the signal coverage, the calculation of carrier frequency control parameters, the calculation of signal environment parameters and the calculation of the update of each parameter under the control of interrupt signals.
The data communication part is used for sending and receiving the control parameters obtained by the calculation of the parameter calculation part and interrupting the transmission processing of the signals.
The signal generating section receives the parameter transmitted from the data communication section, generates a digital signal based on the parameter, and generates an analog signal including an interrupt signal and an environmental signal.
The invention has the advantages that:
(1) the Rowland C navigation signal simulation platform based on the CPU + FPGA is developed based on the CPU + FPGA, completes data transmission through the PCIE interface, is suitable for general PC equipment with the PCIE interface, and has the advantages of portability, convenience in upgrading, low price and the like.
(2) The Rowland C navigation signal simulation platform based on the CPU + FPGA is based on modular development of all parts, all modules are independent of one another, the content of each module can be modified without influencing the overall operation under the condition of ensuring the consistency of interfaces, the Rowland C navigation signal simulation platform has good upgrading and expanding space, and the system upgrading speed is high.
Drawings
FIG. 1 is a schematic structural diagram of a Rowland C navigation signal simulation platform based on a CPU + FPGA;
FIG. 2 is a schematic structural flow diagram of a parameter generation part in a Rowland C navigation signal simulation platform based on a CPU + FPGA according to the present invention;
FIG. 3 is a schematic structural flow diagram of a data communication part in a Rowland C navigation signal simulation platform based on a CPU + FPGA according to the present invention;
fig. 4 is a schematic structural flow diagram of a signal generation part in the loran C navigation signal simulation platform based on the CPU + FPGA of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
The Rowland-C navigation signal simulation platform based on the CPU + FPGA comprises an initial configuration part, a parameter calculation part, a data communication part and a signal generation part, and is shown in figure 1.
The initial configuration part is realized by a parameter configuration unit, and mainly configures the parameters in four aspects as follows:
A. parameters related to the running state of the system, including the selection of the workbench chain and the working mode;
B. user-related parameters including motion models of the user's carrier and initial state parameters (position, velocity);
C. setting parameters of any station chain signal;
D. and setting parameters of the signal environment, including parameter settings of signal peripherial difference, power, interference and noise.
After the initial configuration is completed, the simulation platform acquires basic information generated by the signal.
The parameter calculation part is realized by a parameter calculation unit and is used for finishing the calculation of the key parameters according to the initial parameters obtained in the initial configuration part. As shown in fig. 2, the calculation method of the parameter calculation section is specifically as follows:
firstly, obtaining system fixed parameters such as pulse group repetition period, phase coding period, secondary station coding delay, signal peripherial difference and the like according to a station chain working mode selected by an initial configuration part. The calculation model is determined from the selected user motion model (linear motion, circular motion). And then, according to the fixed parameters and the calculation model of the system, the tasks of calculating the signal time difference and the relative speed of the main station and the auxiliary station, updating and calculating the position of a user, judging the signal coverage range, calculating the carrier frequency control parameters, calculating the signal environment parameters, updating and calculating each parameter under the control of the interrupt signal and the like are finished. The calculated key parameters are transmitted to the signal generating part through the data communication part, and finally, corresponding signals are generated.
The signal time difference calculation of the main station and the auxiliary station is completed through a signal time difference calculation module of the main station and the auxiliary station, and the Loran C system realizes positioning by receiving the signal time difference of the main station and the auxiliary station. Since the radio wave propagation speed is substantially constant, the time difference is equivalent to a distance difference. Considering the speed and the precision of the distance calculation between two points on the earth, the distance between the user and the signal station is calculated by adopting an Andoyer-Lambert formula. The control parameter of the signal time difference of the two main stations and the two auxiliary stations can be obtained through the distance between the user and the main station, the two auxiliary stations and the three signal stations and the coding delay of the auxiliary stations.
The relative speed calculation is completed by a relative speed calculation module. When the user moves, the motion states of the main signal station and the auxiliary signal station are different. The invention adopts a Bessel geodetic theme resolving method, introduces an auxiliary sphere, utilizes the rule that the projection geodetic azimuth angle of the earth to the auxiliary sphere is not changed, and respectively calculates the movement speed of a user relative to each signal station according to the current position coordinate of the user and the position coordinate of the signal station and the magnitude and the direction of the movement speed of the user so as to obtain the control parameter of the frequency of the corresponding signal station.
And the user position updating calculation is completed through the user position updating calculation module. And establishing a northeast coordinate system by taking the position of the user carrier in the geocentric geostationary rectangular coordinate system at the initial moment as the origin of coordinates, calculating a new position of the user in the northeast coordinate system after each fixed time according to the initial azimuth angle, the initial speed and the motion trail model, and converting the new position into the geocentric geostationary coordinate system, thereby realizing the updating of the position state of the user.
The signal coverage area judgment is completed through a signal coverage area judgment module. Since the loran C system is a regional navigation system, the signal coverage determination module mainly determines whether the user is in the effective range of the signal. According to the propagation property of Rowland C signals, the invention designs the signal coverage range within 2000 kilometers of the signal station 50 kilometers away. When the simulation platform runs, whether a user is in a signal coverage range is judged in real time, and a prompt is given to the state that the user is not in the signal coverage range or the state that the user removes the signal coverage range.
And the signal environment parameter calculation is completed by a signal environment parameter calculation module. Interference and noise are indispensable because of simulating a real signal environment. The invention designs an interference noise generation module comprising single-frequency interference, sky wave interference and noise signals, and the interference noise signals and the navigation signals are mutually independent and can realize any signal combination through power control.
The data communication part mainly completes the transmission processing of the control parameters calculated by the parameter calculation part, the sending and receiving of the control parameters and the transmission processing of the interrupt signals, is a junction of communication between the CPU and the FPGA, and plays a very key role in the operation of a simulation platform, and as shown in figure 3, the data communication part mainly comprises a parameter packaging sending module, a parameter receiving module, a parameter analysis module and an interrupt signal transmission module. The control parameters calculated by the parameter calculation part enter a data issuing module for framing and issuing; receiving and reading the control parameters at the parameter receiving module through a PCIE and memory reading mechanism, then analyzing the received data by the parameter analyzing module according to a communication protocol to obtain FPGA operation control parameters and transmitting the parameters to the signal generating part; meanwhile, the interrupt signal from the signal generation part is transmitted to the parameter calculation part, so that the continuous update of the parameters is realized.
TABLE 1 data transfer communication protocol
Table 1 shows a communication protocol between the parameter encapsulation issuing module and the parameter parsing module, where data transmission uses a frame as a unit, 128 bits of data per frame, 16 bits of data lower than the frame header, and there are two different frame headers, namely 0 and 1, corresponding to different data types. The frame with the frame header of 0 is transmitted with system signal generation control parameters, which comprise three types of parameters: the pulse group repetition period, the time difference of signals of the main station and the auxiliary station and the signal frequency control parameters. The frame with frame header 1 is transmitted with the signal peripherial difference, power and environmental control parameters.
And the parameter packaging issuing module frames and issues the control parameters calculated by the parameter calculating part according to the communication protocol. After the simulation platform issues the control parameters obtained by the initial state calculation, the update of the subsequent signal control parameters is issued according to the control of the interrupt signal, and meanwhile, the parameter encapsulation issuing module needs to call a driving program to inform the parameter receiving module of receiving the data.
The parameter receiving module receives data through a PCIE interface and a DMA (direct Memory Access) Memory mechanism. The invention designs a memory operation scheme, which controls the data receiving process through a memory pointer. In the starting stage of the simulation platform, the memory pointer stays at the head address, the data issuing module issues a memory reading signal after writing data into the memory, under the control of the signal, the memory pointer is read at the speed of 128 bits each time until the memory pointer moves to the tail of the memory space, and after the memory pointer reaches the tail, the pointer stays at the tail until the next memory reading signal arrives. Finally, the parameter receiving module obtains the framed 128-bit data with the rate of 25 Msps.
The data analysis module receives the data from the data receiving module and unframes the data according to the communication protocol. The parameters after being deframed are directly stored by using a register and read under the control of an interrupt signal, and the parameters are transmitted to the signal generation part to complete the generation of the signal.
And the system enters an operation stage after issuing the initial parameters. In the operation stage, in order to ensure the real-time performance and the continuity of signals, the invention designs an interrupt signal transmission module which is provided with an interrupt generation mechanism, a transmission mechanism and a response mechanism and realizes the real-time update and transmission of data. ) The interrupt signal transmission utilizes a DMA (direct memory access) memory mechanism, the signal generation part generates an interrupt signal to be stored in the FPGA register, the interrupt signal is transmitted to the parameter calculation part through the PCIE interface, and the interrupt signal transmission module carries out interrupt response after detecting the interrupt signal, so that the parameter updating calculation is realized and the parameter is issued.
The signal generation part receives the parameters transmitted from the data communication part, generates digital signals according to the parameters, and controls the DA chip to perform digital-to-analog conversion to generate analog signals, as shown in fig. 4. The signal generation part comprises a single pulse signal generation module, a phase coding control module, a time sequence control module, a sky wave delay control module, an interrupt signal generation module, a sky wave interference generation module, a noise generation module and a chip management module. The single pulse generation module comprises synthesis of two signals of a carrier and a bell-shaped pulse envelope, and the carrier and the bell-shaped pulse periodic sampling point are synthesized in a one-to-one correspondence mode in time sequence under the control of a clock to form a signal pulse. The navigation pulse signals of the main signal station, the two secondary signal stations and the corresponding sky wave signals, namely the signals of the channel 1, the channel 2 and the channel 3 and the sky wave delay signals, can be generated simultaneously by utilizing the parallel processing capability of the FPGA, wherein the sky wave delay signals are mainly set by a user and are used for carrying out delay processing on the signals of the main signal station, the two secondary signal stations under the control of the time sequence control module. The phase coding control module is responsible for carrying out phase coding on the generated monopulse signals according to the corresponding control parameters of the Rowland C signal phase coding rule; and periodically controlling the generation of the single pulse according to the corresponding control parameters of the periodic interval of the signal pulse group and the pulse interval rule in the group, thereby forming a continuous signal of the signal station. The chip management module controls and manages the DAC chip (digital-to-analog conversion chip) by reading and writing registers in the DAC chip, wherein the DAC chip comprises the format of input signals of the DAC chip, the service condition of an internal filter and the like. The chip management module realizes the control of the analog platform through the operation management of an FPGA clock and an internal register; the chip management module generates a hard interrupt signal through the interrupt signal generation module according to the control parameter and FPGA clock counting, and feeds the interrupt signal back to the data parameter calculation part, thereby realizing the update of the control parameter. The sky wave interference generating module carries out time delay processing on the ground wave signal according to sky wave time delay control parameters initially configured in the sky wave time delay control module to obtain a sky wave interference signal; the sky wave interference signal is the time delay of the corresponding signal station signal, and the signal of each signal station can be obtained by carrying out time delay processing according to the time delay control parameter. The noise interference generation module generates corresponding noise and interference signals according to the initially configured control parameters; the noise interference generation module mainly simulates an environment signal of a system; and respectively manufacturing a lookup table of the interference and noise signals through MATLAB software, and respectively generating the corresponding interference and noise signals by utilizing FPGA programming according to the control parameters obtained by analysis. And combining signals of the Rowland C signal station, sky wave interference and noise interference signals, and sending the combined signals to a DAC chip to complete digital-to-analog conversion to finally obtain analog signals.
In the single pulse generation module, an 1/4-period sine wave lookup table and a 20-sine-wave-length bell-shaped pulse envelope lookup table are manufactured by MATLAB software, one-to-one corresponding synthesis of sine waves and bell-shaped envelope sampling points is realized by FPGA programming according to DDS stepping control parameters, corresponding point data of bell-shaped pulses is set to be 0 according to envelope difference control parameters, and finally, single pulse signals meeting requirements are formed.
The phase encoding control module specifically includes:
TABLE 2 Rowland C signal phase encoding
Pulse group | Main platform | Auxiliary table |
AGRI | ++--+-+-+ | +++++--+ |
BGRI | +--+++++- | +-+-++-- |
The phase encoding of the loran C pulse signal is shown in table 2, where the phase encoding of the primary and secondary stations is repeated every two GRIs, which are called AGRI and BGRI, respectively. The initial phase of the single pulse signal designed by the invention is positive, and according to the phase coding rule, the initial phase is negative by inverting the pulse data bit at a specific position, thereby completing the phase coding.
The time sequence control module specifically comprises the following modules:
the Rowland C signal has a plurality of periods (pulse group period, phase coding period and pulse interval) and time limit points (time difference, interruption and peripherial difference), the carrier frequency of the standard signal is 100kHz, the corresponding sinusoidal period is 10us, and the multi-period control can be realized by counting sinusoidal periods (each period is integral multiple of the sinusoidal period). Precise control of the time limit point (relative to the system clock frequency) can be achieved by timing the lower computer clock.
The interrupt signal generation module specifically includes:
the interrupt generating module generates an interrupt signal by taking the phase coding period as a time interval to control the updating of the whole simulation platform. After the initialization is finished, under the control of an interrupt counting start mark, an interrupt generating module starts counting, generates an interrupt signal and controls the updating of the simulation platform when the condition of an updating period is met, and then the process is restarted and repeated after the counting is reset. Because the interrupt generating module uses hardware to realize interrupt, more accurate interrupt control can be realized, and the real-time performance and the continuity of the analog platform signal are ensured.
Example (b):
the specific implementation method of the Rowland-C navigation signal simulation platform based on the CPU + FPGA comprises the following 9 steps:
step 1: initialization configuration
The parameter configuration unit performs configuration of initialization parameters according to selection of a user, wherein the configuration comprises a station chain simulated by the simulator, an initial working state of the user, signal environment parameters and the like.
Step 2: user state computation
The user state information comprises real-time updating user coordinates and motion information relative to each main station and each auxiliary station according to the user motion model.
And 3, step 3: key parameter calculation
The calculation of key parameters relates to the core of the simulator, and comprises signal coverage range judgment, signal time difference, primary and secondary station carrier signal frequency control parameters, signal power control parameters, signal environment control parameters and the like.
And 4, step 4: data encapsulation and distribution
And after the calculation of the key parameters is finished, framing, packaging and issuing are carried out according to a communication protocol between software and hardware, and a driving program of hardware equipment is called according to the updating frequency to carry out data issuing control. And simultaneously transmitting an interrupt signal of hardware.
And 5, step 5: data reception and parsing
Firstly, data transmitted by a software part needs to be received, then is analyzed and stored according to a protocol, and hardware control parameters are updated according to the updating frequency.
And 6, step 6: signal generation
Under parameter control, a main station signal and a secondary station signal with 16 bits and a single-frequency interference, a sky wave interference and a noise signal are respectively generated. An interrupt control signal is generated at regular time.
And 7, step 7: signal synthesis
And synthesizing the generated main and auxiliary station signals and the environment signal to obtain a digital signal and sending the digital signal to a DAC chip.
And 8, step 8: digital-to-analog conversion of signals
And receiving the digital signal, performing digital-to-analog conversion, and finally obtaining an analog signal.
Claims (8)
1. A Rowland-C navigation signal simulation platform based on a CPU + FPGA is characterized in that: the system comprises an initial configuration part, a parameter calculation part, a data communication part and a signal generation part;
the initial configuration part is used for parameter configuration of four aspects, including selection of a workbench chain and an operation mode; a motion model and initial state parameters of the user carrier; setting parameters of any station chain signal; setting parameters of signal peripherial difference, power, interference and noise;
the parameter calculation part unit is used for calculating control parameters according to the initial parameters obtained in the initial configuration part, and comprises the calculation of the time difference of signals of the main station and the auxiliary station, the calculation of the relative speed, the calculation of the position update of a user, the judgment of the signal coverage, the calculation of carrier frequency control parameters, the calculation of signal environment parameters and the update calculation of each parameter under the control of interrupt signals;
the data communication part is used for sending and receiving the control parameters obtained by the calculation of the parameter calculation part and interrupting the transmission processing of signals;
the signal generating part receives the parameters transmitted from the data communication part, generates digital signals according to the parameters and generates analog signals comprising interrupt signals and environment signals; the signal generation part comprises a single pulse signal generation module, a phase coding control module, a time sequence control module, a sky wave delay control module, an interrupt signal generation module, a sky wave interference generation module, a noise interference generation module and a chip management module;
the single pulse generation module comprises a carrier and bell-shaped pulse envelope synthesis module, and the carrier and the bell-shaped pulse period sampling point are synthesized in a one-to-one correspondence mode in time sequence under the control of the time sequence control module to form a signal pulse; by utilizing the parallel processing capacity of the FPGA, navigation pulse signals of a main signal station, a secondary signal station and three signal stations and sky wave signals corresponding to the navigation pulse signals are generated at the same time;
the phase coding control module is responsible for carrying out phase coding on the generated monopulse signals according to the corresponding control parameters of the Rowland C signal phase coding rule; generating a single pulse periodically according to the corresponding control parameters of the periodic interval of the signal pulse group and the pulse interval rule in the group, and further forming a continuous signal of a signal station;
the chip management module controls and manages the DAC chip by reading and writing the register in the DAC chip; the chip management module realizes the control of the analog platform through the operation management of an FPGA clock and an internal register; the chip management module generates a hard interrupt signal through the interrupt signal generation module according to the control parameter and FPGA clock counting, and feeds the interrupt signal back to the data parameter calculation part, thereby realizing the update of the control parameter;
the sky wave interference generation module carries out time delay processing on the ground wave signal according to the sky wave time delay control parameter initially configured in the sky wave time delay control module to obtain a sky wave interference signal; the sky wave interference signal is the time delay of the corresponding signal station signal, and the signal of each signal station can be obtained by carrying out time delay processing according to the time delay control parameter;
the noise interference generation module generates corresponding noise and interference signals according to the initially configured control parameters; the noise interference generation module mainly simulates the signal environment of a system; respectively making a lookup table of interference and noise signals through MATLAB software, and respectively generating corresponding interference and noise signals by utilizing FPGA programming according to the analyzed control parameters; combining signals of the Rowland C signal station, sky wave interference and noise interference signals and then sending the signals into a DAC chip to complete digital-to-analog conversion to finally obtain analog signals;
in the single pulse generation module, an 1/4-period sine wave lookup table and a 20-sine-wave-length bell-shaped pulse envelope lookup table are manufactured by MATLAB software, one-to-one corresponding synthesis of sine waves and bell-shaped envelope sampling points is realized by FPGA programming according to DDS stepping control parameters, corresponding point data of bell-shaped pulses is set to be 0 according to envelope difference control parameters, and finally, single pulse signals meeting requirements are formed.
2. The loran-C navigation signal simulation platform based on the CPU + FPGA of claim 1, wherein: the method comprises the steps that the time difference of signals of a main station and an auxiliary station is calculated, the distance between a user and the signal stations is calculated by adopting an Andoyer-Lambert formula, and the control parameter of the time difference of the signals of the two main stations and the auxiliary stations can be obtained through the distances between the user and the main station and the two auxiliary stations and the coding delay of the auxiliary stations;
the relative speed calculation adopts a Bessel geodetic theme resolving method, an auxiliary ball is introduced, the movement speed of the user relative to each signal station is respectively calculated according to the current position coordinate of the user and the position coordinate of the signal station and by combining the movement speed and the movement direction of the user, and then the control parameter of the frequency of the corresponding signal station is obtained;
the user position updating calculation method comprises the following steps: establishing a northeast coordinate system by taking the position of the user carrier in the geocentric geostationary rectangular coordinate system at the initial moment as the origin of coordinates, calculating a new position of the user in the northeast coordinate system after each fixed time according to the initial azimuth, the initial speed and the motion trail model, and converting the new position into the geocentric geostationary coordinate system, thereby realizing the updating of the position state of the user;
the signal coverage area judging mode is as follows: trying to judge whether a user is in a signal coverage range or not, and prompting a state of not being in the signal coverage range or removing the signal coverage range;
the signal environment parameter calculation adopts an interference noise generation module comprising single-frequency interference, sky wave interference and noise signals, the interference noise signals and the navigation signals are mutually independent, and any signal combination is realized through power control.
3. The loran-C navigation signal simulation platform based on the CPU + FPGA of claim 1, wherein: the data communication part comprises a parameter packaging issuing module, a parameter receiving module, a parameter analyzing module and an interrupt signal transmission module; the control parameter enters a parameter encapsulation issuing module to be subjected to framing and issuing; receiving and reading the control parameters at the parameter receiving module through a PCIE and memory reading mechanism, then analyzing the received data by the parameter analyzing module according to a communication protocol to obtain FPGA operation control parameters and transmitting the parameters to the signal generating part; meanwhile, the interrupt signal from the signal generation part is transmitted to the parameter calculation part, so that the continuous update of the parameters is realized.
4. The loran-C navigation signal simulation platform based on the CPU + FPGA of claim 3, wherein: the communication protocol between the parameter encapsulation issuing module and the parameter analysis module is characterized in that data transmission takes frames as units, 128 bits of data of each frame and 16 bits of data of the lower frame are used as frame headers, and the frame headers are 0 and 1 in total and correspond to different data types; the frame with the frame header of 0 is transmitted with system signal generation control parameters, which comprise three types of parameters: the pulse group repetition period, the time difference of signals of the main station and the auxiliary station and the signal frequency control parameters; the frame with frame header 1 is transmitted with the signal peripherial difference, power and environmental control parameters.
5. The loran-C navigation signal simulation platform based on the CPU + FPGA of claim 3, wherein: the parameter receiving module completes data receiving through a PCIE interface and a DMA memory mechanism, and controls the data receiving process through a memory pointer; in the starting stage of the simulation platform, a memory pointer stays at a head address, a data issuing module issues a memory reading signal after data is written into a memory, under the control of the signal, the memory pointer is read at the speed of 128 bits each time until the memory pointer moves to the tail of a memory space, and after the memory pointer reaches the tail, the pointer stays at the tail until a next memory reading signal arrives;
the interrupt signal transmission module is provided with an interrupt generation, transmission and response mechanism, so that real-time updating and transmission of data are realized; the interrupt signal transmission utilizes a DMA (direct memory access) memory mechanism, the signal generation part generates an interrupt signal to be stored in the FPGA register, the interrupt signal is transmitted to the parameter calculation part through the PCIE interface, and the interrupt signal transmission module carries out interrupt response after detecting the interrupt signal, so that the parameter updating calculation is realized and the parameter is issued.
6. The loran-C navigation signal simulation platform based on the CPU + FPGA of claim 1, wherein: the phase encoding of the main station and the auxiliary station of the Roland C pulse signal is repeated once every two GRIs; and enabling the initial phase of the single pulse signal to be positive, and according to the phase coding rule, inverting the pulse data bit at a specific position to realize that the initial phase is negative, thereby completing phase coding.
7. The loran-C navigation signal simulation platform based on the CPU + FPGA of claim 1, wherein: the time sequence control module specifically comprises the following modules:
the Rowland C signal has a pulse group period, a phase coding period, a pulse interval and a time limit point, the carrier frequency of the standard signal is 100kHz, the corresponding sinusoidal period is 10us, and the control of each period can be realized by counting the sinusoidal period; the accurate control of the time limit point can be realized through the timing of the lower computer clock.
8. The loran-C navigation signal simulation platform based on the CPU + FPGA of claim 1, wherein: the interrupt signal generation module specifically includes:
the interrupt generating module generates an interrupt signal by taking a phase coding period as a time interval to control the updating of the whole simulation platform; after the initialization is finished, under the control of an interrupt counting start mark, an interrupt generating module starts counting, generates an interrupt signal and controls the updating of the simulation platform when the condition of an updating period is met, and then the process is restarted and repeated after the counting is reset.
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