CN110627013A

CN110627013A - Electrical device and method for manufacturing the same

Info

Publication number: CN110627013A
Application number: CN201910534944.XA
Authority: CN
Inventors: 马克·杰柏
Original assignee: Advanced Semiconductor Engineering Inc
Current assignee: Advanced Semiconductor Engineering Inc
Priority date: 2018-06-22
Filing date: 2019-06-20
Publication date: 2019-12-31

Abstract

An electrical device includes an electronic component, a membrane, and a cover. The electronic component has a first surface and a second surface opposite the first surface. The electronic component has a cavity extending into the electronic component from the first surface of the electronic component. The membrane is disposed within the cavity of the electronic component. The cover is disposed on the first surface of the electronic component.

Description

Electrical device and method for manufacturing the same

Technical Field

The present disclosure relates generally to an electrical device and a method of manufacturing the same. More particularly, the present disclosure relates to an electrical device including a film and a method of manufacturing the same.

Background

In some electrical devices, such as Bulk Acoustic Wave (BAW) filters, micro-electro-mechanical systems (MEMS), etc., a membrane (e.g., a resonator membrane) or thin film is required in the middle of the die. To avoid adversely affecting the performance of the electrical device, the membrane should be isolated from any other physical (e.g., a gap is required for the membrane). However, this will increase the size (e.g., area and/or thickness) of the electrical device.

Disclosure of Invention

In one or more embodiments, an electrical device includes an electronic component, a membrane, and a cover. The electronic component has a first surface and a second surface opposite the first surface. The electronic component has a cavity extending into the electronic component from the first surface of the electronic component. The membrane is disposed within the cavity of the electronic component. The cover is disposed on the first surface of the electronic component.

In one or more embodiments, an electrical device includes an electronic component and a film. The electronic component has a first surface and a second surface opposite the first surface. The electronic component has a cavity extending into the electronic component from the first surface of the electronic component. The membrane is disposed within the cavity of the electronic component. The membrane has a resonant portion physically isolated from the electronic component, and an electrode electrically connected to the electronic component.

In one or more embodiments, a method of forming an electrical device includes: providing a first wafer having a plurality of dies, each die having a plurality of conductive pads, a cavity, and a film within the cavity; providing a second wafer having a plurality of holes; and attaching the first wafer to the second wafer such that the conductive pads of the first wafer are exposed from the holes of the second wafer.

Drawings

Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying drawing figures. Note that various features may not be drawn to scale, and the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion.

Fig. 1A illustrates a cross-sectional view of an electrical device according to some embodiments of the present disclosure;

fig. 1B illustrates a cross-sectional view of an electrical device according to some embodiments of the present disclosure;

fig. 2 illustrates a cross-sectional view of an electrical device according to some embodiments of the present disclosure;

fig. 3 illustrates a cross-sectional view of an electrical device according to some embodiments of the present disclosure;

fig. 4 illustrates a cross-sectional view of an electrical device according to some embodiments of the present disclosure;

fig. 5 illustrates a flow diagram of a method for manufacturing an electrical device, according to some embodiments of the present disclosure;

6A, 6B, 6C, and 6D illustrate methods for manufacturing an electronic device according to some embodiments of the present disclosure;

fig. 7 illustrates a cross-sectional view of an electrical device according to some embodiments of the present disclosure; and

fig. 8A, 8B, 8C, 8D, and 8E illustrate methods for manufacturing an electrical device according to some embodiments of the present disclosure.

Common reference numerals are used throughout the drawings and the detailed description to indicate the same or similar elements. The present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings.

Detailed Description

The structure, manufacture, and use of various embodiments of the disclosure are discussed in detail below. It should be appreciated, however, that the various embodiments set forth many applicable concepts that can be embodied in a wide variety of specific contexts. It is to be understood that the following disclosure provides many different embodiments, or examples, for implementing different features of various embodiments. Specific examples of components and arrangements are described below for discussion purposes. Of course, these are merely examples and are not intended to be limiting.

The embodiments or examples illustrated in the figures are disclosed below using specific language. It will be understood, however, that the embodiments or examples are not intended to be limiting. Any alterations and modifications in the disclosed embodiments, and any further applications of the principles disclosed in this document are contemplated as would normally occur to one skilled in the relevant art to which this disclosure relates.

Additionally, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

Fig. 1A illustrates a cross-sectional view of an electrical device 1A according to some embodiments of the present disclosure. The electrical device 1A includes a substrate 10, a die/chip 11 and a metal lid 12. Fig. 1B illustrates a cross-sectional view of an electrical device 1B according to some embodiments of the present disclosure. The electrical device 1B in fig. 1B is similar to the electrical device in fig. 1A, except that the die 11 in fig. 1A is connected to the substrate 10 by flip-chip technology, while the die 11 in fig. 1B is connected to the substrate 10 by wire bonding technology.

In some embodiments, as shown in fig. 1A, the die 11 is electrically connected to solder balls through vias 11v (e.g., Through Silicon Vias (TSVs)), and the solder balls are electrically connected to the substrate 10. The die 11 in fig. 1A and 1B includes a film 11m (or thin film). In some embodiments, the membrane 11m may be used in a BAW resonator filter or MEMS to receive or detect at least one physical signal (e.g., sound, pressure, temperature, humidity, gas, etc.) from the environment.

A metal lid 12 is disposed on the substrate 10 to cover the die 11 and prevent the film 11m from coming into contact with other objects. As shown in fig. 1A and 1B, the size of each of the electrical devices 1A and 1B in fig. 1A and 1B is relatively large due to the thickness h of the substrate 10, the thickness T and the height j of the lid 12, the distance i between the lid 12 and the substrate 10, and the distance r between the lid and the die 11, which would hinder miniaturization of the electrical devices 1A and 1B. In addition, the cover 12 and the conductive through-holes 11v will increase the manufacturing cost of the electrical devices 1A and 1B. Furthermore, it is also challenging to overcome the following problems of the electrical devices 1A and 1B: work outgassing of lid attachment, flux contamination of the solder attachment process, high stress of the solder attachment process on thin piezoelectric materials, popcorn problems due to the large amount of air trapped inside the lid-expansion during the reflow process.

Fig. 2 illustrates a cross-sectional view of an electrical device 2, according to some embodiments of the present disclosure. The electrical device 2 comprises an electronic component 20, a membrane 21 (or film), a cover 22 and electrical contacts 23.

The electronic component 20 may be a die or a chip. The electronic component 20 includes a semiconductor substrate (Si or SiC), a ceramic substrate or a glass substrate, one or more integrated circuit devices, and one or more overlying interconnect structures therein. The integrated circuit device may include active devices, such as transistors and/or passive devices, such as resistors, capacitors, inductors, or combinations thereof. The electronic component 20 has a surface 201 (e.g., an active surface) and a surface 202 (e.g., a back surface) opposite the surface 201. The electronic component 20 may include a cavity 20c extending from the surface 201 of the electronic component 20 into the electronic component 20. The cavity 20c is arranged to accommodate the membrane 21, allowing the membrane 21 to resonate within the cavity 20 c. The cavity 20c is arranged to protect the membrane 21 to isolate the membrane 21 from the environment outside the electronic assembly 20. The electronic component 20 may include one or more conductive pads 20p on a surface 201 of the electronic component 20 to provide electrical connections. In some embodiments, the thickness of the electronic component 20 is from about 200 micrometers (μm) to about 500 μm.

The membrane 21 is disposed within the cavity 20c of the electronic component 20 and may span the cavity 20c of the electronic component 20. In some embodiments, the film 21 is electrically connected to the conductive pad 20p of the electronic component 20 by an electrical connection. For example, as shown in fig. 2, the film 21 may include a resonant portion isolated from the electronic component 20, and electrodes 21a and 21b electrically connected to the conductive pad 20p of the electronic component 20. In some embodiments, the membrane 21 may be used as a resonator of a BAW filter. In some embodiments, the membrane 21 may be used in a MEMS device configured to receive or detect at least one physical signal (e.g., sound, pressure, temperature, humidity, gas, etc.) from the environment. In some embodiments, the MEMS device may be, for example, a pressure sensor, microphone, barometer, thermometer, hygrometer, gas detector, or the like. For example, the membrane 21 comprises a piezoelectric material to generate a voltage or potential difference across the electrodes 21a and 21b when deformed or pressed. In some embodiments, the membrane 21 includes an actuator configured to physically change shape or vibrate upon application of an external electric field. In some embodiments, the film 21 comprises lead zirconate titanate (PZT). In some embodiments, the thickness of the film 21 is in the range from about 50 μm to about 100 μm.

The cover 22 is disposed on a surface 201 of the electronic component 20. In some embodiments, the cover 22 is attached to the electronic component 20 by an adhesive layer (e.g., covalent bonding, metal bonding (e.g., AuSn) glue or tape, not shown in the figures). The lid 22 includes one or more cavities 22c to expose the conductive pads 20 p. In some embodiments, the cover 22 is formed of or includes silicon or glass. The cover 22 may comprise glass if the film 21 is used for light sensing, otherwise, the cover 22 may comprise silicon to avoid Coefficient of Thermal Expansion (CTE) mismatch between the cover 22 and the electronic component 20. In some embodiments, the thickness of the cover 22 is in the range from about 200 μm to about 400 μm.

An electrical contact 23 is disposed within cavity 22c of lid 22, and is electrically connected to conductive pad 20 p. Portions (e.g., lower portions) of the electrical contacts 23 are exposed from the cover 22 to provide electrical connections for the electronic assembly 20. In some embodiments, electrical contacts 23 are solder balls, copper posts, or any other suitable element for providing an electrical connection.

According to the embodiment in fig. 2, since the membrane 21 is disposed within the cavity 20c of the electronic component 20 and is covered by the electronic component 20 and the cover 22, the membrane 21 may be protected by the electronic component 20 and the cover 22 without adding a further metal cover. Accordingly, the problems encountered by the electrical devices 1A and 1B in fig. 1A and 1B may be solved or alleviated. For example, the size (thickness or area) of the electrical device 2 in fig. 2 may be reduced since no further metal cover is required. For example, manufacturing costs may be reduced because vias are not required to penetrate through electronic component 20 to electrically connect to electrical contacts 23.

Fig. 3 illustrates a cross-sectional view of an electrical device 3, according to some embodiments of the present disclosure. The electrical device 3 in fig. 3 is similar to the electrical device 2 in fig. 2, except that in fig. 2, the film 21 (i.e., the electrodes 21a and 21b) is directly connected with the conductive pad 20p, whereas in fig. 3, the film 21 (i.e., the electrodes 21a and 21b) may be connected to the conductive pad 20p through a connection structure 20p1 (e.g., a conductive via, a redistribution layer (RDL), etc.).

Fig. 4 illustrates a cross-sectional view of an electrical device 4, according to some embodiments of the present disclosure. The electrical device 4 in fig. 4 is similar to the electrical device 2 in fig. 2, except that in fig. 4, the electronic assembly 20 further comprises a fence structure 20 f. The rail structure 20f defines a plurality of openings 20 fh. Thus, a part of the film 21 is covered by the fence structure 20f, and another part of the film 21 is exposed from the opening 20 fh.

Fig. 5 illustrates a flow diagram of a method for manufacturing an electrical device, according to some embodiments of the present disclosure. Fig. 6A, 6B, 6C, and 6D illustrate methods for manufacturing an electrical device, as shown in the operations of the flowchart of fig. 5 (or a portion of the operations in the flowchart of fig. 5), according to some embodiments of the present disclosure. In some embodiments, the methods in fig. 5, 6A, 6B, 6C, and 6D may be used to manufacture the electrical devices 2, 3, or 4 in fig. 2, 3, or 4.

Referring to operation S51, a wafer 60 as shown in FIG. 6A is provided. In some embodiments, wafer 60 may be a Si wafer or a SiC wafer. The wafer 60 may include a plurality of electronic components (or dies), including the electronic components 20 in fig. 2, 3, or 4. For example, each electronic component of the wafer 60 may include a cavity to accommodate the membrane, which allows the membrane to resonate within the cavity. For example, the wafer 60 may include a plurality of conductive pads (or die pads), and a metal ring surrounding the cavity of the wafer 60. In some embodiments, the metal ring is formed from a low melting point metal or a eutectic metal.

Referring to operation S52, a wafer 61 as shown in FIG. 6B is provided. In some embodiments, wafer 61 may be a Si wafer or a glass wafer. As shown in fig. 6B, the wafer 61 may include a plurality of holes 61 h.

Referring to operation S53, as shown in fig. 6C, the wafer 60 is attached to the wafer 61 by, for example, an adhesive layer (e.g., covalent bonding, metal bonding (e.g., AuSn) glue or tape, not shown). In some embodiments, the holes 61h of the wafer 61 expose the die pads of the wafer 61. In some embodiments, wafer 60 is aligned with wafer 61 so that the metal reaches a eutectic temperature to form a hermetic seal around the cavity of wafer 60.

In other embodiments, wafer 61 is provided with a polymeric adhesive coating to adhere to wafer 60. The hole 61h of the wafer 61 may be formed after laminating the wafer 60 and the wafer 61, but will be formed to expose only the conductive pad on the wafer 60.

Referring to operation S54, a curing or reflow process may be performed. In some embodiments, operation S54 may be omitted depending on different design requirements.

Referring to operation S55, electrical contacts 62 (e.g., solder balls) are formed within the holes 61h of the wafer 61 to form the structure shown in fig. 6D. For example, the electrical contacts 62 may be formed by wafer level ball drop, screen printing, electroplating, or any other suitable process.

Referring to operation S56, die labels may be formed on the back side of the wafer 60. In some embodiments, operation S54 may be omitted depending on different design requirements. Referring to operation S57, wafer stack separation is performed by, for example, using mechanical sawing or laser sawing. Referring to operation S58, die/package marking is performed. In some embodiments, operation S54 may be omitted depending on different design requirements. Referring to operation S59, singulation is performed to separate the wafer into individual dies/packages.

As compared with the operation for forming the electric devices 1A and 1B, the operation as illustrated in fig. 5, 6A, 6B, 6C, and 6D includes at least the following advantages: protecting the sensor area (e.g., the space in which the membrane 21 in fig. 2, 3, or 4 is located) from contamination (e.g., solder, water wash, etc.) during the process for forming the electrical contacts (e.g., ball attach process); fixed position to enable ball drop (control solder ball position); and performing a lamination process in a vacuum to form a closed space for the sensor region. In addition, if a closed space is not required, holes may be formed in the wafer 61 to allow air to escape (e.g., release gas) during the reflow operation.

Fig. 7 illustrates a cross-sectional view of an electrical device 7, according to some embodiments of the present disclosure. The electrical device 7 in fig. 7 is similar to the electrical device 3 in fig. 3, and the differences therebetween are described below.

In some embodiments, the electrical device 7 includes a cover 72 disposed on a surface 201 of the electronic component 20. The cover 72 is formed of or includes photoresist, such as photoimageable photoresist. The lid 72 includes one or more openings filled with a seed layer 73s and a conductive post 73. Seed layer 73s is disposed on the sidewalls of the cavity defined by the lid 72 and on the conductive pad 20 p. Conductive posts 73 are disposed within the cavity defined by the lid 72 and on the seed layer 73 s. In some embodiments, seed layer 73s comprises titanium (Ti) and/or copper (Cu). In some embodiments, conductive pillars 73 may comprise Cu, gold (Au), silver (Ag), or alloys thereof. In some embodiments, a barrier layer and a solder layer may be disposed on the surface of conductive pillar 73 facing away from electronic component 20.

The use of photoresist as the cover 72 may have better alignment and a smaller thickness than the use of a glass or silicon cover. Additionally, the conductive posts 73 may be more tightly connected to the cap 72 and conductive pads 20p than solder balls, which may avoid ball drop issues.

Fig. 8A, 8B, 8C, 8D, and 8E illustrate methods for manufacturing an electrical device according to some embodiments of the present disclosure. In some embodiments, the methods illustrated in fig. 8A, 8B, 8C, 8D, and 8E may be used to fabricate an electrical device as shown in fig. 7.

Referring to fig. 8A, an electronic component 20 as shown in fig. 7 or a wafer including the electronic component 20 as shown in fig. 7 is provided. The photoresist 72' is disposed on a surface 201 (i.e., an active surface) of the electronic component 20. The photoresist 72' may include one or more openings or cavities 72c to expose the conductive pads 20p on the surface 201 of the electronic component 20.

Referring to fig. 8B, a seed layer 73s is formed on the surface of the photoresist 72 'facing away from the electronic component 20, with the sidewalls of the cavity 72c and the conductive pad 20p exposed from the photoresist 72'. In some embodiments, the seed layer 73s may be formed by sputtering or other suitable process.

Referring to fig. 8C, a photoresist 72 "is disposed over the photoresist 72'. In some embodiments, photoresist 72 "and photoresist 72' may comprise the same or different materials, depending on different design requirements. The photoresist 72 "may include one or more openings or cavities 72c 'corresponding to the cavities 72c defined by the photoresist 72'. For example, cavity 72c' exposes cavity 72c and the portion of seed layer 73s exposed from cavity 72 c. In some embodiments, cavity 72c' is substantially the same width as cavity 72 c.

Referring to fig. 8D, conductive pillars 73 are formed within cavities 72c and 72c' and on seed layer 73 s. In some embodiments, conductive posts 73 may be formed, for example, by electroplating or any other suitable process. In some embodiments, a barrier layer and/or a solder layer may be formed on conductive pillars 73.

Referring to fig. 8E, the photoresist 72 "is removed. A portion of the seed layer 73 is then removed to form the electrical device 7 as shown in fig. 7. In some embodiments, seed layer 73 may be removed by, for example, etching or any other suitable process. In some embodiments, if a barrier layer and a solder layer are formed on the conductive pillars 73 during the operation illustrated in fig. 8D, a reflow operation may be performed after removal of the seed layer 73 to increase the planarity of the solder layer.

As used herein, the terms "substantially," "essentially," and "about" are used to describe and account for minor variations. When used in conjunction with an event or circumstance, the terms can refer to the situation in which the event or circumstance occurs specifically, as well as the situation in which the event or circumstance occurs in close proximity. For example, when used in conjunction with numerical values, the term can refer to a range of variation that is less than or equal to ± 10% of the stated numerical value, such as less than or equal to ± 5%, less than or equal to ± 4%, less than or equal to ± 3%, less than or equal to ± 2%, less than or equal to ± 1%, less than or equal to ± 0.5%, less than or equal to ± 0.1%, or less than or equal to ± 0.05%. For example, two numerical values are "substantially" identical or equal if the difference between the two numerical values is less than or equal to ± 10% (e.g., less than or equal to ± 5%, less than or equal to ± 4%, less than or equal to ± 3%, less than or equal to ± 2%, less than or equal to ± 1%, less than or equal to ± 0.5%, less than or equal to ± 0.1%, or less than or equal to ± 0.05%) of the mean of the values. For example, "substantially" parallel may refer to a range of angular variation of less than or equal to ± 10 ° from 0 °, such as less than or equal to ± 5 °, less than or equal to ± 4 °, less than or equal to ± 3 °, less than or equal to ± 2 °, less than or equal to ± 1 °, less than or equal to ± 0.5 °, less than or equal to ± 0.1 °, or less than or equal to ± 0.05 °. For example, "substantially" perpendicular may refer to a range of angular variation of less than or equal to ± 10 ° (e.g., less than or equal to ± 5 °, less than or equal to ± 4 °, less than or equal to ± 3 °, less than or equal to ± 2 °, less than or equal to ± 1 °, less than or equal to ± 0.5 °, less than or equal to ± 0.1 °, or less than or equal to ± 0.05 °) relative to 90 °.

Two surfaces can be considered coplanar or substantially coplanar if the displacement between the two surfaces is no more than 5 μm, no more than 2 μm, no more than 1 μm, or no more than 0.5 μm.

As used herein, the terms "conductive", "electrically conductive", and "conductivity" refer to the ability to pass electrical current. Conductive materials generally indicate those materials that present little or zero opposition to current flow. One measure of conductivity is siemens per meter (S/m). Typically, the conductive material has a conductivity greater than about 10⁴S/m (e.g. at least 10)⁵S/m or at least 10⁶S/m) of the above-mentioned material. The conductivity of a material can sometimes change with temperature. Unless otherwise specified, the conductivity of the material was measured at room temperature.

As used herein, the singular terms "a" and "the" may include plural referents unless the context clearly dictates otherwise. In the description of some embodiments, a component provided "on" or "over" another component may encompass the case where the preceding component is directly on (e.g., in physical contact with) the succeeding component, as well as the case where one or more intervening components are located between the preceding and succeeding components.

While the present disclosure has been described and illustrated with reference to particular embodiments thereof, such description and illustration are not intended to limit the present disclosure. It will be clearly understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the true spirit and scope of the invention as defined by the appended claims. The illustrations may not be drawn to scale. Due to variables in the manufacturing process and the like, there may be a distinction between the art reproduction in the present disclosure and the actual device. There may be other embodiments of the disclosure that are not specifically illustrated. The specification and drawings are to be regarded in an illustrative rather than a restrictive sense. Modifications may be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit and scope of the present invention. All such modifications are intended to be within the scope of the appended claims. Although the methods disclosed herein have been described with reference to particular operations performed in a particular order, it should be understood that these operations may be combined, sub-divided, or reordered to form equivalent methods without departing from the teachings of the present disclosure. Accordingly, unless specifically indicated herein, the order and grouping of the operations is not a limitation of the present invention.

Claims

1. An electrical device, comprising:

an electronic component having a first surface and a second surface opposite the first surface, the electronic component having a cavity extending from the first surface of the electronic component into the electronic component;

a membrane disposed within the cavity of the electronic component; and

a cover disposed on the first surface of the electronic component.

2. The electrical device of claim 1, wherein the cavity is sealed by the electronic component and the cover.

3. The electrical device of claim 1, wherein the membrane comprises:

a resonant portion isolated from the electronic component; and

two electrodes electrically connected to conductive pads of the electronic component.

4. The electrical device of claim 3, wherein the cover includes an opening to expose the conductive pad.

5. The electrical device of claim 4, further comprising an electrical contact disposed within the opening and in contact with the conductive pad.

6. The electrical device of claim 5, further comprising a seed layer disposed between sidewalls of the opening and the electrical contact, and between the conductive pad and the electrical contact.

7. The electrical device of claim 1, wherein the electronic component comprises silicon, glass, or ceramic.

8. The electrical device of claim 1, wherein the cover comprises silicon, glass, or photoresist.

9. The electrical device of claim 1, wherein the electronic component comprises a rail structure extending in a direction substantially perpendicular to the membrane, and the rail structure covers a portion of the membrane.

10. An electrical device, comprising:

an electronic component having a first surface and a second surface opposite the first surface, the electronic component having a cavity extending from the first surface of the electronic component into the electronic component; and

a membrane disposed within the cavity of the electronic component,

wherein the membrane includes a resonating portion physically isolated from the electronic component and an electrode electrically connected to the electronic component.

11. The electrical device of claim 10, further comprising a cover disposed on the first surface of the electronic component to seal the cavity.

12. The electrical device of claim 11, wherein the cover comprises silicon, glass, or photoresist.

13. The electrical device of claim 10, wherein

The electronic component includes a conductive pad electrically connected to the electrode of the membrane; and

the cover includes an opening to expose the conductive pad.

14. The electrical device of claim 13, further comprising an electrical contact disposed within the opening and in contact with the conductive pad.

15. The electrical device of claim 14, further comprising a seed layer disposed between sidewalls of the opening and the electrical contact, and between the conductive pad and the electrical contact.

16. The electrical device of claim 10, wherein the electronic component comprises silicon, glass, or ceramic.

17. The electrical device of claim 10, wherein the electronic component comprises a rail structure extending in a direction substantially perpendicular to the membrane, and the rail structure covers a portion of the membrane.

18. A method of forming an electrical device, the method comprising

Providing a first wafer having a plurality of dies, each die having a plurality of conductive pads, a cavity, and a film within the cavity;

providing a second wafer having a plurality of holes; and

attaching the first wafer to the second wafer such that the conductive pads of the first wafer are exposed from the holes of the second wafer.

19. The method of claim 18, further comprising forming an electrical contact within the hole to contact the conductive pad exposed from the hole.

20. The method of claim 18, wherein the second wafer is a silicon wafer or a glass wafer.