CN110620617A - Driving device for DFB laser in quantum key distribution - Google Patents
Driving device for DFB laser in quantum key distribution Download PDFInfo
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- H—ELECTRICITY
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- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
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- H—ELECTRICITY
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- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
- H04B10/501—Structural aspects
- H04B10/503—Laser transmitters
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
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- H04B10/516—Details of coding or modulation
- H04B10/524—Pulse modulation
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- H04B10/54—Intensity modulation
- H04B10/541—Digital intensity or amplitude modulation
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- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/70—Photonic quantum communication
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0816—Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
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Abstract
The invention discloses a driving device for a DFB laser in quantum key distribution, which comprises a controller, two narrow pulse forming devices and a signal adjusting device, wherein the narrow pulse forming devices and the signal adjusting device are integrated on a chip, the controller is connected to the two narrow pulse forming devices and the signal adjusting device, the signal adjusting device respectively adjusts signals output by the two narrow pulse forming devices, the controller respectively outputs two paths of homologous clock signals to the two narrow pulse forming devices, and outputs one path of control signal to the signal adjusting device. Compared with the prior art, the invention has the following advantages: the module is integrated, chipped and miniaturized, so that the volume of the module realizing the same function is greatly reduced, and the volume and the weight of the whole machine body are reduced; the use of a controller to directly control the generation of the homologous clocks and the preparation of narrow pulses representing the spoofed and signal states can be adaptively increased or decreased depending on the modulation performance.
Description
Technical Field
The present invention relates to the field of quantum key distribution technology, and more particularly, to an apparatus for driving a DFB laser in a Quantum Key Distribution (QKD) system.
Background
In the modern society, with the development of science and technology, people have already entered the information society. And people have more and more demands on information safety, and the information safety of everyone, as large as the state, is protected. Quantum cryptography arose in return for solving the potential security problem of information. The quantum cryptography is an encryption and decryption scheme designed by utilizing the quantum characteristics of substances, and the safety of the quantum cryptography is established on the basis of the basic principle of quantum mechanics. The currently commonly used protocol is the QKD scheme proposed by Bennett and Brassard in 1984, referred to as the BB84 protocol. The unconditional security of the ideal device using the BB84 protocol has been strictly proven on the premise that the basic principles of quantum mechanics are assumed to be correct. Although the ideal BB84 protocol has unconditional security, in practical applications, due to various imperfections of the devices, the security of the system is seriously threatened. The combination of multiphoton pulses and the high loss of quantum channels, as present in the light source, is readily available to attackers for photon number separation attacks. The spoofing state protocol provided aiming at the problem can greatly improve the performance of the actual QKD system and resist the potential attack of the separation of the number of the eavesdroppers. The proposal requires that the signal state light pulse and the decoy state light pulse have the same characteristic parameters except the difference of the average photon number.
A DFB Laser (Distributed Feedback Laser) used in QKD needs to have certain improvement on its driving because it needs to satisfy the light emission requirement of the decoy state, so that the Laser can randomly transmit signals of the vacuum state, the decoy state, and the signal state.
In the prior art, as shown in patent ZL201310675458.2, a signal generation process is shown in fig. 1, and includes a high-speed logic control chip and a decoy state optical pulse driving module, where the decoy state optical pulse driving module includes a high-speed true random number expanding module and a decoy state electrical pulse generating module. Firstly, a high-speed logic control chip generates 2bit true random signals, then a high-speed true random number expanding module expands the signals to generate two paths of high-speed true random number signals, 3 groups of random signals of 00, 01 and 10 are randomly generated according to the proportion requirement of the implementation scheme of the decoy state quantum light source, and the specific proportion is optimally designed according to counting statistic fluctuation. Specifically, when the random number is 00, neither PORT 1 (PORT 1) nor PORT 2 (PORT 2) of the high-speed true random number expansion module in the figure is triggered, and at this time, the decoy state electric pulse generation module does not output a signal, and the corresponding laser diode also does not generate a light pulse, and corresponds to a 0 photon state in the decoy state scheme; when the random number sequence is 01, triggering PORT 1, wherein the spoofing state electric pulse generating module 1 generates a short pulse signal with the pulse amplitude of V1, and drives a laser diode to generate an optical signal with the average optical power of P1 through an RF cascade driver, wherein the optical signal corresponds to the spoofing state in the spoofing state scheme; when the random number sequence is 10, the PORT 2 is triggered, and at this time, the spoofed state electric pulse generating module 2 generates a short pulse signal with a pulse amplitude of V2(V2> V1), and drives the laser diode via the RF cascade driver to generate an optical signal with an average optical power of P2(P2 ═ 3P1), which corresponds to the signal state in the spoofed state scheme. Narrow pulse signals with different amplitudes generated by random triggering are coupled into a path through a broadband power synthesizer as shown in the figure, and then are amplified by an RF cascade driver and output.
The driving device of the laser in the prior art has the following problems:
1. the existing circuit design is used for realizing the signal generation process, and has more devices and more complex circuits. And the modularization of the functional devices is large, and a large space is needed when the functional devices are placed in the machine box.
2. The prior art uses a broadband power synthesizer, and the device can only work in a specific frequency range and cannot be adaptively increased or decreased according to the modulation performance.
3. In the prior art, the final output signal is a voltage signal. However, since the DFB laser is a current-driven device, a highly stable driving current is a prerequisite for stable output power, and thus a current signal used for driving the laser is more stable.
4. The pulse amplitudes V1 and V2 of the electric pulse generating modules 1 and 2 are not adjustable, and the proportion change of the output pulse amplitude V1/V2 caused by factors such as environmental temperature and the like cannot be automatically compensated, so that the proportion stability of the decoy-state light source is influenced.
Disclosure of Invention
The invention aims to solve the technical problems of complex circuit, large volume caused by more devices, unstable output power caused by the adoption of a voltage driving signal of a DFB laser and the like.
The invention solves the technical problems through the following technical scheme:
the utility model provides a drive arrangement for DFB laser instrument in quantum key distribution, includes controller, two narrow pulse forming device and signal conditioning equipment, narrow pulse forming device and signal conditioning equipment are integrated on a chip, the controller is connected to two narrow pulse forming device and signal conditioning equipment, and signal conditioning equipment adjusts the signal of two narrow pulse forming device outputs respectively, the controller outputs two ways of homologous clock signal to two narrow pulse forming device respectively, outputs control signal to signal conditioning equipment all the way.
As a first specific technical solution, the driving apparatus for a DFB laser in quantum key distribution further includes two pulse attenuation devices and a high-speed selection switch, the signal conditioning apparatus includes a D/a converter, a controller is connected to an input terminal of the D/a converter and a control terminal of the high-speed selection switch, the two narrow pulse shaping devices are respectively connected to a first selection terminal and a second selection terminal of the high-speed selection switch through corresponding pulse attenuation devices, a first output terminal of the D/a converter is connected to one of the pulse attenuation devices, a second output terminal of the D/a converter is connected to the other pulse attenuation device, a third selection terminal of the high-speed selection switch is grounded, and an output terminal of the high-speed selection switch serves as a signal output terminal of the driving apparatus.
As a further optimization of the above technical solution, the driving apparatus for the DFB laser in quantum key distribution further includes a V/I converter, an output terminal of the high-speed selection switch is connected to an input terminal of the V/I converter, and an output terminal of the V/I converter is used as a signal output terminal of the driving apparatus and connected to the DFB laser.
As a further optimization of the above technical solution, the controller of the driving apparatus for the DFB laser in quantum key distribution outputs three types of signals: outputting two paths of homologous clock signals to two narrow pulse forming devices; outputting a high-speed selection switch control signal to the high-speed selection switch; and outputting the control signal to the D/A converter.
As a further optimization of the above scheme, the controller outputs two paths of homologous clock signals, the two paths of signals respectively generate a narrow pulse signal P1 corresponding to a signal state in a spoofing state scheme and a narrow pulse signal P2 corresponding to a spoofing state in the spoofing state scheme after passing through a corresponding narrow pulse forming device and a corresponding pulse attenuating device, and when a signal state needs to be output, the controller controls the high-speed selection switch to be switched to the first selection end and outputs a narrow pulse signal P1; when a decoy state needs to be output, the controller controls the high-speed selection switch to be switched to the second selection end, and a narrow pulse signal P2 is output; when the vacuum state needs to be output, the controller controls the high-speed selection switch to be switched to the third selection end, an empty signal is output, the signal which is randomly selected to be output is directly converted into a current signal Ipulse through the V/I converter and is connected to a driving current interface of the laser, and random modulation of current pulses of the vacuum state, the signal state and the decoy state signal is achieved.
As further optimization of the scheme, the two narrow pulse forming devices have the same structure and comprise a high-speed signal discrimination circuit and a narrow pulse generation circuit which are sequentially connected.
As a further optimization of the above scheme, the high-speed signal discrimination circuit adopts a hysteresis comparator chip U1 to discriminate and output the differential signals after the input differential signals are discriminated, the positive signal and the negative signal output by the output end of the controller are respectively connected to two input ends of the hysteresis comparator chip U1, and two output ends of the hysteresis comparator chip U1 respectively output the positive signal and the negative signal.
As a further optimization of the above scheme, the narrow pulse generating circuit adopts an intelligent gate chip U2, the signal screened by the high-speed signal screening circuit is input to the intelligent gate chip U2, wherein an anode signal output by the high-speed signal screening circuit is connected with an anode end of a channel selection SEL of the intelligent gate chip U2, a cathode signal output by the high-speed signal screening circuit is connected with an anode input end of a channel D1 of the intelligent gate chip U2, a channel D0 of the intelligent gate chip U2 is suspended, a cathode input end of the channel D1 of the intelligent gate chip U2 is connected with a power supply Vcc through a resistor R7, a cathode end of the channel selection SEL is connected with the power supply Vcc through a resistor R10, and two output ends of the intelligent gate chip U2 respectively output a narrow pulse anode signal and a narrow pulse cathode signal.
As a further optimization of the above scheme, the attenuator is implemented by using a VGA chip U3, the input of the VGA chip U3 is differential input, the narrow pulse positive electrode signal and the narrow pulse negative electrode signal output by the smart gate chip U2 are respectively input to the positive electrode input end and the negative electrode input end of the VGA chip U3, the analog level Vctr0 output by the first output end of the D/a converter is input to the programmable modulation end of one VGA chip U3, the analog level Vctr1 output by the second output end of the D/a converter is input to the programmable modulation end of another VGA chip U3, the analog level Vctr0 controls the VGA chip U3 to output a narrow pulse signal Sig3_ P1 with a pulse amplitude of P1, and the analog level Vctr1 controls the VGA chip U3 to output a narrow pulse signal 3_ P2 with a pulse amplitude of P2, and the narrow pulse signals Sig3_ P5 and Sig3_ P2 are all input to the high-speed selection switch.
As a further optimization of the above scheme, the high-speed selection switch adopts a channel selection chip U4, control signals D1 and D0 sent by a controller are respectively input to control signal input terminals of the channel selection chip U4, narrow pulse signals Sig3_ P1 and Sig3_ P2 are respectively input to signal input terminals of the channel selection chip U4, and the channel selection chip U4 randomly selects three pulse amplitudes to be output as a voltage narrow pulse signal Sig4 under the control of the control signals D1 and D0.
As a second specific technical solution, the driving apparatus for a DFB laser in quantum key distribution further comprises a first bias current adjusting circuit, a second bias current adjusting circuit, a first V/I converter and a second V/I converter, the signal adjusting apparatus comprises a D/a converter, the output end of the controller is connected to the input ends of the two narrow pulse shaping apparatuses and the input end of the D/a converter respectively, the output ends of the two narrow pulse shaping apparatuses are connected to the first V/I converter and the second V/I converter respectively, the output ends of the first V/I converter and the second V/I converter are used as the signal output end of the driving apparatus, the DFB laser is connected, the first output end of the D/a converter is connected to the input end of the first bias current adjusting circuit, the second output end of the D/A converter is connected with the input end of the second bias current regulating circuit, the output end of the first bias current regulating circuit is connected with the first V/I converter, and the output end of the second bias current regulating circuit is connected with the second V/I converter.
As a further optimization of the second technical solution, the controller outputs two types of signals: outputting two paths of homologous clock signals to two narrow pulse forming devices; and outputting the control signal to the D/A converter.
As a further optimization of the second technical solution, the controller outputs two modulated pulse signals in a time-sharing manner, the two modulated pulse signals generate narrow pulse signals after passing through corresponding narrow pulse shaping devices, and then are converted into current signals through corresponding first and second V/I converters, at the same time, another dc bias voltage output by the controller enters the D/a converter, analog signals output by first and second output terminals of the D/a converter respectively pass through a first bias current regulating circuit and a second bias current regulating circuit to respectively regulate the magnitude of pulse current signals output by the first and second V/I converters, the first and second V/I converters output current signals Ipulse to a driving current interface of the laser, the random modulation of the signal current pulses in the vacuum state, the signal state and the decoy state is realized.
As a further optimization of the second technical solution, the first narrow pulse forming device and the second narrow pulse forming device have the same structure and both include a high-speed signal discrimination circuit and a narrow pulse generation circuit which are connected in sequence.
As a further optimization of the second technical solution, the high-speed signal discrimination circuit adopts a hysteresis comparator chip U1 to discriminate and output the differential signals after the input differential signals are discriminated, the positive signal and the negative signal output by the output terminal of the controller are respectively connected to two input terminals of the hysteresis comparator chip U1, and two output terminals of the hysteresis comparator chip U1 respectively output the positive signal and the negative signal.
As a further optimization of the second technical solution, the narrow pulse generating circuit adopts an intelligent gate chip U2, the signal screened by the high-speed signal screening circuit is input to the intelligent gate chip U2, wherein an anode signal output by the high-speed signal screening circuit is connected to an anode terminal of a channel selection SEL of the intelligent gate chip U2, a cathode signal output by the high-speed signal screening circuit is connected to an anode input terminal of a D1 channel of the intelligent gate chip U2, a D0 channel of the intelligent gate chip U2 is suspended, a cathode input terminal of a D1 channel of the intelligent gate chip U2 is connected to a power supply Vcc through a resistor R7, a cathode terminal of the channel selection SEL is connected to the power supply Vcc through a resistor R10, and two output terminals of the intelligent gate chip U2 output a narrow pulse anode signal and a narrow pulse cathode signal respectively.
In the two technical solutions, the third output end of the D/a converter is connected to a voltage-controlled current source, and the output end of the voltage-controlled current source is used as the dc bias current output end of the driving device and connected to the DFB laser.
In the two technical schemes, the V/I converter and the voltage-controlled current source are connected to the negative electrode of the LD of the DFB laser, and the positive electrode of the LD is connected with the signal ground.
In the two above technical solutions, the controller is an FPGA.
Compared with the prior art, the invention has the following advantages:
1. the scheme integrates modules, realizes the chip and is miniaturized, and the volume for realizing the same functional module is greatly reduced. The volume and the weight of the whole body can be reduced.
2. The scheme uses a controller to directly control the output current, control the generation of the same source clock and prepare the narrow pulses representing the trap state P2 and the signal state P1. And simultaneously, the high-speed selection switch is directly controlled to randomly switch the output signal state, the decoy state and the vacuum state. The high-speed selection switch is not limited in the working frequency range, is wider than the working frequency of the broadband power synthesizer, and can be adaptively increased or decreased according to the modulation performance.
3. The output signal of the scheme is a current signal, the DFB laser is used as a current drive device, and the drive current is used for enabling the output power of the DFB laser to be more stable.
4. The pulse amplitude of the narrow pulse signals P1 and P2 can be adjusted through D/A, output pulse amplitude change caused by factors such as environment temperature and the like can be automatically compensated, and the stable ratio of the luminous power of the signal state and the decoy state in the quantum key distribution light source coding scheme is ensured.
Drawings
FIG. 1 is a schematic diagram of a process of generating a driving signal of a decoy light source in the prior art;
fig. 2 is a structural diagram of a DFB laser driving apparatus according to a first embodiment of the present invention;
fig. 3 is a schematic diagram of the structure of a narrow pulse shaping and attenuating device in a DFB laser driving device according to a first embodiment of the present invention;
FIG. 4 is a high-speed signal discrimination circuit diagram in the narrow pulse shaping and attenuating device according to the first embodiment of the present invention;
FIG. 5 is a circuit diagram of a narrow pulse generating circuit in the narrow pulse shaping and attenuating device according to the first embodiment of the present invention;
FIG. 6 is a schematic diagram of narrow pulse signal width control according to a first embodiment of the present invention;
FIG. 7 is a circuit diagram of an attenuator in a narrow pulse shaping and attenuating device according to a first embodiment of the present invention;
FIG. 8 is a circuit diagram of a high-speed selection switch according to a first embodiment of the present invention;
fig. 9 is a diagram showing a specific connection relationship between a driving device of a DFB laser and the DFB laser according to a first embodiment of the present invention;
fig. 10 is a structural view of a DFB laser driving apparatus according to a second embodiment of the present invention.
Detailed Description
The following examples are given for the detailed implementation and specific operation of the present invention, but the scope of the present invention is not limited to the following examples.
In the description of the present application, it is to be understood that the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In this application, unless expressly stated or limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can include, for example, fixed connections, removable connections, or integral parts; the connection can be mechanical connection, electrical connection or communication; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
Example one
As shown in fig. 2, a driving apparatus for a DFB laser in quantum key distribution according to a first embodiment of the present invention includes an FPGA (Field-Programmable Gate Array), a first narrow pulse shaping and attenuating device, a second narrow pulse shaping and attenuating device, a high-speed selection switch, a D/a (digital/analog) converter, a V/I (voltage/current) converter, and a voltage-controlled current source.
And the output end of the FPGA is respectively connected with the input end of the first narrow pulse forming and attenuating device, the input end of the second narrow pulse forming and attenuating device, the input end of the D/A converter and the control end of the high-speed selection switch. The output end of the first narrow pulse shaping and attenuating device and the output end of the second narrow pulse shaping and attenuating device are respectively connected to the first selection end and the second selection end of the high-speed selection switch, the third selection end of the high-speed selection switch is grounded, the output end of the high-speed selection switch is connected with the input end of the V/I converter, and the output end of the V/I converter is connected with the DFB laser. The first output end of the D/A converter is connected with the first narrow pulse shaping and attenuating device, the second output end of the D/A converter is connected with the second narrow pulse shaping and attenuating device, the third output end of the D/A converter is connected with the voltage-controlled current source, and the output end of the voltage-controlled current source is connected with the DFB laser.
The FPGA outputs three types of signals: the first type is two paths of homologous clock signals which are two paths of modulated pulse signals, the phases of the two paths of modulated pulse signals are fixed, the two paths of modulated pulse signals are staggered in time, one path of signal can be directly output and then copied into two paths by the inside of a device, and the two paths of signals can also be directly output, for example, the method for outputting the two paths of signals provided in fig. 2; the second is a high-speed selection switch control signal, and the third is a control signal of the D/a converter.
The first two paths of homologous clock signals are respectively modulated by the first narrow pulse forming and attenuating device and the second narrow pulse forming and attenuating device, and then narrow pulse signals P1 and P2 are respectively output.
The second kind of high-speed selection switch control signal is a Data selection signal output by the FPGA and used for controlling channel switching of the high-speed selection switch, the Data selection signal has the same source with the first kind of clock signals, and the high-speed selection switch randomly switches and outputs three pulse signals with different amplitudes, namely 0, P1 and P2 through the channel switching.
The output voltage of the pulse signal output by the high-speed selection switch is changed into output current Ipulse through the V/I converter, and the output current is used as pulse driving current of the DFB laser.
The control signal of the third class of D/a converters is a dc bias voltage signal, and the electric pulse signal after the narrow pulse molding needs to be attenuated and controlled by the FPGA controlling the D/a converter channel. The amplitude proportion of the narrow pulse signals P1 and P2 is flexibly adjusted according to an encoding scheme by controlling the analog level Vctr0 output by the first output end and the analog level Vctr1 output by the second output end of the D/A converter through the FPGA so as to meet the preparation requirements of a signal state and a trap state. In addition, the FPGA controls a direct current bias voltage signal Vbias output by a third output end of the D/A converter to be changed into stable direct current bias current Ibias after passing through a voltage-controlled current source, and the stable direct current bias current Ibias is used as pre-bias current of the DFB laser and is adjustable in size.
The specific working process is as follows: the FPGA outputs two paths of homologous clock signals, the signals respectively pass through a first narrow pulse forming and attenuating device and a second narrow pulse forming and attenuating device, the first narrow pulse forming and attenuating device generates a narrow pulse signal P1 corresponding to a signal state in a decoy state scheme, the second narrow pulse forming and attenuating device generates a narrow pulse signal P2, and the proportion of the narrow pulse signals P1 to P2 can be set arbitrarily according to needs corresponding to a decoy state in the decoy state scheme. The high-speed selection switch in fig. 2 is controlled by a random Data signal (e.g., a 2-bit random digital signal) sent by the FPGA. According to the trap state quantum light source implementation scheme, when a signal state needs to be output, the Data signal controls the high-speed selection switch to be switched to the first selection end, and a narrow pulse signal P1 is output; when a decoy state needs to be output, the Data signal controls the high-speed selection switch to be switched to the second selection end, and a narrow pulse signal P2 is output; when the vacuum state needs to be output, the Data signal controls the high-speed selection switch to be switched to the third selection end, and a null signal is output. The randomly selected output signal is directly converted into a current signal Ipulse through a V/I converter and is connected to a laser driving current interface, so that the function of randomly modulating the signal current pulse in a vacuum state, a signal state and a decoy state can be realized.
After the driving device for the DFB laser in the quantum key distribution is connected with a driving current interface of the DFB laser, the light pulse emitted by the DFB laser is modulated and attenuated to prepare the quantum light source in the required quantum state.
By adopting the driving device of the DFB laser of the embodiment, the first narrow pulse forming and attenuating device, the second narrow pulse forming and attenuating device, the high-speed selection switch, the D/A converter, the V/I converter and the voltage-controlled current source are integrated on one chip, so that the circuit chip and the module integration are realized, and the device volume is greatly reduced. The scheme is based on an IC chip integration solution while simplifying the circuit, so that compared with a discrete device mode, the scheme embodies the reliability in the aspects of device performance consistency, parameter stability, low device power consumption and the like, and is more favorable for industrial production.
Referring further to fig. 3, the first narrow pulse forming and attenuating device and the second narrow pulse forming and attenuating device have the same structure, and the structure of the first narrow pulse forming and attenuating device is described, where the first narrow pulse forming and attenuating device includes a high-speed signal discriminating circuit, a narrow pulse generating circuit, and an attenuating circuit, which are connected in sequence.
More specifically, referring to fig. 4, the high-speed signal discrimination circuit discriminates the input differential signals and outputs the differential signals differentially by using a hysteresis comparator chip U1, the hysteresis comparator chip U1 has 4 input terminals and 2 output terminals, a positive signal Sig _ P output by the output terminal of the FPGA is connected to a VP terminal of the hysteresis comparator chip U1, a negative signal Sig _ N output by the output terminal of the FPGA is connected to a VT terminal of the hysteresis comparator chip U1, a VTP terminal of the hysteresis comparator chip U1 is connected to a reference voltage Va, a VTN terminal of the hysteresis comparator chip U1 is connected to a reference voltage Vb, a VP terminal and a VTP terminal of the hysteresis comparator chip U1 are connected to a matching resistor R1, and a VT terminal and a VTN terminal of the hysteresis comparator chip U1 are connected to a matching resistor R2. The ground terminal of the hysteresis comparator chip U1 is grounded through the resistor R3, and the OUT _ P and OUT _ N terminals of the hysteresis comparator chip U1 output a positive signal Sig1_ P and a negative signal Sig1_ N, respectively.
As shown in fig. 5, the narrow pulse generating circuit adopts an intelligent gate chip U2, and the signal screened by the high-speed signal screening circuit is input to a U2, wherein a positive signal Sig1_ P output by the high-speed signal screening circuit is connected to a positive terminal of a channel selection SEL of the intelligent gate chip U2, a negative signal Sig1_ N output by the high-speed signal screening circuit is connected to a positive terminal of a D1 channel of the intelligent gate chip U2, a D0 channel of the intelligent gate chip U2 is suspended, a negative terminal of the D1 channel of the intelligent gate chip U2 is connected to a power supply Vcc through a resistor R7, and a negative terminal of the channel selection SEL is connected to the power supply Vcc through a resistor R10. The terminals OUT _ P and OUT _ N of the smart gate chip U2 output a narrow pulse positive signal Sig2_ P and a narrow pulse negative signal Sig2_ N, respectively.
As shown in fig. 6, the narrow pulse signal width control is realized by controlling the wiring length from the output end of the high-speed signal discrimination circuit to the input end of the narrow pulse generation circuit, so that the positive signal Sig1_ P and the negative signal Sig1_ N output by the high-speed signal discrimination circuit generate a time delay of τ, and the narrow pulse output is realized after the output is output through the smart gate chip U2.
As shown in fig. 7, the attenuation apparatus is implemented by using a VGA chip U3, the input of the VGA chip U3 is differential input, the narrow pulse positive electrode signal Sig2_ P and the narrow pulse negative electrode signal Sig2_ N output by the smart gate chip U2 are respectively input to the positive input end and the negative input end of the VGA chip U3, the analog level Vctr0 output by the first output end of the D/a converter is input to the programmable modulation end of the VGA chip U3, similarly, the analog level Vctr1 output by the second output end of the D/a converter is input to the programmable modulation end of the VGA chip U3 in the second narrow pulse shaping and attenuation apparatus, the analog level Vctr0 controls the VGA chip U3 to output a narrow pulse signal Sig 9 _ P1 with a pulse amplitude of P1, and similarly, the analog level Vctr1 controls the chip U3 to output a narrow pulse signal Sig3_ P7 with a pulse amplitude of P2, and the narrow pulse signals 3 and the narrow pulse switch 3 with a pulse amplitude of P36874 3 are both selected as the high-speed pulse signal 3.
Referring to fig. 8, the Data signals sent by the FPGA are set as control signals D1 and D0, the high-speed selection switch adopts a channel selection chip U4, the control signal input end of the channel selection chip U4 inputs the control signals D1 and D0, the signal input end of the channel selection chip U4 inputs the narrow pulse signals Sig3_ P1 and Sig3_ P2, and the narrow pulse signal Sig4 of the output voltage of the channel selection chip U4 randomly selects three pulse amplitudes through the control of the control signals D1 and D0: p1, P2, and 0 outputs.
Fig. 9 shows the specific connection between the driving device of the DFB laser and the DFB laser, where the V/I converter and the voltage-controlled current source are radio frequency transistors, and the V/I converter converts the voltage narrow pulse signal Vpulse output from the previous stage into a current narrow pulse Ipulse with a width τ. The voltage-controlled current source converts a direct-current bias voltage signal Vbias output by the third output end of the D/A converter into corresponding static bias current Ibias. Considering that most of the tube shells of butterfly package DFB lasers are connected to the anode of the LD, the bias/drive signal is connected to the cathode of the LD, and the GND is usually connected to the anode of the LD in practical product design, therefore, the V/I converter and the voltage-controlled current source should be placed at the low side of the LD to realize the suction current operation. The narrow pulse current Ipulse output by the drive device of the DFB laser is connected with the negative electrode of the LD of the DFB laser through the current pulse interface of the DFB laser, the positive electrode of the LD is connected with a signal ground, and the narrow pulse current drives the LD to emit light. The dc bias current Ibias output from the drive device of the DFB laser is connected to the negative electrode of the LD of the DFB laser, and supplies a bias current to the LD to draw a current from the LD.
Example two
As shown in fig. 10, a driving apparatus for a DFB laser in quantum key distribution according to a second embodiment of the present invention includes an FPGA (Field-Programmable Gate Array), a first narrow pulse shaping apparatus, a second narrow pulse shaping apparatus, a first V/I (voltage/current) converter, a second V/I (voltage/current) converter, a D/a (digital/analog) converter, a first bias current adjusting circuit, a second bias current adjusting circuit, and a voltage-controlled current source.
And the output end of the FPGA is respectively connected with the input end of the first narrow pulse forming device, the input end of the second narrow pulse forming device and the input end of the D/A converter. The output end of the first narrow pulse shaping device is connected with a first V/I converter, the output end of the second narrow pulse shaping device is connected with a second V/I converter, and the output ends of the first V/I converter and the second V/I converter are connected with the DFB laser. The first output end of the D/A converter is connected with the input end of the first bias current regulating circuit, the second output end of the D/A converter is connected with the input end of the second bias current regulating circuit, the output end of the first bias current regulating circuit is connected with the first V/I converter, and the output end of the second bias current regulating circuit is connected with the second V/I converter. And the third output end of the D/A converter is connected with a voltage-controlled current source, and the output end of the voltage-controlled current source is connected with the DFB laser.
The FPGA outputs two types of signals: the first type is two paths of homologous clock signals which are two paths of modulation pulse signals and are given by the FPGA in a time-sharing manner; the second type is the control signal of the D/a converter.
The first kind of two paths of homologous clock signals respectively pass through a first narrow pulse forming device and a second narrow pulse forming device to obtain two paths of narrow pulse signals. The first V/I converter and the second V/I converter respectively convert the corresponding narrow pulse signals from voltage signals into current signals so as to facilitate the next current size adjustment.
The control signal of the second class of D/A converter output by the FPGA is a direct current bias voltage signal, and the control signal of the second class of D/A converter is output by a first output port, a second output port and a third output port of the D/A converter after passing through the D/A converter. The analog signal output by the first output end of the D/A converter passes through the first bias current regulating circuit and then regulates the current signal output by the first V/I converter, and finally outputs a current signal P1, the analog signal output by the second output end of the D/A converter passes through the second bias current regulating circuit and then regulates the current signal output by the second V/I converter, and finally outputs a current signal P2, wherein the luminous power ratio of the signal state P1 to the decoy state P2 is as follows: p1: p2 ═ 3 or P2: the ratio of the luminous power of the signal state to the luminous power of the decoy state can be set arbitrarily according to the requirement, namely, the generated signal state, the decoy state and the vacuum state can be randomly controlled by the FPGA to flexibly adjust the analog levels output by the first output end and the second output end of the D/A converter. The current signals P1, P2, 0 are output by PFGA random time-sharing control, i.e. the signal state, the decoy state, and the vacuum state are output randomly time-sharing to form a current Ipulse, which is used as the pulse driving current of the DFB laser. The analog signal output by the third output end of the D/A converter is changed into direct current bias current Ibias after passing through the voltage-controlled current source, and the bias current Ibias is used as the pre-bias current of the DFB laser and is adjustable in size. In summary, the FPGA can adjust the pulse driving current Ipulse and the bias current Ibias through the D/a converter.
The specific working process is as follows: the FPGA outputs two paths of modulation pulse signals in a time-sharing mode, the two paths of modulation pulse signals generate narrow pulse signals after passing through the corresponding first narrow pulse forming device and the corresponding second narrow pulse forming device respectively, and the narrow pulse signals are converted into current signals through the corresponding first V/I converter and the corresponding second V/I converter. Meanwhile, the other path of direct current bias voltage output by the FPGA passes through the D/A converter and is output by the first output end, the second output end and the third output end of the D/A converter respectively. Analog signals output by the first output end and the second output end respectively pass through the first bias current regulating circuit and the second bias current regulating circuit to respectively regulate the pulse current signals output by the first V/I converter and the second V/I converter. The FPGA randomly drives two paths of pulse currents P1 and P2 in a time-sharing manner according to a coding rule and specific clock probability, and outputs a signal state, a decoy state or 0 (vacuum state) signal Ipulse by matching with the adjustment of two paths of bias currents. After the DFB laser is driven by the cooperation of the direct current bias current Ibias, the function of randomly modulating the laser in a vacuum state, a signal state and a decoy state can be realized.
After the driving device for the DFB laser in the quantum key distribution is connected with a driving current interface of the DFB laser, the light pulse emitted by the DFB laser is modulated and attenuated to prepare the quantum light source in the required quantum state.
By adopting the driving device of the DFB laser, circuit chip and module integration are realized, and the device volume is greatly reduced. The scheme simplifies the circuit, improves the reliability of the device and is more favorable for industrial production.
The first narrow pulse forming device and the second narrow pulse forming device in the embodiment have the same structure and comprise a high-speed signal screening circuit and a narrow pulse generating circuit which are connected in sequence, wherein the high-speed signal screening circuit and the narrow pulse generating circuit can adopt the circuits in the first embodiment.
The first V/I converter and the second V/I converter in this embodiment may also adopt the structure of the V/I converter in the first embodiment.
The voltage-controlled current source in this embodiment may adopt the structure of the voltage-controlled current source in the first embodiment.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (19)
1. The driving device for the DFB laser in quantum key distribution is characterized by comprising a controller, two narrow pulse forming devices and a signal adjusting device, wherein the narrow pulse forming devices and the signal adjusting device are integrated on a chip, the controller is connected to the two narrow pulse forming devices and the signal adjusting device, the signal adjusting device respectively adjusts signals output by the two narrow pulse forming devices, the controller respectively outputs two paths of homologous clock signals to the two narrow pulse forming devices, and outputs one path of control signals to the signal adjusting device.
2. The driving apparatus of claim 1, further comprising two pulse attenuating devices and a high-speed selection switch, wherein the signal conditioning device comprises a D/a converter, the controller is connected to an input terminal of the D/a converter and a control terminal of the high-speed selection switch, the two narrow pulse shaping devices are respectively connected to a first selection terminal and a second selection terminal of the high-speed selection switch through corresponding pulse attenuating devices, a first output terminal of the D/a converter is connected to one of the pulse attenuating devices, a second output terminal of the D/a converter is connected to the other pulse attenuating device, a third selection terminal of the high-speed selection switch is grounded, and an output terminal of the high-speed selection switch serves as a signal output terminal of the driving apparatus.
3. The driving apparatus for the DFB laser in quantum key distribution according to claim 2, further comprising a V/I converter, wherein an output terminal of the high speed selection switch is connected to an input terminal of the V/I converter, and an output terminal of the V/I converter is used as a signal output terminal of the driving apparatus and connected to the DFB laser.
4. A driving apparatus for a DFB laser in quantum key distribution according to claim 2, wherein the controller outputs three types of signals: outputting two paths of homologous clock signals to two narrow pulse forming devices; outputting a high-speed selection switch control signal to the high-speed selection switch; and outputting the control signal to the D/A converter.
5. The driving apparatus of claim 3, wherein the controller outputs two paths of homologous clock signals, the two paths of signals respectively pass through the corresponding narrow pulse shaping device and the pulse attenuating device, and then respectively generate a narrow pulse signal P1 corresponding to a signal state in a decoy state scheme and a narrow pulse signal P2 corresponding to a decoy state in the decoy state scheme, and when a signal state needs to be output, the controller controls the high-speed selection switch to be switched to the first selection terminal, and outputs a narrow pulse signal P1; when a decoy state needs to be output, the controller controls the high-speed selection switch to be switched to the second selection end, and a narrow pulse signal P2 is output; when the vacuum state needs to be output, the controller controls the high-speed selection switch to be switched to the third selection end, an empty signal is output, the signal which is randomly selected to be output is directly converted into a current signal Ipulse through the V/I converter and is connected to a driving current interface of the laser, and random modulation of current pulses of the vacuum state, the signal state and the decoy state signal is achieved.
6. The driving device for the DFB laser in quantum key distribution according to claim 2, wherein the two narrow pulse shaping devices have the same structure and comprise a high-speed signal discrimination circuit and a narrow pulse generation circuit which are connected in sequence.
7. The driving apparatus for the DFB laser in quantum key distribution according to claim 6, wherein the high-speed signal screening circuit employs a hysteresis comparator chip U1 to screen the input differential signals and output them differentially, the positive signal and the negative signal output by the output terminal of the controller are respectively connected to two input terminals of the hysteresis comparator chip U1, and two output terminals of the hysteresis comparator chip U1 respectively output the positive signal and the negative signal.
8. The driving apparatus as claimed in claim 7, wherein the narrow pulse generating circuit employs a smart gate chip U2, and the signal screened by the high-speed signal screening circuit is input to the smart gate chip U2, wherein the positive signal output by the high-speed signal screening circuit is connected to the positive terminal of the channel selection SEL of the smart gate chip U2, the negative signal output by the high-speed signal screening circuit is connected to the positive terminal of the D1 channel of the smart gate chip U2, the D0 channel of the smart gate chip U2 is floating, the negative terminal of the D1 channel of the smart gate chip U2 is connected to the Vcc through a resistor R7, the negative terminal of the channel selection SEL is connected to the Vcc through a resistor R10, and two output terminals of the smart gate chip U2 output the narrow pulse positive signal and the narrow pulse negative signal, respectively.
9. A driving apparatus for a DFB laser in quantum key distribution according to claim 8, the high-speed selective switch is characterized in that the attenuator is realized by adopting a VGA chip U3, the input of the VGA chip U3 is differential input, a narrow pulse positive electrode signal and a narrow pulse negative electrode signal output by an intelligent gate chip U2 are respectively input into a positive electrode input end and a negative electrode input end of the VGA chip U3, an analog level Vctr0 output by a first output end of a D/A converter is input into a programmable modulation end of one VGA chip U3, an analog level Vctr1 output by a second output end of the D/A converter is input into a programmable modulation end of the other VGA chip U3, the analog level Vctr0 controls the VGA chip U3 to output a narrow pulse signal Sig3_ P1 with a pulse amplitude of P1, the analog level Vctr1 controls the VGA chip U3 to output a narrow pulse signal Sig3_ P2 with a pulse amplitude of P2, and the narrow pulse signals Sig3_ P1 and Sig3_ P2 are all input into the high-speed selective switch.
10. The driving apparatus of the DFB laser used in the quantum key distribution as recited in claim 9, wherein the high speed selection switch employs a channel selection chip U4, the control signal input terminals of the channel selection chip U4 input the control signals D1 and D0 sent by the controller, respectively, the signal input terminals of the channel selection chip U4 input the narrow pulse signals Sig3_ P1 and Sig3_ P2, and the channel selection chip U4 randomly selects three pulse amplitudes as the voltage narrow pulse signal Sig4 to output by the control of the control signals D1 and D0.
11. The driving apparatus of claim 1, further comprising a first bias current adjusting circuit, a second bias current adjusting circuit, a first V/I converter and a second V/I converter, wherein the signal adjusting apparatus comprises a D/A converter, the output terminal of the controller is connected to the input terminals of the two narrow pulse shaping apparatuses and the input terminal of the D/A converter, the output terminals of the two narrow pulse shaping apparatuses are connected to the first V/I converter and the second V/I converter, the output terminals of the first V/I converter and the second V/I converter are used as the signal output terminal of the driving apparatus, the DFB laser is connected, the first output terminal of the D/A converter is connected to the input terminal of the first bias current adjusting circuit, the second output end of the D/A converter is connected with the input end of the second bias current regulating circuit, the output end of the first bias current regulating circuit is connected with the first V/I converter, and the output end of the second bias current regulating circuit is connected with the second V/I converter.
12. A driving apparatus for a DFB laser in quantum key distribution according to claim 11, wherein the controller outputs two types of signals: outputting two paths of homologous clock signals to two narrow pulse forming devices; and outputting the control signal to the D/A converter.
13. The driving apparatus as claimed in claim 11, wherein the controller outputs two modulated pulse signals in a time-sharing manner, the two modulated pulse signals respectively pass through the corresponding narrow pulse shaping devices to generate narrow pulse signals, and then are converted into current signals through the corresponding first V/I converter and the second V/I converter, and at the same time, another dc bias voltage outputted by the controller enters the D/a converter, the analog signals outputted from the first and second output terminals of the D/a converter respectively pass through the first bias current regulating circuit and the second bias current regulating circuit to respectively regulate the magnitude of the pulse current signals outputted from the first V/I converter and the second V/I converter, and the current signals Ipulse outputted from the first V/I converter and the second V/I converter are connected to the driving current interface of the laser, the random modulation of the signal current pulses in the vacuum state, the signal state and the decoy state is realized.
14. The driving apparatus for the DFB laser in quantum key distribution according to claim 11, wherein the first narrow pulse shaping apparatus and the second narrow pulse shaping apparatus have the same structure, and each of the first narrow pulse shaping apparatus and the second narrow pulse shaping apparatus includes a high-speed signal discriminating circuit and a narrow pulse generating circuit connected in sequence.
15. The driving apparatus for the DFB laser in quantum key distribution according to claim 14, wherein the high-speed signal screening circuit employs a hysteresis comparator chip U1 to screen the input differential signals and output them differentially, the positive signal and the negative signal output by the output terminal of the controller are respectively connected to two input terminals of the hysteresis comparator chip U1, and two output terminals of the hysteresis comparator chip U1 respectively output the positive signal and the negative signal.
16. The driving apparatus as claimed in claim 15, wherein the narrow pulse generating circuit employs a smart gate chip U2, and the signal screened by the high-speed signal screening circuit is input to the smart gate chip U2, wherein the positive signal output by the high-speed signal screening circuit is connected to the positive terminal of the channel selection SEL of the smart gate chip U2, the negative signal output by the high-speed signal screening circuit is connected to the positive terminal of the D1 channel of the smart gate chip U2, the D0 channel of the smart gate chip U2 is floating, the negative terminal of the D1 channel of the smart gate chip U2 is connected to the Vcc through a resistor R7, the negative terminal of the channel selection SEL is connected to the Vcc through a resistor R10, and two output terminals of the smart gate chip U2 output the narrow pulse positive signal and the narrow pulse negative signal, respectively.
17. A driving apparatus for a DFB laser in quantum key distribution according to any of claims 2 to 16, wherein the third output terminal of the D/a converter is connected to a voltage-controlled current source, and the output terminal of the voltage-controlled current source is used as the dc bias current output terminal of the driving apparatus and is connected to the DFB laser.
18. The driving apparatus of claim 17, wherein the V/I converter and the voltage-controlled current source are connected to a negative electrode of the LD of the DFB laser, and a positive electrode of the LD is connected to a signal ground.
19. A driving apparatus for a DFB laser in quantum key distribution according to any of claims 1 to 16, wherein the controller is an FPGA.
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