CN110620588A - BPL decoding method and device based on polarization code - Google Patents

BPL decoding method and device based on polarization code Download PDF

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CN110620588A
CN110620588A CN201911022459.0A CN201911022459A CN110620588A CN 110620588 A CN110620588 A CN 110620588A CN 201911022459 A CN201911022459 A CN 201911022459A CN 110620588 A CN110620588 A CN 110620588A
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decoding
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information bit
decoded
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CN110620588B (en
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张川
任雨青
张琪
尤肖虎
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Network Communication and Security Zijinshan Laboratory
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Network Communication and Security Zijinshan Laboratory
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/15Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

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Abstract

The embodiment of the invention discloses a BPL decoding method and device based on a polarization code, relates to the technical field of communication, and can improve decoding performance. The invention comprises the following steps: after the information to be decoded is input into a decoder, updating the information bit value of the R layer; importing information to be decoded into a pre-constructed decoding path to obtain first decoding information; and performing Cyclic Redundancy Check (CRC) on the first decoding information to obtain second decoding information and outputting the second decoding information by the decoder. The invention is suitable for decoding the polarization code.

Description

BPL decoding method and device based on polarization code
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a BPL decoding method and apparatus based on a polar code.
Background
The polar code is a novel coding method which is strictly proved to reach the shannon limit in the binary discrete memoryless channel at present, and is determined as a coding scheme of a 5G eMBB scene control channel in the 5G short code scheme discussion of 3GPP RAN 1#87 meetings.
Currently, decoding of polarization codes is divided into two ways: a Serial Cancellation (SC) algorithm and a Belief Propagation (BP) algorithm. SC decoding has the problem of less than ideal performance in the case of limited long codewords. Compared with the SC decoding algorithm, the BP decoding algorithm has very good parallel throughput and can realize high decoding rate. However, the error correction performance of the BP decoding algorithm on decoding the polar code is not as good as that of the SC decoding algorithm, which mainly results from two inherent defects: 1. the slower convergence results in a BP decoder being burdened with greater computational complexity; 2. at present, BP decoding performance is still far inferior to SCL (successive cancellation list) decoding performance and CA-SCL (cyclic redundancy code) aided SCL (CA-SCL) decoding performance. Therefore, the existing BP decoding scheme still has the problems of complexity and low performance.
Disclosure of Invention
The embodiment of the invention provides a BPL decoding method and device based on a polar code, which can improve the decoding performance.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
in one aspect, an embodiment of the present application provides a BPL decoding method based on a polar code, including: after the information to be decoded is input into a decoder, updating the information bit value of the R layer; importing information to be decoded into a pre-constructed decoding path to obtain first decoding information; and performing Cyclic Redundancy Check (CRC) on the first decoding information to obtain second decoding information and outputting the second decoding information by the decoder.
In one possible design, the updating information bit values of the R layer includes:
carrying out information updating on an information bit R (i,1) in the R layer according to the index of the position matrix after negation, wherein the index of the position matrix is the index of the matrix of the information bit set; the changed information bit R (i,1) is updated to the current value of information bit L (i, 1).
In one possible design, the pre-constructed coding path includes: the information to be decoded enters a decoder with the factor graph of the initial state for decoding; if the Code Word (Code Word) can be converged in the decoder, the stop criterion of BP decoding is met, the decoding is judged to be successful, and the Code Word is output as the first decoding information.
In one possible design, after the information to be decoded is input to the decoder, updating the information bit value of the R layer includes: step 1, acquiring a sequence of likelihood ratio soft information of a coded signal according to the information to be decoded, and starting decoding; step 2, respectively initializing values of an information bit R and an information bit L at two ends of a factor graph according to the prior information of the code words and the sequence of the likelihood ratio soft information; step 3, executing a BP decoding algorithm once; step 4, performing early stop check and CRC check based on a G matrix, and if the results of the early stop check and the CRC check are both check coincidence, determining that the decoding is successful, wherein the G matrix is a generation matrix of a polarization code; if not, entering the step 5; step 5, replacing R (i,1) of the current information bit with the value of L (i, 1); steps 1-4 are performed again.
In one possible design, the pre-constructed coding path includes: simultaneously entering information to be decoded into at least 2 decoders for parallel decoding, and obtaining code words output by each decoder, wherein each decoder is provided with a factor graph; and leading the code words output by each decoder into a Euclidean distance decision device, and reserving one code word as the first decoding information output.
In another aspect, an embodiment of the present application provides a BPL decoding apparatus based on a polar code, including:
the preprocessing module is used for updating the information bit value of the R layer after the information to be decoded is input into the decoder; the decoding module is used for leading information to be decoded into a pre-constructed decoding path to obtain first decoding information; and the checking module is used for performing Cyclic Redundancy Check (CRC) on the first decoding information to obtain second decoding information and outputting the second decoding information by the decoder.
In one possible design, the preprocessing module is specifically configured to update information of an information bit R (i,1) in an R layer according to an index of a position matrix after inversion, where the index of the position matrix is an index of a matrix of an information bit set; the changed information bit R (i,1) is updated to the current value of information bit L (i, 1).
In a possible design, the decoding module is specifically configured to decode information to be decoded by a decoder that enters a factor graph having the initial state; if the Code Word (Code Word) can be converged in the decoder, the stop criterion of BP decoding is met, the decoding is judged to be successful, and the Code Word is output as the first decoding information.
In a possible design, the preprocessing module is specifically configured to, in step 1, obtain a sequence of likelihood ratio soft information of an encoded signal according to the information to be decoded, and start decoding; step 2, respectively initializing values of an information bit R and an information bit L at two ends of a factor graph according to the prior information of the code words and the sequence of the likelihood ratio soft information; step 3, executing a BP decoding algorithm once; step 4, performing early stop check and CRC check based on a G matrix, and if the results of the early stop check and the CRC check are both check coincidence, determining that the decoding is successful, wherein the G matrix is a generation matrix of a polarization code; if not, entering the step 5; step 5, replacing R (i,1) of the current information bit with the value of L (i, 1); steps 1-4 are performed again.
In a possible design, the decoding module is further configured to enter at least 2 decoders simultaneously for decoding, and obtain codewords output by the decoders, where each decoder has a factor graph; and leading the code words output by each decoder into a Euclidean distance decision device, and reserving one code word as the first decoding information output.
The BPL decoding method and device based on the polarization code, provided by the embodiment of the invention, construct a new algorithm called RMS by changing R (i,1) in each iteration algorithm on the basis of an SMS decoding algorithm. The RMS decoding algorithm may greatly increase FER performance and speed convergence rate. And combining the RMS algorithm and the BPL, and adding a Cyclic Redundancy Check (CRC) to assist in final judgment to obtain the EBPL decoding algorithm. The newly proposed EBPL decoding algorithm utilizes reasonable hardware complexity to enable the system to achieve the decoding performance of the polarization code SCL under the condition of keeping the original parallel throughput, and meanwhile, the EBPL decoding algorithm has good stability. Compared with the prior art, the embodiment can improve FER performance and accelerate convergence rate by converting the specific bit initialized by the R layer on the basis of SMS and adding the RMS algorithm obtained by CRC in the final decision, thereby improving decoding performance.
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In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a structural diagram of an entire design of an EBPL decoding algorithm provided in an embodiment of the present application.
Fig. 2 is a schematic flow chart of a method according to an embodiment of the present disclosure.
Fig. 3 is a logic flow diagram for decoding a polarization code RMS according to an embodiment of the present application.
Fig. 4 is a logic flow diagram of an EBPL decoding final decision according to an embodiment of the present disclosure.
Fig. 5 is a graph comparing the performance of RMS decoding and SMS decoding on FER according to an embodiment of the present application.
Fig. 6 is a graph comparing the performance of EBPL decoding with other algorithms (including SMS decoding, BPL decoding, SCL decoding) on BER according to an embodiment of the present application.
Fig. 7 is a graph comparing the performance of EBPL decoding with other algorithms (including SMS decoding, BPL decoding, SCL decoding) on FER according to an embodiment of the present application.
Fig. 8 is a schematic diagram of a system architecture of a transmitting end and a receiving end according to an embodiment of the present application;
fig. 9 is a schematic diagram of an internal structure of a receiving end according to an embodiment of the present disclosure;
fig. 10 is a schematic diagram of an internal structure of a transmitting end according to an embodiment of the present application;
FIG. 11 is a schematic diagram of pseudo code form of RMS decoding according to an embodiment of the present application;
fig. 12 is a schematic diagram of a pseudo code form of EBPL decoding according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions of the present invention better understood, the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments. Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention. As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or coupled. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
The embodiment of the present application may be applied to a scenario in which Polar encoding and decoding are performed on information bits, for example: the method and the device can be applied to a scenario in which Polar coding and decoding are performed on the eMBB uplink control information and the downlink control information, and also can be applied to other scenarios in which a BP decoder exists, for example, the method and the device are applied to a channel coding part of a 5.1.3 channel coding, uplink control information, downlink control information, and a Sidelink channel of the communication standard 36.212, which is not limited in the embodiment of the present application.
The system of the embodiment of the present application may include a sending end and a receiving end, and as shown in fig. 8, is a schematic diagram of a system architecture of the sending end and the receiving end. The sending end is an encoding side and can be used for encoding and outputting encoding information, and the encoding information is transmitted to a decoding side on a channel; the receiving end is a decoding side and can be used for receiving the coding information sent by the sending end and decoding the coding information. The sending end and the receiving end may be terminals, servers, base stations, or other devices that can be encoded and decoded, and the present application is not limited thereto. The terminal may be a Personal Computer (PC), a mobile phone, a tablet computer (pad), a smart learning machine, a smart game machine, a smart television, smart glasses, or a smart watch.
Fig. 9 is a schematic diagram of an internal structure of a receiving end according to the present invention, and in this embodiment, the receiving end may include a processing module 901, a communication module 902, and a storage module 903. The processing module 901 is configured to control hardware devices and application software of each part of the sending end; the communication module 902 is configured to receive an instruction sent by another device using a wireless fidelity (wifi) communication method, and may also send data to another device; the storage module 903 is used for storing a software program, storing data, running software, and the like on the receiving end.
Fig. 10 is a schematic diagram of an internal structure of a transmitting end according to the present invention, and in this embodiment, the transmitting end may include a processing module 1001, a communication module 1002, and a storage module 1003. The processing module 1001 is configured to control hardware devices and application software of each part of the sending end; the communication module 1002 is configured to receive an instruction sent by other equipment in a communication manner such as wifi, and also send data of a receiving end to the other equipment; the storage module 1003 is used for storing software programs of the transmitting end, storing data, running software and the like.
The embodiment of the application provides a polar code-based BPL (belief propagation list decoding) decoding method, aiming at optimizing an existing SMS (scaled min-sum algorithm) decoding mode into RMS (RMS (updated min-sum algorithm) based on an updated minimum sum algorithm) to increase a convergence rate. And then, combining the RMS and BPL decoding modes to obtain the whole EBPL (efficient belief propagation list decoding) decoding algorithm. The basic design idea is as follows: based on the polarization code SMS decoding algorithm, a new decoding algorithm is proposed called RMS. Specifically, RMS decoding is constructed based on an SMS algorithm, two-point optimization is carried out on the SMS algorithm, and R layer information updating sequence is changed respectively; and adding a CRC at the end of the decoder to improve the convergence rate of the RMS decoding algorithm. Therefore, the design idea of the embodiment of the application is to combine some existing optimization modes to improve and fuse the algorithm, and provide an efficient belief propagation list algorithm (EBPL), so that the obtained simulation result of BER and FER performance can exceed the performance of an SCL decoding algorithm.
The embodiment of the invention provides a polarization code-based BPL decoding method, as shown in FIG. 2, comprising:
s101, after the information to be decoded is input into the decoder, the information bit value of the R layer is updated.
Wherein, the R layer refers to the soft information likelihood ratio of uncoded code words entering a factor graph from the left side in BP decoding; correspondingly, there is also an L layer that accepts the encoded soft information likelihood ratio for the channel entering the factor graph from the right in BP decoding.
S102, importing the information to be decoded into a pre-constructed decoding path to obtain first decoding information.
And S103, performing Cyclic Redundancy Check (CRC) on the first coding information to obtain second decoding information and outputting the second decoding information by the decoder.
In this embodiment, the specific manner for updating the information bit value of the R layer includes:
and updating the information of the information bit R (i,1) in the R layer according to the index of the position matrix after the inversion. The changed information bit R (i,1) is updated to the current value of information bit L (i, 1).
Wherein the index of the position matrix is the index of the matrix of the information bit set. The term "inversion" as used herein refers to the inversion in the usual mathematical calculation, and is understood to mean the inversion of the order. As shown in FIG. 3, for a length N polarization code, the size of the factor graph is (N, log)2N), so that the corresponding R and L are also (N, log)2N +1) dimension, where R (i,1) corresponds to the first column of R and L (i,1) corresponds to the first column of L. In this embodiment, information of R (i,1) is updated according to the inverted index of the position matrix, and R (i,1) changed in the previous iteration is correspondingly updated to the current L (i,1) value, so as to accelerate the convergence speed. Wherein L is1,1R1,1The first of L (i,1) and R (i,1) above, and the other parameters L and R with lower right-hand indices are the same.
In this embodiment, the specific manner of the pre-constructed decoding path includes: and the information to be decoded enters a decoder with the factor graph of the initial state for decoding. If the Code Word (Code Word) can be converged in the decoder, the stop criterion of BP decoding is met, the decoding is judged to be successful, and the Code Word is output as the first decoding information.
The Factor graph (Factor graph) is an industry term, and the Factor graph in the initial state refers to a Factor graph that is not currently changed, and is the Factor graph in the initial state as shown in fig. 3.
In this embodiment, the specific manner for updating the information bit value of the R layer after the information to be decoded is input to the decoder includes:
step 1, according to the information to be decoded, obtaining a sequence of likelihood ratio soft information of the coded signal, and starting decoding.
And 2, respectively initializing the values of an information bit R and an information bit L at two ends of the factor graph according to the prior information of the code words and the sequence of the likelihood ratio soft information.
And 3, executing a BP decoding algorithm once.
And 4, performing early stop check and CRC check based on a G matrix, and judging that the decoding is successful if the results of the early stop check and the CRC check are both check coincidence, wherein the G matrix is a generation matrix of the polarization code. If not, go to step 5.
And 5, replacing R (i,1) of the current information bit with the value of L (i, 1).
Steps 1-4 are performed again.
In this embodiment, a logic flow diagram of an RMS decoding algorithm for decoding a polarization code is shown in fig. 4, and the obtained optimization effect is shown in fig. 5, that is, on the premise of ensuring a code rate, when an extra 4-bit codeword is added to the RMS decoding to transmit CRC, the performance is still better than that of SMS decoding. The algorithm flow comprises the following steps:
1. the RMS decoder receives a sequence of likelihood ratio soft information of the coded signal after passing through a wireless channel, and decoding is started;
2. firstly, respectively initializing the values of R and L at two ends of a factor graph according to the prior information of a code word and the sequence of received likelihood ratio soft information;
3. carrying out normal one-time BP decoding algorithm;
4. performing early-stop check and CRC check based on a G matrix, if the two are in accordance, successfully decoding, outputting a code word, and if the two are not successful, entering a step 5, wherein the G matrix is a generation matrix of a polarization code;
5. replacing the current R (i,1) with the value of L (i,1), and noting that the range needing to be updated is accumulated in each decoding, namely, the number of R (i,1) needing to be updated is gradually increased;
6. and entering RMS decoding again, and carrying out BP decoding again.
When designing a corresponding computer program, it may be in the form of pseudo code as shown in fig. 11.
In fig. 5 to 7 of this embodiment, Performance represents Performance, FER represents frame error rate, EbN0 represents signal-to-noise ratio, and BER represents bit error rate.
Data format: SMS for (64,32) with t equal to 64, which represents the performance of the SMS decoding algorithm for (64,32) polar codes, wherein the maximum number of iterations t is 64, and the data formats of other similar SMS are the same;
data format: RMS for (64,36) with crc 4, which represents the performance of RMS decoding algorithm for (64,36) polar codes, where 4 bits crc are concatenated, and other similar RMS data formats are the same;
data format: EBPL for (64,36) with L-8 and crc-4, represents EBPL decoding algorithm performance for (64,36) polar codes, where path L-8 concatenates 4 bits crc, and the data format of other similar EBPL is the same.
The pre-constructed decoding path in this embodiment may also be implemented as: the factor graph sequence is changed to reasonably construct multiple decoding paths in RMS decoding, and factor graph sequence parameters are added on the basis of an RMS decoding algorithm, so that the decoding process has multiple paths, and the efficiency is improved. This kind of final decoding algorithm of polarization code EBPL (EBPL efficient belief propagation list algorithm) is proposed for this embodiment by combining the RMS decoding algorithm and the BPL decoding algorithm. Further, Cyclic Redundancy Checks (CRC) may be added at the decoder end of the RMS decoder and EBPL to assist in the final decision. Where CRC is used as an early stop decision in the RMS decoding algorithm to select the best path over the entire EBPL.
The method specifically comprises the following steps: and simultaneously entering the information to be decoded into at least 2 decoders for parallel decoding, and obtaining the code words output by each decoder. And leading the code words output by each decoder into a Euclidean distance decision device, and reserving one code word as the first decoding information output.
Wherein, each decoder is provided with a factor graph. Specifically, from the perspective of a single RMS decoder, information to be decoded enters an RMS decoding algorithm device with a factor graph in an initial state for decoding, if a code word can be converged in the RMS decoder and meets the stop criterion of BP decoding, the decoding is successful, and the code word is output; for the EBPL decoder, the EBPL decoder essentially has a plurality of RMS decoders each having its own unique factor graph structure, so that the plurality of RMS decoders are performed in parallel, and a euclidean distance decision device may be provided at the end of each RMS decoder in the EBPL decoder to decide whether each RMS decoder decodes a codeword, and the best codeword is selected for output. The screening rule for the good or bad of the code word can be determined according to the specific application scenario.
The EBPL decoding algorithm for polar codes proposed in this embodiment combines the RMS decoding and BPL decoding ideas, i.e., adding factor graph sequence parameters based on the RMS decoding algorithm, so that the decoding process has multiple paths, and the decoding efficiency is improved. In addition, a CRC algorithm is also introduced in path selection. The overall structure of the EBPL decoding algorithm is shown in fig. 1, where u and x, with the lower right hand indices, are the input and output parameters of SMS decoding, respectively. The hardware design of the final decision of its decoding is shown in fig. 4. Fig. 6 and 7 show the performance comparison of EBPL with other existing optimization algorithms in terms of FER and BER. The general flow of EBPL decoding includes:
the EBPL decoder receives the encoded signal likelihood ratio soft information sequence after passing through the wireless channel, and decoding is started; the EBPL decoder is provided with L independent RMS decoders, and a single RMS is decoded according to the own rule; and adding a Euclidean distance decision device and a CRC checker at the tail end of the EBPL decoder, and selecting the code word with the minimum Euclidean distance, wherein the code word passing the CRC check has priority.
When designing a corresponding computer program, it may be in the form of pseudo code as shown in fig. 12.
The present embodiment further provides a BPL decoding apparatus based on polar codes, including:
and the preprocessing module is used for updating the information bit value of the R layer after the information to be decoded is input into the decoder.
And the decoding module is used for leading the information to be decoded into a pre-constructed decoding path to obtain first decoding information.
And the checking module is used for performing Cyclic Redundancy Check (CRC) on the first decoding information to obtain second decoding information and outputting the second decoding information by the decoder.
The preprocessing module is specifically configured to perform information update on an information bit R (i,1) in the R layer according to an inverted index of a position matrix, where the index of the position matrix is an index of a matrix of an information bit set. The changed information bit R (i,1) is updated to the current value of information bit L (i, 1).
The decoding module is specifically used for decoding the information to be decoded by a decoder entering the factor graph with the initial state. If the Code Word (Code Word) can be converged in the decoder, the stop criterion of BP decoding is met, the decoding is judged to be successful, and the Code Word is output as the first decoding information.
The decoding method is characterized in that the preprocessing module is specifically used for step 1, acquiring a sequence of likelihood ratio soft information of the coded signal according to the information to be decoded, and starting decoding.
And 2, respectively initializing the values of an information bit R and an information bit L at two ends of the factor graph according to the prior information of the code words and the sequence of the likelihood ratio soft information.
And 3, executing a BP decoding algorithm once.
And 4, performing early stop check and CRC check based on a G matrix, and judging that the decoding is successful if the results of the early stop check and the CRC check are both check coincidence, wherein the G matrix is a generation matrix of the polarization code. If not, go to step 5.
And 5, replacing R (i,1) of the current information bit with the value of L (i, 1).
Steps 1-4 are performed again.
The decoding module is further configured to enter at least 2 decoders simultaneously for decoding information to be decoded, and obtain codewords output by the decoders, where each decoder has a factor graph.
And leading the code words output by each decoder into a Euclidean distance decision device, and reserving one code word as the first decoding information output.
The BPL decoding method and device based on the polarization code, provided by the embodiment of the invention, construct a new algorithm called RMS by changing R (i,1) in each iteration algorithm on the basis of an SMS decoding algorithm. The RMS decoding algorithm may greatly increase FER performance and speed convergence rate. And combining the RMS algorithm and the BPL, and adding a Cyclic Redundancy Check (CRC) to assist in final judgment to obtain the EBPL decoding algorithm. The newly proposed EBPL decoding algorithm utilizes reasonable hardware complexity to enable the system to achieve the decoding performance of the polarization code SCL under the condition of keeping the original parallel throughput, and meanwhile, the EBPL decoding algorithm has good stability. Compared with the prior art, the embodiment can improve FER performance and accelerate convergence rate by converting the specific bit initialized by the R layer on the basis of SMS and adding the RMS algorithm obtained by CRC in the final decision, thereby improving decoding performance.
Specific examples thereof include: in this embodiment, the EBPL algorithm obtained by combining the RMS decoding and the BPL decoding can maintain the original parallel throughput at the cost of reasonably increasing the hardware complexity, and obtain performance similar to that of the L-scale SCL decoding on the polar code decoding. Meanwhile, the improvement effect of EBPL decoding on FER is better than BER, which shows the excellent stability of the EBPL decoding algorithm provided by the invention.
The steps of a method or algorithm described in connection with the disclosure herein may be embodied in hardware or in software instructions executed by a processor. The software instructions may be comprised of corresponding software modules that may be stored in Random Access Memory (RAM), flash Memory, Read Only Memory (ROM), Erasable Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), registers, a hard disk, a removable disk, a compact disc read only Memory (CD-ROM), or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. Of course, the storage medium may also be integral to the processor. The processor and the storage medium may reside in an ASIC. Additionally, the ASIC may reside in a core network interface device. Of course, the processor and the storage medium may reside as discrete components in a core network interface device.
Those skilled in the art will recognize that in one or more of the examples described above, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. When implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer.
The above-mentioned embodiments, objects, technical solutions and advantages of the present application are further described in detail, it should be understood that the above-mentioned embodiments are only examples of the present application, and are not intended to limit the scope of the present application, and any modifications, equivalent substitutions, improvements and the like made on the basis of the technical solutions of the present application should be included in the scope of the present application.

Claims (10)

1. A BPL decoding method based on polarization codes is characterized by comprising the following steps:
after the information to be decoded is input into a decoder, updating the information bit value of the R layer;
importing information to be decoded into a pre-constructed decoding path to obtain first decoding information;
and performing Cyclic Redundancy Check (CRC) on the first decoding information to obtain second decoding information and outputting the second decoding information by the decoder.
2. The method of claim 1, wherein the updating information bit values of the R layer comprises:
carrying out information updating on an information bit R (i,1) in the R layer according to the index of the position matrix after negation, wherein the index of the position matrix is the index of the matrix of the information bit set;
the changed information bit R (i,1) is updated to the current value of information bit L (i, 1).
3. The method of claim 1, wherein the pre-constructed decoding path comprises:
the information to be decoded enters a decoder with the factor graph of the initial state for decoding;
if the Code Word (Code Word) can be converged in the decoder, the stop criterion of BP decoding is met, the decoding is judged to be successful, and the Code Word is output as the first decoding information.
4. The method according to any one of claims 1-3, wherein updating the information bit value of the R layer after the information to be decoded is input to the decoder comprises:
step 1, acquiring a sequence of likelihood ratio soft information of a coded signal according to the information to be decoded, and starting decoding;
step 2, respectively initializing values of an information bit R and an information bit L at two ends of a factor graph according to the prior information of the code words and the sequence of the likelihood ratio soft information;
step 3, executing a BP decoding algorithm once;
step 4, performing early stop check and CRC check based on a G matrix, and if the results of the early stop check and the CRC check are both check coincidence, determining that the decoding is successful, wherein the G matrix is a generation matrix of a polarization code; if not, entering the step 5;
step 5, replacing R (i,1) of the current information bit with the value of L (i, 1);
steps 1-4 are performed again.
5. The method of claim 1, wherein the pre-constructed decoding path comprises:
simultaneously entering information to be decoded into at least 2 decoders for parallel decoding, and obtaining code words output by each decoder, wherein each decoder is provided with a factor graph;
and leading the code words output by each decoder into a Euclidean distance decision device, and reserving one code word as the first decoding information output.
6. A polar code based BPL decoding device, comprising:
the preprocessing module is used for updating the information bit value of the R layer after the information to be decoded is input into the decoder;
the decoding module is used for leading information to be decoded into a pre-constructed decoding path to obtain first decoding information;
and the checking module is used for performing Cyclic Redundancy Check (CRC) on the first decoding information to obtain second decoding information and outputting the second decoding information by the decoder.
7. The apparatus according to claim 6, wherein the preprocessing module is specifically configured to perform information update on an information bit R (i,1) in an R layer according to an inverted index of a position matrix, where the index of the position matrix is an index of a matrix of an information bit set; the changed information bit R (i,1) is updated to the current value of information bit L (i, 1).
8. The apparatus according to claim 6, wherein the decoding module is specifically configured to perform decoding by a decoder that enters information to be decoded into a factor graph having the initial state; if the Code Word (Code Word) can be converged in the decoder, the stop criterion of BP decoding is met, the decoding is judged to be successful, and the Code Word is output as the first decoding information.
9. The apparatus according to any of claims 6 to 8, wherein the preprocessing module is specifically configured to, in step 1, obtain a sequence of likelihood ratio soft information of an encoded signal according to the information to be decoded, and start decoding;
step 2, respectively initializing values of an information bit R and an information bit L at two ends of a factor graph according to the prior information of the code words and the sequence of the likelihood ratio soft information;
step 3, executing a BP decoding algorithm once;
step 4, performing early stop check and CRC check based on a G matrix, and if the results of the early stop check and the CRC check are both check coincidence, determining that the decoding is successful, wherein the G matrix is a generation matrix of a polarization code; if not, entering the step 5;
step 5, replacing R (i,1) of the current information bit with the value of L (i, 1);
steps 1-4 are performed again.
10. The apparatus of claim 6, wherein the decoding module is further configured to enter at least 2 decoders simultaneously for decoding, and obtain codewords output by the decoders, wherein each decoder has a factor graph;
and leading the code words output by each decoder into a Euclidean distance decision device, and reserving one code word as the first decoding information output.
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