CN110581149A - soft X-ray imaging detector and system adopting floating gate structure - Google Patents
soft X-ray imaging detector and system adopting floating gate structure Download PDFInfo
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Abstract
The invention mainly relates to the field of semiconductor photoelectric detectors, in order to realize full-pixel simultaneous detection, directly obtain digital information and realize the direct processing and storage of original data so as to improve the radiographic imaging quality, the invention adopts a soft X-ray imaging detector with a floating gate structure, and the structure is as follows: the floating gate is used for storing photo-generated charges, the thickness of the control gate is g, the thickness of the floating gate is f, and the thickness of an oxide layer between the floating gate and the control gate is d2 so as to prevent electron tunneling; the thickness of an oxide layer between the floating gate and the substrate is d1, and the oxide layer is thin enough to realize electron tunneling; the substrate is a lightly doped p-type substrate, and the thickness of the substrate is s; the floating gate and the grid are made of polysilicon materials and are in a depletion state under the action of grid voltage for collecting electrons; the source electrode is grounded, when the grid voltage is higher than the threshold voltage, the channel is conducted, the high level signal is in short circuit with the ground, and the low level signal is output to the inverter. The invention is mainly applied to the design and manufacture of the semiconductor photoelectric detector.
Description
Technical Field
the invention mainly relates to the field of semiconductor photoelectric detectors, in particular to a soft X-ray imaging and reading device and method adopting a floating gate structure.
background
for soft X-ray imaging detectors, the current imaging modes are mainly divided into analog imaging and digital imaging, but the readout signals are mainly analog signals. Analog imaging mainly relies on a fluorescent screen to directly realize ray imaging by using an analog signal, which is also called a traditional imaging mode, and the greatest advantage of the mode is that the continuity of a received signal is better. With the continuous development of integrated circuits, semiconductor technology and computer technology, the digital imaging mode gradually replaces the original analog imaging mode, and the corresponding detectors are used for converting received ray analog signals into digital signals through analog-to-digital converters and then processing the digital signals through a processor.
Current digital imaging detectors can also be largely classified into two types, image sensor-based detectors and TFT array-based flat panel detectors, and both are classified into two detection modes, direct detection and indirect detection. The image sensor detector can also be mainly divided into two detection structures based on CMOS and CCD, and the photoelectric conversion of the soft X-ray is realized through a fluorescent screen coupled on the surface. However, the signal transmission processing methods of all the existing digital radiation detectors are similar and are analog readout: firstly, the obtained detection signals are all analog signals, and then the detected analog signals are subjected to the processes of signal amplification and analog-to-digital conversion through corresponding amplification circuits and analog-to-digital conversion circuits, and are converted into digital signals and then processed and stored, so that the signals are often interfered by noise in the transmission and processing processes, and the quality of images is correspondingly influenced.
The direct detection structure based on the floating gate structure provided by the scheme has the corresponding electronic storage, reading, erasing and other modes similar to the principle of a Flash memory. At present, the Flash memory mainly injects and erases electrons in the floating gate through electron tunneling and hot electron emission. And compared with the block erasing of Flash, the block erasing of Flash has higher erasing speed by applying reverse bias to all control grids simultaneously and erasing the electrons in all floating gates. And this approach also has a higher number of reads and writes. Through the mode, the photo-generated charges obtained by the detector reach the substrate oxide layer interface through the electric field acceleration, and can be stored in the floating gate after tunneling, so that the charge information in the floating gate can be obtained by judging the change amount of the threshold voltage, and the original photo-generated charge amount can be obtained through later-stage calculation according to a certain tunneling probability.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention aims to provide a ray imaging digital reading mode based on a floating gate structure. The storage, reading and clearing of photo-generated charges are realized by changing the grid voltage of the control grid. The detection unit and the data unit are separated in the mode, full-pixel simultaneous detection is achieved, digital information can be directly obtained, direct processing and storage of original data are achieved, and ray imaging quality is improved. Therefore, the technical scheme adopted by the invention is that the soft X-ray imaging detector adopting the floating gate structure has the following structure: the floating gate is used for storing photo-generated charges, the thickness of the control gate is g, the thickness of the floating gate is f, and the thickness of an oxide layer between the floating gate and the control gate is d2 so as to prevent electron tunneling; the thickness of an oxide layer between the floating gate and the substrate is d1, and the oxide layer is thin enough to realize electron tunneling; the substrate is a lightly doped p-type substrate, and the thickness of the substrate is s; the floating gate and the grid are made of polysilicon materials and are in a depletion state under the action of grid voltage for collecting electrons; the source electrode is grounded, when the grid voltage is higher than the threshold voltage, the channel is conducted, the high level signal is in short circuit with the ground, and the low level signal is output to the inverter.
The system is provided with a control unit, corresponding address data is input into an address register in the control unit to control and conduct corresponding row-column pixel units, row-column gating is achieved, wherein the number of rows of the pixel array is n, the number of columns of the pixel array is m, and imaging is achieved through the processes of detecting, reading and clearing the data of the detector.
The imaging is realized by the following specific processes:
firstly, a detection process:
1) During the detection period, the pulse voltage source and the multi-way switch are conducted through the control unit, and the pulse source generates forward pulse voltage to be applied to the grids of all the rows, so that all the pixel substrates are in a deep depletion state;
2) Meanwhile, a receiving window is opened, rays irradiate into the detector to generate photoelectric conversion, partial electrons tunnel to the floating gate under a strong electric field, and charge collection is completed at the moment;
II, reading process:
1) the processor gives an instruction to the control unit, readjusts the grid voltage unit, inputs a clock signal to the source counter, starts the source counter to count, converts a digital quantity of the counter into an analog quantity by the digital-to-analog converter (DAC), generates an incremental voltage, wherein an initial voltage is a threshold voltage when no stored electrons exist in a floating grid, and is applied to all control grids of the detection unit by conducting corresponding multi-way switches;
2) When the jth column pixel unit of the ith row is conducted, i is 1,2,3 … n, j is 1,2,3 … m, the high level signal input to the inverter at the jth column is changed into low level, the latch of the high level latch is triggered after the high level signal is output, the current numerical value of the counter is latched, the read threshold value of the timing control counter in the control unit is set, the control grid voltage under the numerical value of the counter is defaulted to reach the maximum preset threshold value, all the pixel units of the ith row are conducted and are continuously cleared until the control grid voltage reaches zero, all the corresponding latches have latched the numerical values, the reading signal is started to be output when the threshold value is reached, the read enabling signal is conducted through the tristate AND gate of the 1 st column through the column selection control unit, the latch data are output, and other column data are sequentially output in sequence;
3) After the last column data of the ith row is completely output, resetting the source counter by the control unit, conducting the (i + 1) th row through the row selection control unit, and repeating the reading in the previous step;
4) when the data reading of the last row is finished, the reading of image information of one frame is finished, and then the control unit generates a reset signal to prepare for the detection of the next frame;
Thirdly, a clearing process:
And sending an instruction by the processor to enable the control unit to control the conduction of the reverse gate voltage, generating reverse voltage for all pixels for a duration t, transmitting the charges in the floating gate to a channel to finish clearing, outputting the threshold voltage of an original device to detect whether all pixels clear the charges in the floating gate, and preparing for next detection after clearing, otherwise, repeating the clearing process.
the invention has the characteristics and beneficial effects that:
1 the detector structure separates the detection unit from the data unit, can realize the simultaneous imaging of all pixels and reduces the detection time.
2 the detection mode can directly obtain the detected digital signal data and directly process the original data, and the detection information can be rapidly stored in the pixel for a long time, thereby improving the imaging quality.
description of the drawings:
FIG. 1 is a block diagram of a pixel unit of a detector
FIG. 2 is a block diagram of a detector system
FIG. 3 is a single column read out view of the detector
FIG. 4 detector pixel readout timing diagram
Detailed Description
The invention mainly relates to the field of semiconductor photoelectric detectors, and aims to design a new detector structure for realizing a digital reading mode of soft X-ray, ultraviolet and other ray imaging, separate a detection unit from a data unit, and directly process and store corresponding signal data which are digital signals. The method solves the problem that the analog signal is easily interfered by noise in the signal transmission process.
the present detector structure is similar to the floating gate structure of a memory, where the floating gate is used to store photo-generated charge. The thickness of the control gate is g, the thickness of the floating gate is f, and the thickness of an oxide layer between the floating gate and the control gate is d2 to prevent electron tunneling. The oxide layer between the floating gate and the substrate has a thickness d1 and is thin enough to allow electron tunneling. The substrate is a lightly doped p-type substrate, and the thickness of the substrate is s. The floating gate and the grid are made of polysilicon materials, and are in a depletion state under the action of grid voltage for collecting electrons. The source electrode is grounded, when the grid voltage is higher than the threshold voltage, the channel is conducted, the high level signal is in short circuit with the ground, and the low level signal is output to the inverter. The row and column control unit in the system structure inputs corresponding address data through an address register in the control unit to control and conduct the corresponding row and column transistor M, and row and column gating is achieved. The number of rows of the pixel array is n, and the number of columns is m. The imaging is mainly realized by the main processes of detection, reading, clearing and the like.
Fourthly, detection process:
the detector detection mode provided by the scheme is a back-illuminated detection mode, and the corresponding grid electrode and the source drain channel are arranged on the corresponding front surface.
3) During the detection period, the pulse voltage source and the multi-way switch are conducted through the control unit, the pulse source generates a forward pulse voltage to be applied to the grid electrodes of all the rows, and all the pixel substrates are in a deep depletion state.
4) Meanwhile, a receiving window is opened, rays irradiate into the detector to generate photoelectric conversion, partial electrons tunnel to the floating gate under a strong electric field, and at the moment, charge collection is completed.
fifthly, reading process:
1. The processor gives an instruction to the control unit, readjusts the grid voltage unit, inputs a clock signal to the source counter, and starts the counter to start counting. The DAC converts the digital value of the counter into an analog value, generates an incremental voltage (where the initial voltage is the threshold voltage of the floating gate without stored electrons), and applies the incremental voltage to all control gates of the detection cells by turning on the corresponding multi-way switches.
2. when the detection pixel at the j (j) th column of the ith (i is 1,2,3 … n) row is turned on, the high level signal input to the inverter at the j th column changes to low level, and after the high level signal is output, the latch latched by the high level is triggered, so that the current value of the counter is latched. The method comprises the steps of setting a reading threshold value of a timing control counter in a control unit (the control grid voltage under the value of the counter is defaulted to reach the maximum preset threshold value, all pixels of the ith row are conducted and are continuously cleared all the time, all the values are latched by corresponding latches), outputting a reading signal when the threshold value is reached, enabling a reading enabling signal to conduct a tristate AND gate of the 1 st column through a column selection control unit, outputting latched data, and sequentially outputting other column data.
3. after the last column data of the ith row is completely output, the control unit resets the source counter, conducts the (i + 1) th row through the row selection control unit and repeats the reading in the previous step.
4. when the data readout of the last line is completed, the readout of the image information of one frame is completed, and then the control unit generates a reset signal in preparation for the next frame detection.
sixthly, a clearing process:
And sending an instruction by the processor to enable the control unit to control the conduction of the reverse gate voltage, generating reverse voltage for all pixels for a duration t, transmitting the charges in the floating gate to a channel to finish clearing, outputting the threshold voltage of an original device to detect whether all pixels clear the charges in the floating gate, and preparing for next detection after clearing, otherwise, repeating the clearing process.
The detector structure based on the floating gate memory provided by the invention is mainly used for realizing ray detection with higher performance, and mainly aims to improve the tunneling probability and accelerate the reading speed. The number of pixels is set to be 1024 x 1024, the thickness of the substrate is 450um, the thickness of the oxide layer between the floating gate and the substrate is 12nm, the gate voltage in the detection process is 30V, and the pulse width is 10 ms. The wiping process applies a grid voltage of 20-25V for 100 ms. Except that the proper doping concentration is required to be selected, and the heterogeneous doping region with a certain shape can be formed by carrying out heterogeneous injection at the corresponding position, so that the tunneling electric field is enhanced, and the electron tunneling probability is improved. And the thinner the oxide layer thickness between the floating gate and the substrate is, the lower the tunneling barrier height is, the narrower the forbidden band width is, and the higher the tunneling probability is. And the corresponding detector size will also vary for different kinds of radiation: soft X-rays are more penetrating and require a thicker substrate to absorb; and the shorter absorption distance of ultraviolet rays relative to other rays, the smaller the required detector size can be. And, can be through heavily doping certain thickness's n type impurity at the substrate bottom, make the substrate in full depletion state to promote detection efficiency through applying certain bias voltage to it.
Claims (3)
1. a soft X-ray imaging detector adopting a floating gate structure is characterized by comprising the following structures: the floating gate is used for storing photo-generated charges, the thickness of the control gate is g, the thickness of the floating gate is f, and the thickness of an oxide layer between the floating gate and the control gate is d2 so as to prevent electron tunneling; the thickness of an oxide layer between the floating gate and the substrate is d1, and the oxide layer is thin enough to realize electron tunneling; the substrate is a lightly doped p-type substrate, and the thickness of the substrate is s; the floating gate and the grid are made of polysilicon materials and are in a depletion state under the action of grid voltage for collecting electrons; the source electrode is grounded, when the grid voltage is higher than the threshold voltage, the channel is conducted, the high level signal is in short circuit with the ground, and the low level signal is output to the inverter.
2. The soft X-ray imaging detector with floating gate structure as claimed in claim 1, wherein the soft X-ray imaging system with floating gate structure is realized by means of the soft X-ray imaging detector, each detector constitutes a pixel unit of a pixel array, the system is provided with a control unit, and row and column gating is realized by inputting corresponding address data into an address register in the control unit to control the conduction of corresponding row and column pixel units, wherein the row number of the pixel array is n, the column number is m, and the realization of imaging is divided into the detector detecting, reading and the detector data clearing processes.
3. the soft X-ray imaging detector with floating gate structure as claimed in claim 1, wherein the imaging is realized by the following specific process:
Firstly, a detection process:
1) during the detection period, the pulse voltage source and the multi-way switch are conducted through the control unit, and the pulse source generates forward pulse voltage to be applied to the grids of all the rows, so that all the pixel substrates are in a deep depletion state;
2) Meanwhile, a receiving window is opened, rays irradiate into the detector to generate photoelectric conversion, partial electrons tunnel to the floating gate under a strong electric field, and charge collection is completed at the moment;
II, reading process:
1) The processor gives an instruction to the control unit, readjusts the grid voltage unit, inputs a clock signal to the source counter, starts the source counter to count, converts a digital quantity of the counter into an analog quantity by the digital-to-analog converter (DAC), generates an incremental voltage, wherein an initial voltage is a threshold voltage when no stored electrons exist in a floating grid, and is applied to all control grids of the detection unit by conducting corresponding multi-way switches;
2) When the jth column pixel unit of the ith row is conducted, i is 1,2,3 … n, j is 1,2,3 … m, the high level signal input to the inverter at the jth column is changed into low level, the latch of the high level latch is triggered after the high level signal is output, the current numerical value of the counter is latched, the read threshold value of the timing control counter in the control unit is set, the control grid voltage under the numerical value of the counter is defaulted to reach the maximum preset threshold value, all the pixel units of the ith row are conducted and are continuously cleared until the control grid voltage reaches zero, all the corresponding latches have latched the numerical values, the reading signal is started to be output when the threshold value is reached, the read enabling signal is conducted through the tristate AND gate of the 1 st column through the column selection control unit, the latch data are output, and other column data are sequentially output in sequence;
3) after the last column data of the ith row is completely output, resetting the source counter by the control unit, conducting the (i + 1) th row through the row selection control unit, and repeating the reading in the previous step;
4) When the data reading of the last row is finished, the reading of image information of one frame is finished, and then the control unit generates a reset signal to prepare for the detection of the next frame;
Thirdly, a clearing process:
and sending an instruction by the processor to enable the control unit to control the conduction of the reverse gate voltage, generating reverse voltage for all pixels for a duration t, transmitting the charges in the floating gate to a channel to finish clearing, outputting the threshold voltage of an original device to detect whether all pixels clear the charges in the floating gate, and preparing for next detection after clearing, otherwise, repeating the clearing process.
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CN112987075A (en) * | 2021-02-09 | 2021-06-18 | 天津大学 | Delay line position sensitive detector system and method |
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Patent Citations (5)
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US4788581A (en) * | 1984-04-10 | 1988-11-29 | Hahn-Meitner-Institut Berlin Gmbh | MOS dosimeter |
US20060023094A1 (en) * | 2004-08-02 | 2006-02-02 | Fuji Photo Film Co., Ltd. | Color light receiving device and image pickup device |
CN103188451A (en) * | 2011-12-29 | 2013-07-03 | 上海中科高等研究院 | CMOS imaging sensor pixel circuit |
CN103149225A (en) * | 2013-01-28 | 2013-06-12 | 中国科学院高能物理研究所 | Novel dual-energy X-ray imaging detector |
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