CN110570816B - Pixel circuit and driving method thereof - Google Patents
Pixel circuit and driving method thereof Download PDFInfo
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- CN110570816B CN110570816B CN201910858437.1A CN201910858437A CN110570816B CN 110570816 B CN110570816 B CN 110570816B CN 201910858437 A CN201910858437 A CN 201910858437A CN 110570816 B CN110570816 B CN 110570816B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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Abstract
The invention discloses a pixel circuit and a driving method thereof, which are used for solving the problems of complicated structure and larger frame of a display panel caused by the fact that a GOA circuit corresponding to each sub-pixel circuit needs two output ends in the related technology. The pixel circuit includes: a plurality of sequentially connected sub-pixel circuits, comprising, for any one of the plurality of sub-pixel circuits: the device comprises a data writing unit, a detection control unit, a driving control unit, an energy storage unit and a light-emitting device, wherein the detection control unit comprises a first control end and a second control end; for the Nth sub-pixel circuit in the plurality of sub-pixel circuits, the second control end of the detection control unit is connected with the first control end of the detection control unit of the (N-2) th sub-pixel circuit and the scanning signal end of the (N-1) th sub-pixel circuit. When the pixel circuit of the invention is applied to a display panel, the size of the frame of the display panel can be reduced.
Description
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to a pixel circuit and a driving method thereof.
Background
In a display panel, especially in an OLED (Organic Light-Emitting Diode) display panel, a GOA (Gate Driver on Array) circuit is an effective means for reducing the defects of the display panel and reducing the cost. At present, each pixel of the OLED needs two grid lines, so that an OLED GOA circuit corresponding to a pixel circuit needs two output ends, the structure of the display panel is very complex, and the frame is large.
Disclosure of Invention
In view of the above, an objective of the present invention is to provide a pixel circuit and a driving method thereof, so as to solve the problems of a complex structure and a large frame of a display panel in the related art due to the requirement of two output ends for a GOA circuit corresponding to the pixel circuit.
According to a first aspect of the present invention, there is provided a pixel circuit comprising: a plurality of sequentially connected sub-pixel circuits, comprising, for any one of the plurality of sub-pixel circuits: the device comprises a data writing unit, a detection control unit, a driving control unit, an energy storage unit and a light-emitting device, wherein the detection control unit comprises a first control end and a second control end; for the Nth sub-pixel circuit in the sub-pixel circuits, the second control end of the detection control unit is connected with the first control end of the detection control unit of the (N-2) th sub-pixel circuit and the scanning signal end of the (N-1) th sub-pixel circuit.
Optionally, for any one of the sub-pixel circuits, an input terminal of the data writing unit is connected to a data signal terminal of the pixel circuit, and an output terminal of the data writing unit is connected to a first node in the sub-pixel circuit, where the data writing unit is configured to provide a data signal of the data signal terminal to the first node under the control of a scan signal terminal; the input end of the driving control unit is connected with a first voltage signal end of the pixel circuit, the control end of the driving control unit is connected with the first node, the output end of the driving control unit is connected with a second node in the sub-pixel circuit, the second node is connected with the input end of the light-emitting device, and the driving control unit is used for driving the light-emitting device to emit light under the control of the potential between the first node and the second node and the energy storage unit; the first end of the energy storage unit is connected with the first node, the second end of the energy storage unit is connected with the second node, and the energy storage unit is used for keeping the voltage difference between the first node and the second node stable; the input end of the detection control unit is connected with the second node, the output end of the detection control unit is connected with the sensing signal line and the reference signal end of the pixel circuit, and the detection control unit is used for providing the voltage of the second node for the sensing signal line and providing the reference signal of the reference signal end for the second node.
Optionally, for any one of the sub-pixel circuits, the detection control unit includes a first switching device and a second switching device, the first switching device includes a first pole, a second pole, and a control pole, the second switching device includes a first pole, a second pole, and a control pole, the control pole of the first switching device is the first control end of the detection control unit, the control pole of the second switching device is the second control end of the detection control unit, the first pole of the first switching device is connected to the first pole of the second switching device, and the second pole of the second switching device is connected to the second pole of the second switching device.
Optionally, the pixel circuit further comprises: a driving circuit including a plurality of output terminals configured to be connected to the scan signal terminals of the respective sub-pixel circuits, respectively.
Optionally, the end of the sensing signal line is connected to an analog-to-digital converter ADC.
According to a second aspect of the present invention, there is provided a pixel circuit driving method for driving any one of the pixel circuits according to the first aspect of the present invention, the method comprising: for the Nth sub-pixel circuit in the plurality of sub-pixel circuits, in the light-emitting stage and the compensation stage, the second control end of the detection control unit of the Nth sub-pixel circuit is controlled by the scanning signal end of the (N-1) th sub-pixel circuit, and the first control end of the detection control unit of the Nth sub-pixel circuit is controlled by the scanning signal end of the (N + 1) th sub-pixel circuit.
Optionally, for an nth sub-pixel circuit of the plurality of sub-pixel circuits, in a light emitting phase thereof, writing a data signal to a first node in the nth sub-pixel circuit and writing a reference signal to a second node in the nth sub-pixel circuit; and controlling the second control end of the detection control unit of the Nth sub-pixel circuit to be disconnected through the scanning signal end of the (N-1) th sub-pixel circuit, controlling the data writing unit of the Nth sub-pixel circuit to be disconnected through the scanning signal end of the Nth sub-pixel circuit, and keeping the first control end of the detection control unit of the Nth sub-pixel circuit to be started so as to keep the potential between the first node and the second node unchanged.
Optionally, the writing a data signal to the first node and writing a reference signal to the second node includes: a first control signal is input to the second control terminal of the detection control unit of the nth sub-pixel circuit through the scan signal terminal of the N-1 th sub-pixel circuit, a second control signal is input to the control terminal of the data writing unit of the nth sub-pixel circuit through the scan signal terminal of the nth sub-pixel circuit, a third control signal is input to the first control terminal of the detection control unit of the nth sub-pixel circuit through the scan signal terminal of the N +1 th sub-pixel circuit to provide the data signal to the first node, and the reference signal is provided to the second node.
Optionally, for any nth sub-pixel circuit of the plurality of sub-pixel circuits, the method further comprises: after the potential between the first node and the second node is kept unchanged, the detection control unit of the nth sub-pixel circuit is controlled to be turned off through the scanning signal end of the (N + 1) th sub-pixel circuit, so that the driving control unit drives the light-emitting device to emit light based on the potential between the first node and the second node and the electric energy stored in the energy storage unit.
Optionally, for any one of the plurality of sub-pixel circuits, the data writing unit includes a third switching device, and the driving control unit includes a fourth switching device, the method further includes: for an nth sub-pixel circuit of the plurality of sub-pixel circuits, the nth sub-pixel circuit is in a compensation phase; when writing a signal, controlling the data writing unit to write the data signal into the first node through the scanning signal end of the Nth sub-pixel circuit, and controlling the second control end of the detection control unit to be opened through the scanning signal end of the (N-1) th sub-pixel circuit so as to write the reference signal into the second node; during charging, the data writing unit is controlled to be closed through the scanning signal end of the Nth sub-pixel circuit, the second control end of the detection control unit is kept to be opened, the driving control unit is controlled to be opened through the first voltage signal end, and therefore the energy storage unit is charged through the second node in the Nth sub-pixel circuit; during sampling, after the electric potential of the induction signal line is stabilized, detecting the electric potential of a second node in the Nth sub-pixel circuit at the end of the induction signal line; when the signal is written back, the data writing unit is controlled by the scanning signal end of the Nth sub-pixel circuit to write the data signal into the first node in the Nth sub-pixel circuit, and the second control end of the detection control unit is controlled to be started by the scanning signal end of the N-1 th sub-pixel circuit so as to write the reference signal into the second node in the Nth sub-pixel circuit.
Optionally, the method further comprises: for the N-1 th sub-pixel circuit in the plurality of sub-pixel circuits, when the N-1 th sub-pixel circuit performs signal write-back, the data writing unit of the N-1 th sub-pixel circuit is controlled to write a data signal into the first node of the N-1 th sub-pixel circuit, and the detection control unit of the N-1 th sub-pixel circuit is controlled to write a reference signal into the second node of the N-1 th sub-pixel circuit.
As can be seen from the foregoing, in the pixel circuit provided by the present invention, the plurality of scanning signal terminals are shared, so that the GOA circuit for driving the pixel circuit correspondingly reduces the CLK output terminal, thereby reducing the size of the GOA circuit, and in the case of applying the pixel circuit to a display panel, the size of the frame of the display panel can be reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings of the embodiments will be briefly described below, and it is apparent that the drawings in the following description only relate to some embodiments of the present invention and are not limiting on the present invention.
FIG. 1 is a schematic diagram of a pixel circuit according to an embodiment of the present invention;
fig. 2 is a timing chart of control signals of terminals when the sub-pixel circuit in the pixel circuit shown in fig. 1 operates in a light-emitting phase;
FIG. 3 is a timing diagram of control signals at each terminal when the sub-pixel circuit in the pixel circuit shown in FIG. 1 is operating in a compensation phase;
FIG. 4 is a schematic diagram of a GOA unit circuit corresponding to the pixel circuit shown in FIG. 1;
FIG. 5 is a schematic diagram of a pixel circuit shown in accordance with an exemplary embodiment;
FIG. 6 is a schematic diagram of a GOA unit cell circuit corresponding to the pixel circuit shown in FIG. 5;
fig. 7 is a timing chart of control signals of terminals when the sub-pixel circuit in the pixel circuit shown in fig. 5 operates in a light-emitting phase;
fig. 8 is a timing chart of control signals of respective terminals when the sub-pixel circuit in the pixel circuit shown in fig. 5 operates in the compensation phase.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention without any inventive step, are within the scope of protection of the invention.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a," "an," or "the" and similar referents do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
Fig. 1 is a schematic diagram of a 3T1C pixel circuit provided according to an embodiment of the invention. As shown in fig. 1, the gates of T1 and T2 of each pixel circuit are controlled by a single gate line, and the operation of the circuit can be divided into a light-emitting stage and a compensation stage, and the operation is as follows:
fig. 2 is a timing chart of control signals of respective terminals when the pixel circuit shown in fig. 1 operates in a light-emitting phase including two processes of writing a data signal (Write data) and emitting light (Emission) as shown in fig. 2.
Write data signal: the signal scan terminals G1 and G2 are simultaneously high, the transistors T1 and T2 are turned on, and the data voltage and the reference (VREF) voltage are written into the first node G and the second node S, respectively.
Luminescence: the signal scanning terminals G1 and G2 are at low voltage, the transistors T1 and T2 are turned off, the transistor T3 is turned on, and since the voltage rises when the S node charges for the storage capacitor, the voltage at the G node also rises by bootstrap, and the OLED emits light.
Fig. 3 is a timing diagram of control signals of terminals when the pixel circuit shown in fig. 1 operates in a compensation phase, which includes writing data signals, charging, sampling, and write-back processes, as shown in fig. 3. Write data signal: the signal scanning terminals G1 and G2 are simultaneously at high potential, the transistors T1 and T2 are turned on, and the data voltage signal and the reference voltage are written respectively;
charging (Charging): transistor T1 turns off, T2 turns on, T3 turns on, and the S node begins to charge, at which time the sense signal line drifts (SENSE LINE Floating).
Sampling: (Sampling) after the sensing signal line has remained substantially constant in potential for a period of time, the S node potential is measured by an ADC (Analog-to-Digital Converter).
Writing back: the (Write back) signal scan lines G1 and G2 are high at the same time, and the transistors T1 and T2 are turned on to Write the data voltage and the reference voltage, respectively.
Fig. 4 is a schematic diagram of the GOA unit circuit corresponding to fig. 1, and as shown in fig. 4, two outputs CLKE and CLKF are required for the output terminal of the GOA unit circuit, where CLK represents a clock signal, and CLKE and CLKF represent two different clock signal output terminals, respectively, which results in a larger frame of the display panel due to the larger size of the output tube.
Fig. 5 is a schematic diagram illustrating a 4T1C pixel circuit according to an exemplary embodiment, as shown in fig. 5, including:
a plurality of sequentially connected sub-pixel circuits, comprising, for any one of the plurality of sub-pixel circuits: the device comprises a data writing unit, a detection control unit, a driving control unit, an energy storage unit and a light-emitting device, wherein the detection control unit comprises a first control end and a second control end;
for the Nth sub-pixel circuit in the plurality of sub-pixel circuits, the second control end of the detection control unit is connected with the first control end of the detection control unit of the (N-2) th sub-pixel circuit and the scanning signal end of the (N-1) th sub-pixel circuit, wherein N is a natural number.
It should be noted that, in fig. 5, only four sequentially connected sub-pixel circuits are taken as an example to describe the pixel circuit of the present invention, but the pixel circuit of the embodiment of the present invention may include a pixel array formed by a plurality of sub-pixel circuits arranged in a vertical and horizontal manner and connected, where the four sequentially connected sub-pixel circuits shown in fig. 5 may be four sub-pixel circuits located in the same column in the pixel array, and in addition, each unit is marked in only the first sub-pixel circuit, and the structure of the remaining sub-circuits is consistent with that of the sub-pixel circuit, so the marking is not repeated.
In the pixel circuit of the embodiment of the invention, the plurality of scanning signal terminals are shared, so that the GOA circuit for driving the pixel circuit correspondingly reduces the CLK output terminal, thereby reducing the size of the GOA circuit, and reducing the size of a frame of a display panel under the condition that the pixel circuit is applied to the display panel.
In one implementation, and still taking the pixel circuit shown in fig. 5 as an example, for any one of the sub-pixel circuits, the input terminal of the DATA writing unit is connected to the DATA signal terminal (i.e., DATA terminal shown in fig. 5) of the pixel circuit, the output terminal is connected to the first node (i.e., G node shown in fig. 5) of the sub-pixel circuit, the DATA writing unit is configured to provide the DATA signal of the DATA signal terminal to the first node under the control of the scan signal terminal of the current sub-pixel circuit, and it should be noted that, the scan signal terminal of the sub-pixel circuit is a scan signal terminal connected to the control terminal of the data writing unit, for example, in fig. 5, the scanning signal terminal of the first sub-pixel circuit is G1, the scanning signal terminal of the second sub-pixel circuit is G2, the scanning signal terminal of the third sub-pixel circuit is G3, and the scanning signal terminal of the fourth sub-pixel circuit is G4. An input terminal of the driving control unit is connected to a first voltage signal terminal of the pixel circuit, in fig. 5, the first voltage signal terminal is exemplified by an ELVDD terminal, a control terminal is connected to a first node, an output terminal is connected to a second node (for example, an S node shown in fig. 5) in the sub-pixel circuit, the second node is connected to an input terminal of the light emitting device, in fig. 5, the light emitting device is exemplified by an OLED, the driving control unit is configured to drive the light emitting device to emit light under the control of a potential between the first node and the second node and an energy storage unit, in fig. 5, the energy storage unit is exemplified by a capacitor Cst, a first terminal of the energy storage unit is connected to the first node, a second terminal of the energy storage unit is connected to the second node, and the energy storage unit is configured to stabilize a voltage difference between the first node and the second node; the input terminal of the detection control unit is connected to the second node, the output terminal is connected to the sensing signal line of the pixel circuit and the reference signal terminal, and the detection control unit is configured to provide the voltage of the second node to the sensing signal line (e.g., the S/H terminal shown in fig. 5) and provide the reference signal of the reference signal terminal (e.g., the VREF terminal shown in fig. 5) to the second node.
In an implementation manner, for any one of the plurality of sub-pixel circuits, the detection control unit includes a first switch device and a second switch device, the first switch device includes a first pole, a second pole, and a control pole, the second switch device includes a first pole, a second pole, and a control pole, the control pole of the first switch device is a first control end of the detection control unit, the control pole of the second switch device is a second control end of the detection control unit, the first pole of the first switch device is connected to the first pole of the second switch device, and the second pole of the second switch device is connected to the second pole of the second switch device. For example, taking any one of the sub-pixel circuits in the pixel circuit shown in fig. 5 as an example, the detection control unit includes a transistor T2 (which is an example of the first switching device) and a transistor T4 (which is an example of the second switching device), the control terminal of T2 is the first control terminal of the detection control unit, the control terminal of T4 is the second control terminal of the detection control unit, the first pole of T2 is connected to the first pole of T4, and the second pole of T2 is connected to the second pole of T4. Because the detection control unit is provided with two control ends of a control electrode of T2 and a control electrode of T4, the two control ends can be controlled by utilizing scanning signal ends of other sub-pixel circuits in different time periods, so that the scanning signal control ends can be shared by different sub-pixel circuits, the number of the scanning signal ends in the pixel circuit can be reduced, and therefore, the embodiment of the invention changes the output of a plurality of grid electrodes of the GOA of the OLED into the output of only one grid electrode, and the frame of the OLED panel can be reduced on the basis of reducing the number of the grid electrodes of the GOA. For example, since the scanning signal terminals are shared among the sub-pixel circuits in the pixel circuit shown in fig. 5, the pixel circuit shown in fig. 5 has two scanning signal terminals reduced as compared with the pixel circuit shown in fig. 1 having the same number of sub-pixel circuits.
In one implementation, the pixel circuit may further include: and a driving circuit including a plurality of output terminals configured to be respectively connected to the scan signal terminals of the sub-pixel circuits. For example, fig. 6 shows a GOA circuit (an example of a driving circuit) corresponding to the pixel circuit shown in fig. 5, which reduces an output signal CLKF compared to the GOA circuit structure shown in fig. 4, so that a set of output tubes and pull-down tubes can be reduced accordingly, and when the pixel circuit is applied to a display panel, the size of the frame of the display panel can be greatly reduced.
In an implementation manner, still taking the pixel circuit shown in fig. 5 as an example for illustration, the end of the sensing signal line is connected to the analog-to-digital converter ADC, based on which, in the charging phase of the pixel circuit, the data signal is written into the data signal end to charge the sensing signal line, in the sampling phase, the ADC collects the voltage value on the sensing signal line, and can provide the voltage value to an external processor for calculation to obtain the actual data signal to be written, i.e., the compensated data signal, so as to compensate the threshold voltage and the mobility of the driving transistor (e.g., T3 shown in fig. 5).
An embodiment of the present invention further provides a pixel circuit driving method, where the method is used to drive any one of the above pixel circuits, and the method includes: for the Nth sub-pixel circuit in the plurality of sub-pixel circuits, in the light-emitting stage and the compensation stage, the second control terminal of the detection control unit of the Nth sub-pixel circuit is controlled by the scanning signal terminal of the (N-1) th sub-pixel circuit, and the first control terminal of the detection control unit of the Nth sub-pixel circuit is controlled by the scanning signal terminal of the (N + 1) th sub-pixel circuit.
In an implementation manner, the pixel circuit according to the embodiment of the present invention is a pixel array composed of a plurality of the above-mentioned sub-pixel circuits, and based on this, the pixel circuit driving method according to the embodiment of the present invention can be used for driving each row of sub-pixel circuits, so in the above-mentioned method, the control on the nth or N-1 th pixel circuit is correspondingly the control on the nth or N-1 th pixel circuit.
In one implementation, for an nth sub-pixel circuit among the plurality of sub-pixel circuits, in a light emitting stage thereof, writing a data signal to a first node in the nth sub-pixel circuit and writing a reference signal to a second node in the nth sub-pixel circuit;
and controlling the second control end of the detection control unit of the Nth sub-pixel circuit to be disconnected through the scanning signal end of the (N-1) th sub-pixel circuit, controlling the data writing unit of the Nth sub-pixel circuit to be disconnected through the scanning signal end of the Nth sub-pixel circuit, and keeping the first control end of the detection control unit of the Nth sub-pixel circuit to be started so as to keep the electric potential between the first node and the second node unchanged.
In one implementation, for any nth sub-pixel circuit of the plurality of sub-pixel circuits, the pixel circuit driving may further include: after the potential between the first node and the second node is kept unchanged, the scanning signal end of the (N + 1) th sub-pixel circuit controls the detection control unit of the Nth sub-pixel circuit to be turned off, so that the driving control unit drives the light-emitting device to emit light based on the potential between the first node and the second node and the electric energy stored in the energy storage unit.
The light emission phase during the operation of the pixel circuit according to an embodiment of the present invention is exemplarily described below. The light-emitting stage in the operation process of each sub-pixel circuit can comprise a write data, hold and light-emitting sub-stage. Taking the third sub-pixel circuit shown in fig. 5 as an example, the timing of the control signal at each terminal of the light-emitting stage during the operation of the sub-pixel circuit is shown in fig. 7. In the data writing sub-phase, the T4 is turned on first, so that the potential of the reference signal is written into the S node, then the scanning signal line G3 corresponding to the third word pixel circuit is high, so that the T1 is turned on, then the T2 is also turned on, and the data voltage and the reference voltage of the row are written into the G node and the S node in the third sub-pixel circuit respectively; in the holding sub-stage, T4 is turned off first, then T1 is turned off, the scanning signal line G4 corresponding to the fourth sub-pixel circuit is high, T2 is turned on continuously, and at this time, the potentials of the G node and the S node at the two ends of T3 are kept unchanged; in the light-emitting sub-phase, the scanning signal lines G3 and G4 are at low potential, T1, T2 and T4 are all turned off, and T3 is turned on, because the voltage of the storage capacitor rises when the S node is charged, the voltage of the G node also rises in a bootstrap mode, and the OLED emits light.
In one implementation, writing the data signal to the first node and writing the reference signal to the second node may include: the first control signal is input to the second control terminal of the detection control unit of the nth sub-pixel circuit through the scan signal terminal of the N-1 th sub-pixel circuit, the second control signal is input to the control terminal of the data writing unit of the nth sub-pixel circuit through the scan signal terminal of the nth sub-pixel circuit, the third control signal is input to the first control terminal of the detection control unit of the nth sub-pixel circuit through the scan signal terminal of the N +1 th sub-pixel circuit to provide the data signal to the first node, and the reference signal is provided to the second node. Still taking the third sub-pixel circuit in the pixel circuit shown in fig. 5 as an example, writing the first control signal to the gate of T4 of the third sub-pixel circuit through the scan signal terminal G2 of the second sub-pixel circuit, inputting the second control signal to the gate of T1 through the scan signal terminal G3 of the third sub-pixel circuit, inputting the third control signal to the gate of T2 through the scan signal terminal G4 of the fourth sub-pixel circuit, providing the data voltage signal to the G node, and providing the reference voltage signal to the S node.
In one implementation, for any one of the plurality of sub-pixel circuits, the data writing unit includes a third switching device, the driving control unit includes a fourth switching device, and the pixel circuit driving method may further include: for an Nth sub-pixel circuit in the plurality of sub-pixel circuits, the Nth sub-pixel circuit is in a compensation phase; when writing a signal, controlling a data writing unit of the sub-pixel circuit to write a data signal into a first node in the sub-pixel circuit through a scanning signal end of an Nth sub-pixel circuit, and controlling a second control end of a detection control unit of the Nth sub-pixel circuit to be started through a scanning signal end of an N-1 th sub-pixel circuit so as to write a reference signal into a second node in the Nth sub-pixel circuit; during charging, the scanning signal end of the Nth sub-pixel circuit controls the data writing unit of the sub-pixel circuit to be closed, the second control end of the detection control unit of the sub-pixel circuit is kept to be opened, the driving control unit of the Nth sub-pixel circuit is controlled to be opened through the first voltage signal end, and therefore the energy storage unit of the Nth sub-pixel circuit is charged through the second node in the Nth sub-pixel circuit; during sampling, after the electric potential of the induction signal line is stabilized, detecting the electric potential of a second node in the Nth sub-pixel circuit at the end of the induction signal line; when the signal is written back, the scanning signal end of the Nth sub-pixel circuit controls the data writing unit to write the data signal into the first node, and the scanning signal end of the N-1 th sub-pixel circuit controls the second control end of the detection control unit to be started so as to write the reference signal into the second node. In one example, the nth row of sub-pixel circuits in one pixel circuit is taken as an example for explanation, and when the nth row of sub-pixel circuits operates in the compensation phase, the method includes several sub-phases, and the timing of the control signal of each terminal of the sub-pixel circuit in each sub-phase is as shown in fig. 8.
Write data sub-phase: t1 and T4 in the subpixel circuits in the nth row are turned on, and the G node and the S node are written with a DATA voltage (which is an example of the DATA signal) and a VREF voltage (which is an example of the reference signal), respectively;
and (3) an electron charging stage: turning off T1 of the sub-pixel circuit in the Nth row, turning on T4 and T3, and charging the S node, wherein the sensing signal line drifts;
a sampling sub-stage: when the potential of the induction signal line is basically kept unchanged after a period of time, the potential of the S node is measured through the ADC;
signal write back sub-stage: at this time, T1 and T4 of the sub-pixel circuits in the nth row are simultaneously turned on, and the DATA voltage and the VREF voltage are written, respectively.
In one implementation, the pixel circuit driving method may further include: for the N-1 st sub-pixel circuit in the plurality of sub-pixel circuits in one pixel circuit, when the signal of the N sub-pixel circuit is written back, the data writing unit of the N-1 st sub-pixel circuit is controlled to write the data signal into the first node of the N-1 st sub-pixel circuit, and the detection control unit of the N-1 st sub-pixel circuit is controlled to write the reference signal into the second node of the N-1 st sub-pixel circuit. With the above example, when the N row sub-pixel circuit operates in the signal write-back sub-stage, T1 and T2 of the N-1 row sub-pixel circuit are also turned on to write the same DATA and VREF voltages, i.e., the N row sub-pixel circuit and the N-1 row sub-pixel circuit complete signal write-back simultaneously.
The transistors in the above embodiments are independently selected from one of a polysilicon thin film transistor, an amorphous silicon thin film transistor, an oxide thin film transistor, and an organic thin film transistor. The "control electrode" referred to in this embodiment may specifically refer to a gate or a base of a transistor, the "first electrode" may specifically refer to a source or an emitter of the transistor, and the corresponding "second electrode" may specifically refer to a drain or a collector of the transistor. Of course, those skilled in the art will appreciate that the "first pole" and "second pole" are interchangeable.
In addition, the transistor T1, the transistor T2, the transistor T3, and the transistor T4 in the above embodiments are all N-type transistors, which is a preferable solution that is convenient to implement in the present embodiment, and does not limit the technical solution of the present invention. It should be understood by those skilled in the art that the type (N-type or P-type) of each transistor and the polarities of the output voltages of each power source terminal and the control signal line are simply changed to implement the same on or off operation for each transistor as in the present embodiment, and all of them belong to the protection scope of the present application. The specific cases are not illustrated here.
The transistors used in all embodiments of the present invention may be thin film transistors or field effect transistors or other devices having the same characteristics. In the embodiment of the present invention, in order to distinguish two poles of the transistor except for the gate, one of the two poles is referred to as a source, and the other pole is referred to as a drain. Further, the transistors may be classified into N-type transistors or P-type transistors according to their characteristics. In the driving circuit provided by the embodiment of the present invention, all the transistors are illustrated as N-type transistors, and it is conceivable that those skilled in the art can easily conceive of the implementation of P-type transistors without creative efforts, and therefore, the present invention is also within the protection scope of the embodiment of the present invention.
In the embodiment of the invention, the first electrode is the source and the second electrode is the drain for the N-type transistor, and the first electrode is the drain and the second electrode is the source for the P-type transistor.
The technical scheme of the invention is explained in detail in the above with reference to the accompanying drawings, and it is considered that in the prior art, the source and drain electrodes and the active layer are in different layers, so that the thickness of the substrate is large, and the manufacturing process is complex. According to the technical scheme, the source electrode, the drain electrode, the data line and the active layer can be prepared in the same layer by doping the copper nitride, so that the thickness of the array substrate is reduced, and the manufacturing process of the array substrate is simplified.
In the present invention, the terms "first", "second", "third", and "fourth" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. The term "plurality" means two or more unless expressly limited otherwise.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Those of ordinary skill in the art will understand that: the invention is not to be considered as limited to the specific embodiments thereof, but is to be understood as being modified in all respects, all changes and equivalents that come within the spirit and scope of the invention.
Claims (11)
1. A pixel circuit, comprising:
a plurality of sequentially connected sub-pixel circuits, comprising, for any one of the plurality of sub-pixel circuits: the device comprises a data writing unit, a detection control unit, a driving control unit, an energy storage unit and a light-emitting device, wherein the detection control unit comprises a first control end and a second control end;
for the Nth sub-pixel circuit in the sub-pixel circuits, the second control end of the detection control unit is connected with the first control end of the detection control unit of the (N-2) th sub-pixel circuit and the scanning signal end of the (N-1) th sub-pixel circuit.
2. The pixel circuit according to claim 1, wherein for any one of the sub-pixel circuits, the input terminal of the data writing unit is connected to the data signal terminal of the pixel circuit, and the output terminal is connected to a first node in the sub-pixel circuit, the data writing unit is configured to supply the data signal of the data signal terminal to the first node under control of the scan signal terminal;
the input end of the driving control unit is connected with a first voltage signal end of the pixel circuit, the control end of the driving control unit is connected with the first node, the output end of the driving control unit is connected with a second node in the sub-pixel circuit, the second node is connected with the input end of the light-emitting device, and the driving control unit is used for driving the light-emitting device to emit light under the control of the potential between the first node and the second node and the energy storage unit;
the first end of the energy storage unit is connected with the first node, the second end of the energy storage unit is connected with the second node, and the energy storage unit is used for keeping the voltage difference between the first node and the second node stable;
the input end of the detection control unit is connected with the second node, the output end of the detection control unit is connected with the sensing signal line and the reference signal end of the pixel circuit, and the detection control unit is used for providing the voltage of the second node for the sensing signal line and providing the reference signal of the reference signal end for the second node.
3. The pixel circuit according to claim 1, wherein the detection control unit comprises a first switching device and a second switching device, the first switching device comprises a first pole, a second pole and a control pole, the second switching device comprises a first pole, a second pole and a control pole, the control pole of the first switching device is a first control terminal of the detection control unit, the control pole of the second switching device is a second control terminal of the detection control unit, the first pole of the first switching device is connected to the first pole of the second switching device, and the second pole of the second switching device is connected to the second pole of the second switching device.
4. The pixel circuit according to claim 1, further comprising:
a driving circuit including a plurality of output terminals configured to be connected to the scan signal terminals of the respective sub-pixel circuits, respectively.
5. The pixel circuit according to claim 2, wherein the end of the sensing signal line is connected to an analog-to-digital converter (ADC).
6. A pixel circuit driving method for driving the pixel circuit according to any one of claims 1 to 5, the method comprising:
for the Nth sub-pixel circuit in the plurality of sub-pixel circuits, in the light-emitting stage and the compensation stage, the second control end of the detection control unit of the Nth sub-pixel circuit is controlled by the scanning signal end of the (N-1) th sub-pixel circuit, and the first control end of the detection control unit of the Nth sub-pixel circuit is controlled by the scanning signal end of the (N + 1) th sub-pixel circuit.
7. The method of claim 6,
for an Nth sub-pixel circuit among the plurality of sub-pixel circuits, in a light emitting stage thereof, writing a data signal to a first node in the Nth sub-pixel circuit and writing a reference signal to a second node in the Nth sub-pixel circuit;
and controlling the second control end of the detection control unit of the Nth sub-pixel circuit to be disconnected through the scanning signal end of the (N-1) th sub-pixel circuit, controlling the data writing unit of the Nth sub-pixel circuit to be disconnected through the scanning signal end of the Nth sub-pixel circuit, and keeping the first control end of the detection control unit of the Nth sub-pixel circuit to be started so as to keep the potential between the first node and the second node unchanged.
8. The method of claim 7, wherein writing a data signal to the first node and writing a reference signal to the second node comprises:
a first control signal is input to the second control terminal of the detection control unit of the nth sub-pixel circuit through the scan signal terminal of the N-1 th sub-pixel circuit, a second control signal is input to the control terminal of the data writing unit of the nth sub-pixel circuit through the scan signal terminal of the nth sub-pixel circuit, a third control signal is input to the first control terminal of the detection control unit of the nth sub-pixel circuit through the scan signal terminal of the N +1 th sub-pixel circuit to provide the data signal to the first node, and the reference signal is provided to the second node.
9. The method of claim 7, wherein for any nth sub-pixel circuit of the plurality of sub-pixel circuits, the method further comprises:
after the potential between the first node and the second node is kept unchanged, the detection control unit of the nth sub-pixel circuit is controlled to be turned off through the scanning signal end of the (N + 1) th sub-pixel circuit, so that the driving control unit drives the light-emitting device to emit light based on the potential between the first node and the second node and the electric energy stored in the energy storage unit.
10. The method according to claim 6, wherein, for any one of the plurality of sub-pixel circuits, the data writing unit includes a third switching device, and the drive control unit includes a fourth switching device, the method further comprising:
for an nth sub-pixel circuit of the plurality of sub-pixel circuits, the nth sub-pixel circuit is in a compensation phase;
when writing a signal, controlling the data writing unit to write a data signal into a first node through the scanning signal end of the Nth sub-pixel circuit, and controlling the second control end of the detection control unit to be opened through the scanning signal end of the (N-1) th sub-pixel circuit so as to write a reference signal into a second node;
during charging, the data writing unit is controlled to be closed through the scanning signal end of the Nth sub-pixel circuit, the second control end of the detection control unit is kept to be opened, the driving control unit is controlled to be opened through the first voltage signal end, and the energy storage unit is charged through the second node in the Nth sub-pixel circuit;
during sampling, after the electric potential of the induction signal line is stabilized, detecting the electric potential of a second node in the Nth sub-pixel circuit at the end of the induction signal line;
when the signal is written back, the data writing unit is controlled by the scanning signal end of the Nth sub-pixel circuit to write the data signal into the first node in the Nth sub-pixel circuit, and the second control end of the detection control unit is controlled to be started by the scanning signal end of the N-1 th sub-pixel circuit so as to write the reference signal into the second node in the Nth sub-pixel circuit.
11. The method of claim 10, further comprising:
for the N-1 th sub-pixel circuit in the plurality of sub-pixel circuits, when the N-1 th sub-pixel circuit performs signal write-back, the data writing unit of the N-1 th sub-pixel circuit is controlled to write a data signal into the first node of the N-1 th sub-pixel circuit, and the detection control unit of the N-1 th sub-pixel circuit is controlled to write a reference signal into the second node of the N-1 th sub-pixel circuit.
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| CN111261110A (en) * | 2020-03-09 | 2020-06-09 | 深圳市华星光电半导体显示技术有限公司 | AMOLED pixel driving circuit, pixel driving method and display panel |
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| KR101676259B1 (en) * | 2014-10-01 | 2016-11-16 | 엘지디스플레이 주식회사 | Organic light emitting display device |
| KR102460556B1 (en) * | 2015-12-31 | 2022-10-31 | 엘지디스플레이 주식회사 | Organic light-emitting display panel, organic light-emitting display device, and the method for driving the organic light-emitting display device |
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