CN110544698B - 显示面板及制造方法 - Google Patents

显示面板及制造方法 Download PDF

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CN110544698B
CN110544698B CN201910792232.8A CN201910792232A CN110544698B CN 110544698 B CN110544698 B CN 110544698B CN 201910792232 A CN201910792232 A CN 201910792232A CN 110544698 B CN110544698 B CN 110544698B
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electrode
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pixel electrodes
tin oxide
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奚苏萍
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H01L29/78648Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel

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  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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Abstract

本发明公开一种显示面板,包括有效显示区域、公共电极、走线区域及电路板。有效显示区域包括薄膜晶体管及多个像素电极。薄膜晶体管包括源极、栅极及漏极,栅极设置在源极和漏极之间,源极及漏极之间具有通道。在源极、通道及漏极的上方设置钝化层。在钝化层上方设置氧化铟锡层。氧化铟锡层覆盖在通道上方以和栅极一起来形成双栅极作用。

Description

显示面板及制造方法
技术领域
本发明是有关于一种显示面板及制造方法,特别是有关于一种能够有效减小薄膜晶体管阀值电压偏移量的显示面板及制造方法。
背景技术
近年来,在栅极驱动电路基板电路区内的薄膜晶体管长时间处于正向电压,因此电路区内的薄膜晶体管的阀值电压容易产生正向偏移。有效显示区的薄膜晶体管长时间处于负向电压,因此有效显示区内的薄膜晶体管的阀值电压容易产生负向偏移。电路区内的薄膜晶体管与有效显示区的薄膜晶体管的阀值电压偏移相反会导致面板功能异常,影响面板寿命。
故,有必要提供一种改良的显示面板及制造方法,以解决现有技术所存在的问题。
发明内容
与现有技术相比较,本发明的显示面板能有效减小薄膜晶体管阀值电压的偏移量,从而提高显示面板寿命。
一种显示面板包括有效显示区域,有效显示区域包括薄膜晶体管及多个像素电极,薄膜晶体管包括源极、栅极及漏极,栅极设置在源极和漏极之间,源极和漏极之间具有通道,在源极、通道和漏极的上方设置钝化层,在钝化层上方设置氧化铟锡层,氧化铟锡层覆盖在所述通道上方。
在本发明的一实施例中,显示面板还包括公共电极、走线区域及电路板。
在本发明的一实施例中,在公共电极上设置氧化铟锡讯号线。
在本发明的一实施例中,电路板包括控制电路板和驱动电路板,控制电路板电连接驱动电路板,驱动电路板电连接走线区域,以及走线区域电连接有效显示区域。
在本发明的一实施例中,多个像素电极包括正常像素电极及虚拟像素电极。
在本发明的一实施例中,虚拟像素电极通过至少一个通孔与公共电极上的氧化铟锡讯号线相连接,且氧化铟锡讯号线通过虚拟数据讯号线及转孔连接驱动电路。
在本发明的一实施例中,控制电路板通过数据讯号线来控制多个像素电极的电位。
在本发明的一实施例中,虚拟像素电极与公共电极是同一电位。
在本发明的一实施例中,虚拟像素电极未电连接薄膜晶体管。
在本发明的一实施例中,薄膜晶体管还包括基板、栅极绝缘层、非晶硅层以及经掺杂的非晶硅层。栅极设置在基板上,栅极绝缘层覆盖栅极,非晶硅层覆盖栅极绝缘层,经掺杂的非晶硅层设置在非晶硅层上,源极及漏极分别设置在经掺杂的非晶硅层上。
附图说明
图1是本发明实施例的显示面板示意图;
图2是本发明实施例设置在有效显示区域的薄膜晶体管的剖面图;
图3是本发明实施例的氧化铟锡层横跨薄膜晶体管的通道示意图;以及
图4是本发明实施例的扫描线与虚拟数据讯号线的电压波形。
具体实施方式
参考图1,本发明实施例提供一种显示面板10,显示面板10包括有效显示区域20、公共电极30、走线区域40及电路板50。具体地,有效显示区域20包括薄膜晶体管及多个像素电极,多个像素电极包括正常像素电极及虚拟像素电极。正常像素电极电连接薄膜晶体管,虚拟像素电极未电连接薄膜晶体管。电路板50包括控制电路板52和驱动电路板51。控制电路板52电连接驱动电路板51,且控制电路板52可以通过驱动电路板51和数据讯号线80来控制多个正常像素电极的电位。另外,控制电路板52也可以通过虚拟数据讯号线70控制多个虚拟像素电极电位,具体而言,控制电路板52通过驱动电路板51和虚拟数据讯号线70电连接走线区域40,走线区域40中的通孔与公共电极上的氧化铟锡讯号线60相连接,氧化铟锡讯号线60进一步连接虚拟像素电极,使得控制电路板52通过虚拟数据讯号线70控制多个虚拟像素电极电位。优选地,虚拟像素电极与公共电极是同一电位。
参考图2,进一步描述设置在有效显示区域的薄膜晶体管。薄膜晶体管100包括基板101、栅极102、栅极绝缘层103、非晶硅层104、经掺杂的非晶硅层105、源极106、漏极107、钝化层108及氧化铟锡层109。具体而言,栅极102设置基板101上,栅极绝缘层103覆盖栅极102,非晶硅层104覆盖栅极绝缘层103,经掺杂的非晶硅层105设置在非晶硅层104上,源极106及漏极107分别设置在经掺杂的非晶硅层105上,源极106及漏极107之间具有通道,在源极106、通道和漏极107的上方设置钝化层108,在钝化层108上方设置氧化铟锡层109。
参考图3,在上画素250及下画素200之间的氧化铟锡层109横跨薄膜晶体管100的通道,和氧化铟锡讯号线电连接的氧化铟锡讯号层109是位在共同电极线和3个薄膜晶体管100之上。换言之,氧化铟锡层109横跨薄膜晶体管100,此时由氧化铟锡组成的电极相当于另一个栅极电极,使得薄膜晶体管100具有双栅极电极,这样能有效减小薄膜晶体管阀值电压的偏移量,从而提高显示面板寿命。
栅极驱动电路基板内的薄膜晶体管一直是在正向电压,所以其阈值电压容易产生正向偏移。参考图4,从栅极驱动电路基板输出扫描线G1到G2160的波形可以看出有效显示区的薄膜晶体管中的栅极电极只有一小段时间是正向电压,其余时间大多数处于相对低电位电压,所以容易产生负偏。有效显示区的薄膜晶体管长时间处于相对低电位电压,因此有效显示区内的薄膜晶体管的阀值电压容易产生负向偏移。在本发明实施例中,虚拟数据讯号线70及和其电连接的氧化铟锡讯号线60的电压波形只在遮末时间(blanking time)300给定负向电压,其它时间皆在相对高电位电压藉此,有效显示区内的薄膜晶体管的阀值电压容易产生负向偏移的问题可被改善。
本发明实施例所提供的显示面板及其制造方法能有效减小薄膜晶体管阀值电压的偏移量,从而提高显示面板寿命。
虽然本发明结合其具体实施例而被描述,应该理解的是,许多替代、修改及变化对于那些本领域的技术人员将是显而易见的。因此,其意在包含落入所附权利要求书的范围内的所有替代、修改及变化。

Claims (2)

1.一种显示面板,其特征在于,包括:有效显示区域、公共电极、走线区域及电路板;
其中所述有效显示区域包括薄膜晶体管及多个像素电极,所述薄膜晶体管包括源极、栅极及漏极,所述栅极设置在所述源极和所述漏极之间,所述源极和所述漏极之间具有通道,在所述源极、所述通道和所述漏极的上方设置钝化层,在所述钝化层上方设置氧化铟锡层,所述氧化铟锡层覆盖在所述通道上方;所述多个像素电极包括正常像素电极及虚拟像素电极,所述正常像素电极电连接薄膜晶体管,所述虚拟像素电极未电连接薄膜晶体管;在所述公共电极上方设置氧化铟锡讯号线,所述氧化铟锡讯号线电连接至所述氧化铟锡讯号层及所述栅极,且所述氧化铟锡讯号线与所述公共电极绝缘设置;所述电路板包括控制电路板和驱动电路板,所述控制电路板电连接所述驱动电路板,所述驱动电路板电连接所述走线区域,以及所述走线区域电连接所述有效显示区域;所述虚拟像素电极通过所述走线区域中的至少一个通孔与所述公共电极上的氧化铟锡讯号线相连接,且所述氧化铟锡讯号线通过虚拟数据讯号线及转孔连接所述驱动电路板,所述控制电路板通过数据讯号线来控制所述多个所述虚拟像素电极的电位与所述公共电极是同一电位。
2.如权利要求1所述的显示面板,其特征在于,所述薄膜晶体管还包括:
基板;
栅极绝缘层;
非晶硅层;以及
经掺杂的非晶硅层;
其中所述栅极设置在所述基板上,所述栅极绝缘层覆盖所述栅极,所述非晶硅层覆盖所述栅极绝缘层,所述经掺杂的非晶硅层设置在所述非晶硅层上,所述源极及所述漏极分别设置在所述经掺杂的非晶硅层上。
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160033288A (ko) * 2014-09-17 2016-03-28 엘지디스플레이 주식회사 액정 표시장치
CN107204309A (zh) * 2017-05-22 2017-09-26 深圳市华星光电技术有限公司 双栅极金属氧化物半导体tft基板的制作方法及其结构
CN108121119A (zh) * 2016-11-29 2018-06-05 乐金显示有限公司 液晶显示器

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160033288A (ko) * 2014-09-17 2016-03-28 엘지디스플레이 주식회사 액정 표시장치
CN108121119A (zh) * 2016-11-29 2018-06-05 乐金显示有限公司 液晶显示器
CN107204309A (zh) * 2017-05-22 2017-09-26 深圳市华星光电技术有限公司 双栅极金属氧化物半导体tft基板的制作方法及其结构

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