CN110531826B - Low-voltage drop shunt voltage stabilizer - Google Patents

Low-voltage drop shunt voltage stabilizer Download PDF

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Publication number
CN110531826B
CN110531826B CN201810516123.9A CN201810516123A CN110531826B CN 110531826 B CN110531826 B CN 110531826B CN 201810516123 A CN201810516123 A CN 201810516123A CN 110531826 B CN110531826 B CN 110531826B
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current mirror
switch
terminal
electrically connected
module
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CN110531826A (en
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陈明东
林惠祯
王又法
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Guangbao Technologies Singapore Private Ltd
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Guangbao Technologies Singapore Private Ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26Current mirrors

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

The invention provides a low dropout shunt regulator, which comprises a first current mirror module, a second current mirror module and an output module. The first end of the first current mirror module is electrically connected with the input voltage, and the first current mirror module has high output impedance; the first end of the second current mirror module is electrically connected with the second end of the first current mirror module, and the second end of the second current mirror module is electrically connected with a reference voltage; the output end of the output module is electrically connected with the third end of the first current mirror module, the output end and the first end of the output module are respectively electrically connected with the second current mirror module, and the second end of the output module is electrically connected with the reference voltage. The low dropout shunt regulator of the invention combines the low voltage process and the high voltage process switch component to form a current mirror circuit with high output impedance, so as to reduce the current change caused by a large input voltage range and further reduce the internal energy consumption of the low dropout shunt regulator.

Description

Low-voltage drop shunt voltage stabilizer
Technical Field
The present invention relates to a low dropout shunt regulator, and more particularly, to a low dropout shunt regulator having a low current change rate in an input voltage range.
Background
In a voltage regulator circuit, a low dropout linear regulator is a circuit that provides a regulated voltage and current and can receive a wide range of input voltages, for example, 5V to 30V.
However, since the input voltage range is quite large, the low dropout regulator needs to provide a stable output current, and when the input voltage is a high voltage, since the conventional low dropout regulator mainly uses the current mirror circuit as the current source, the conventional current mirror switch device does not have a high output impedance, and accordingly, the energy consumed therein is increased.
Therefore, it is an important subject of the present industry to provide a voltage regulator having a high output impedance current source.
Disclosure of Invention
In view of the above, the present invention provides a low dropout shunt regulator for converting an input voltage into an output voltage, comprising: a first current mirror module including a first terminal, a second terminal and a third terminal, wherein the first terminal of the first current mirror module is electrically connected to the input voltage, and the first current mirror module has a high output impedance; a second current mirror module comprising a first end and a second end, wherein the first end of the second current mirror module is electrically connected to the second end of the first current mirror module, and the second end of the second current mirror module is electrically connected to a reference voltage; and an output module including an output terminal, a first terminal and a second terminal, wherein the output terminal of the output module is electrically connected to the third terminal of the first current mirror module, the output terminal of the output module and the first terminal are respectively electrically connected to the second current mirror module, and the second terminal of the output module is electrically connected to the reference voltage.
Preferably, the low dropout shunt regulator further comprises: a start module, including a first terminal, a second terminal and a third terminal, wherein the first terminal of the start module is electrically connected to the input voltage, the second terminal of the start module is electrically connected to the reference voltage, and the third terminal of the start module is electrically connected to the first terminal of the second current mirror module.
Preferably, the third terminal of the starting module is electrically connected to the second terminal of the first current mirror module through a first impedance.
Preferably, the output terminal of the output module is electrically connected to the first terminal of the second current mirror module through a second impedance.
Preferably, the first current mirror module includes: a first current mirror switch having a first end, a second end and a third end, wherein the first end of the first current mirror switch is electrically connected to the first end of the first current mirror module; a second current mirror switch having a first end, a second end and a third end, the first end of the second current mirror switch being electrically connected to the third end of the first current mirror switch, the second end of the second current mirror switch being electrically connected to the second end of the first current mirror switch and the third end of the second current mirror switch, the third end of the second current mirror switch being electrically connected to the second end of the first current mirror module; a third current mirror switch having a first end, a second end, and a third end, the first end of the third current mirror switch being electrically connected to the first end of the first current mirror module, the second end of the third current mirror switch being electrically connected to the second end of the first current mirror switch and the second end of the second current mirror switch; and a fourth current mirror switch having a first end, a second end and a third end, the first end of the fourth current mirror switch being electrically connected to the third end of the third current mirror switch, the second end of the fourth current mirror switch being electrically connected to the second end of the third current mirror switch, the third end of the fourth current mirror switch being electrically connected to the third end of the first current mirror module.
Preferably, the second current mirror module includes: a first switch having a first end, a second end and a third end, wherein the first end of the first switch is electrically connected to the first end of the second current mirror module; a fifth current mirror switch having a first end, a second end, and a third end, wherein the first end of the fifth current mirror switch is electrically connected to an external current source and the second end of the fifth current mirror switch, and the third end of the fifth current mirror switch is electrically connected to the reference voltage; a sixth current mirror switch having a first end, a second end and a third end, the first end of the sixth current mirror switch being electrically connected to the third end of the first switch, the second end of the sixth current mirror switch being electrically connected to the second end of the fifth current mirror switch, the third end of the sixth current mirror switch being electrically connected to the reference voltage.
Preferably, the output module includes: a first output switch having a first end, a second end and a third end, wherein the first end of the first output switch is electrically connected to the output end of the output module, and the second end of the first output switch is electrically connected to the third end of the first output switch; a second output switch having a first end, a second end and a third end, wherein the first end of the second output switch is electrically connected to the third end of the first output switch; a third output switch having a first end, a second end and a third end, wherein the first end of the third output switch is electrically connected to the third end of the second output switch, the second end of the third output switch is electrically connected to the second end of the second output switch, and the third end of the third output switch is electrically connected to the reference voltage; a fourth output switch having a first end, a second end and a third end, wherein the first end of the fourth output switch is electrically connected to the output end of the output module, the second end of the fourth output switch is electrically connected to the third end of the second output switch and the first end of the third output switch, and the third end of the fourth output switch is electrically connected to the reference voltage.
Preferably, the second end of the second output switch and the second end of the third output switch are electrically connected to the second end of the fifth current mirror switch and the second end of the sixth current mirror switch of the second current mirror module.
Preferably, the output terminal is electrically connected to the second terminal of the first switch of the second current mirror module through a second impedance.
Preferably, the starting module comprises: a first start switch having a first end, a second end and a third end, wherein the first end of the first start switch is electrically connected to the first end of the start module through a third impedance, the second end of the first start switch is electrically connected to the second end of the first switch of the second current mirror module, and the third end of the first start switch is electrically connected to the second end of the start module; a diode-connected transistor having a first terminal, a second terminal, and a third terminal, wherein the first terminal of the diode-connected transistor is electrically connected to the first terminal of the first start switch and the second terminal of the diode-connected transistor, and the third terminal of the diode-connected transistor is electrically connected to the second terminal of the start module; and a third start switch having a first end, a second end and a third end, wherein the first end of the third start switch is electrically connected to the third end of the start module, the second end of the third start switch is electrically connected to the first end of the first start switch and the first end of the diode-connected transistor, and the third end of the third start switch is electrically connected to the two ends of the start module.
Preferably, the first current mirror switch and the third current mirror switch are P-type metal oxide semiconductor field effect transistors with low voltage process, respectively, and the second current mirror switch and the fourth current mirror switch are P-type metal oxide semiconductor field effect transistors with high voltage process, respectively.
In summary, the low dropout shunt regulator of the present invention utilizes the first current mirror switch and the third current mirror switch in the low voltage process and the second current mirror switch and the fourth current mirror switch in the high voltage process to form the current mirror circuit with high output impedance, so as to reduce the current variation caused by the large input voltage range and further reduce the internal energy consumption of the low dropout shunt regulator. In addition, the chip layout can be adjusted flexibly by combining the current mirror switch with the low-voltage process and the current mirror switch with the high-voltage process.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a schematic diagram of a low dropout shunt regulator according to an embodiment of the present invention.
Fig. 2 is a circuit schematic of the first current mirror module of fig. 1.
Fig. 3 is a circuit schematic of the second current mirror module of fig. 1.
Fig. 4 is a circuit schematic diagram of the output module of fig. 1.
Fig. 5 is a circuit schematic of the start-up block of fig. 1.
Fig. 6 is a voltage-current schematic diagram of the first current mirror module of fig. 1.
Detailed Description
Various exemplary embodiments will be described more fully hereinafter with reference to the accompanying drawings, in which some exemplary embodiments are shown. The inventive concept may, however, be embodied in many different forms and should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like numbers refer to like elements throughout.
It will be understood that, although the terms first, second, third, etc. may be used herein to describe various components, these components should not be limited by these terms. These terms are used to distinguish one element from another. Thus, a first component discussed below could be termed a second component without departing from the teachings of the present concepts. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The following description of the pins of the switch modules is based on the reference numerals of the pins.
[ embodiment of the Low dropout shunt regulator of the present invention ]
Referring to fig. 1 to 5, fig. 1 is a schematic diagram of a low dropout shunt regulator according to an embodiment of the invention. Fig. 2 is a circuit diagram of the first current mirror module shown in fig. 1. Fig. 3 is a circuit diagram of the second current mirror module shown in fig. 1. Fig. 4 is a circuit diagram of the output module in fig. 1. FIG. 5 is a circuit diagram of the start-up module shown in FIG. 1.
The low dropout voltage regulator 1 includes a first current mirror module 11, a second current mirror module 12, an output module 13 and a start module 14.
In the embodiment, the Low dropout voltage regulator 1 is a Low-dropout linear regulator (Low-dropout regulator) for converting an input voltage VCC into an output voltage VOUT. In this embodiment, the input voltage VCC may range from 0V to 40V, for example: 4.5V-30V, can be adjusted according to actual requirements, and is not limited in the invention.
In the present embodiment, the first current mirror module 11 includes a first terminal 11-N1, a second terminal 11-N2, and a third terminal 11-N3. The first terminal 11-N1 of the first current mirror module 11 is electrically connected to the input voltage VCC.
The second current mirror module 12 also includes a first terminal 12-N1 and a second terminal 12-N2. The first end 12-N1 of the second current mirror module 12 is electrically connected to the second end 11-N2 of the first current mirror module 11. The second terminal 12-N2 of the second current mirror module 12 is electrically connected to a reference voltage Vee. In the present embodiment, the reference voltage Vee is a ground potential, however, it can be designed and adjusted according to the actual requirement, and is not limited in the present invention.
The output module 13 includes an output terminal Out, a first terminal 13-N1 and a second terminal 13-N2. The output terminal Out of the output module 13 is electrically connected to the third terminals 11-N3 of the first current mirror module 11, the output terminal Out and the first terminals 13-N1 of the output module 13 are electrically connected to the second current mirror module 12, respectively, and the second terminals 13-N2 of the output module 13 are electrically connected to the reference voltage Vee. The regulator 1 provides an output voltage VOUT through an output terminal Out of the output module 13. The output voltage VOUT may be a fixed voltage or a variable voltage, and may be designed and adjusted according to actual requirements, which is not limited in the present invention.
The start module 14 includes a first terminal 14-N1, a second terminal 14-N2, and a third terminal 14-N3. The first terminal 13-N1 of the start-up module 13 is electrically connected to the input voltage VCC, the second terminal 14-N2 of the start-up module 14 is electrically connected to the reference voltage Vee, and the third terminal 14-N3 of the start-up module 14 is electrically connected to the first terminal 12-N1 of the second current mirror module 12.
The third terminal 14-N3 of the start module 14 is electrically connected to the second terminal 11-N2 of the first current mirror module 11 through a first resistor R1. The output terminal Out of the output module 13 is electrically connected to the second current mirror module 12 through a second impedance R2.
Referring to fig. 2, the first current mirror module 11 includes a first current mirror switch MP1, a second current mirror switch MP2, a third current mirror switch MP3 and a fourth current mirror switch MP 4.
The first current mirror switch MP1 has a first terminal, a second terminal and a third terminal. The first terminal of the first current mirror switch MP1 is electrically connected to the first terminals 11-N1 of the first current mirror module 11. The second current mirror switch MP2 has a first terminal, a second terminal and a third terminal. The first terminal of the second current mirror switch MP2 is electrically connected to the third terminal of the first current mirror switch MP1, and the second terminal of the second current mirror switch MP2 is electrically connected to the second terminal of the first current mirror switch MP1 and the third terminal of the second current mirror switch MP 2. The third terminal of the second current mirror switch MP2 is electrically connected to the second terminals 11-N2 of the first current mirror module 11. The third current mirror switch MP3 has a first terminal, a second terminal and a third terminal. The first terminal of the third current mirror switch MP3 is electrically connected to the first terminals 11-N1 of the first current mirror module 11. The second terminal of the third current mirror switch MP3 is electrically connected to the second terminal of the first current mirror switch MP1 and the second terminal of the second current mirror switch MP 2. The fourth current mirror switch MP4 has a first terminal, a second terminal and a third terminal. The first terminal of the fourth current mirror switch MP4 is electrically connected to the third terminal of the third current mirror switch MP 3. The second terminal of the fourth current mirror switch MP4 is electrically connected to the second terminal of the third current mirror switch MP3, and the third terminal of the fourth current mirror switch MP4 is electrically connected to the third terminals 11-N3 of the first current mirror module 11.
In the present embodiment, the first current mirror switch MP1, the second current mirror switch MP2, the third current mirror switch MP3 and the fourth current mirror switch MP4 constitute a current mirror circuit, which receives the input voltage VCC and provides a stable current to the output terminal Out.
In the present embodiment, the first current mirror switch MP1, the second current mirror switch MP2, the third current mirror switch MP3 and the fourth current mirror switch MP4 are P-type Metal oxide semiconductor Field Effect transistors (P-type Metal oxide semiconductor Field Effect transistors). In the present embodiment, the first current mirror switch MP1 and the third current mirror switch MP3 are low voltage mosfet. The second current mirror switch MP2 and the fourth current mirror switch MP4 are high voltage mosfet. In addition, the first current mirror switch MP1 and the second current mirror switch MP2 may also be a composite transistor (composite transistor). The third current mirror switch MP3 and the fourth current mirror switch MP4 may be a composite transistor (composite transistor), which is not limited in the present invention.
In the embodiment, the first current mirror switch MP1 and the third current mirror switch MP3 in the low voltage process, and the second current mirror switch MP2 and the fourth current mirror switch MP4 in the high voltage process are combined, so that the first current mirror module 11 of the voltage regulator 1 has a high output impedance. Therefore, when the voltage regulator 1 changes from a low voltage to a high voltage in the input voltage range (4.5V to 30V), the output current variation of the first current mirror module 11 can be reduced accordingly.
Referring to fig. 3, the second current mirror module 12 includes a first switch SW1, a fifth current mirror switch MN5, and a sixth current mirror switch MN 6. The first switch SW1 has a first terminal, a second terminal and a third terminal. The first terminal of the first switch SW1 is electrically connected to the first terminal 12-N1 of the second current mirror module 12. The fifth current mirror switch MN5 has a first terminal, a second terminal, and a third terminal. A first terminal of the fifth current mirror switch MN5 is electrically connected to an external current source Ibias and a second terminal of the fifth current mirror switch MN5, and a third terminal of the fifth current mirror switch MN5 is electrically connected to the reference voltage Vee. The sixth current mirror switch MN6 has a first terminal, a second terminal, and a third terminal. The first terminal of the sixth current mirror switch MN6 is electrically connected to the third terminal of the first switch SW 1. A second terminal of the sixth current mirror switch MN6 is electrically connected to a second terminal of the fifth current mirror switch MN 5. The third terminal of the sixth current mirror switch MN6 is electrically connected to the reference voltage Vee.
In the present embodiment, the fifth current mirror switch MN5 and the sixth current mirror switch MN6 constitute a current mirror circuit.
Referring to fig. 4, the output module 13 includes a first output switch MO1, a second output switch MO2, a third output switch MO3 and a fourth output switch MO 4.
The first output switch MO1 has a first terminal, a second terminal and a third terminal. A first end of the first output switch MO1 is electrically connected to the output end Out of the output module 13. The second terminal of the first output switch MO1 is electrically connected to the third terminal of the first output switch MO 1. The second output switch MO2 has a first terminal, a second terminal and a third terminal. The first end of the second output switch MO2 is electrically connected to the third end of the first output switch MO 1. The third output switch MO3 has a first terminal, a second terminal and a third terminal. The first terminal of the third output switch MO3 is electrically connected to the third terminal of the second output switch MO2, and the second terminal of the third output switch MO3 is electrically connected to the second terminal of the second output switch MO 2. The third terminal of the third output switch MO3 is electrically connected to the reference voltage Vee. The fourth output switch MO4 has a first terminal, a second terminal and a third terminal. A first end of the fourth output switch MO4 is electrically connected to the output end Out of the output module 13. The second terminal of the fourth output switch MO4 is electrically connected to the third terminal of the second output switch MO2 and the first terminal of the third output switch MO 3. The third terminal of the fourth output switch MO4 is electrically connected to the reference voltage Vee. A second end of the second output switch MO2 and a second end of the third output switch MO3 are electrically connected to a second end of the fifth current mirror switch MN5 and a second end of the sixth current mirror switch MN6 of the second current mirror module 12.
In addition, the output terminal Out of the output module 13 is electrically connected to the second terminal of the first switch SW1 of the second current mirror module 12 through a second impedance R2. That is, in the embodiment, the first switch SW1 uses the output voltage VOUT at the output terminal Out as the bias voltage, and since the output voltage VOUT is a stable voltage, the first switch SW1 can be ensured to be continuously turned on even at the time of the extremely low input voltage VCC.
In this embodiment, the first output switch MO1 of the output module 13, the second output switch MO2 and the fifth current source switch MN5 of the second current mirror module 12 are used as main components for establishing the output voltage VOUT of the voltage regulator 1.
In addition, the second output switch MO2 and the third output switch MO3 form an AB class amplifier for controlling the on/off of the fourth output switch MO4 to control the level of the output voltage VOUT at the output terminal Out.
Referring to fig. 5, the start module 14 includes a first start switch SWN1, a diode-connected transistor SWN2, and a third start switch SWN 3.
The first start switch SWN1 has a first terminal, a second terminal and a third terminal. The first terminal of the first start switch SWN1 is electrically connected to the first terminals 14-N1 of the start module 14 through a third impedance R3, and the second terminal of the first start switch SWN1 is electrically connected to the second terminal of the first switch SW1 of the second current mirror module 12. The third terminal of the first start switch SWN1 is electrically connected to the second terminals 14-N2 of the start module 14.
The diode-connected transistor SWN2 has a first terminal, a second terminal, and a third terminal. A first terminal of the diode-connected transistor SWN2 is electrically connected to the first terminal of the first start switch SWN1 and the second terminal of the diode-connected transistor SWN2, and a third terminal of the diode-connected transistor SWN2 is electrically connected to the second terminals 14-N2 of the start module 14.
The third start switch SWN3 has a first terminal, a second terminal and a third terminal. A first terminal of the third start switch SWN3 is electrically connected to the third terminals 14-N3 of the start module 14. A second terminal of the third start switch SWN3 is electrically connected to the first terminal of the first start switch SWN1 and the first terminal of the diode-connected transistor SWN2, and a third terminal of the third start switch SWN3 is electrically connected to the second terminals 14-N2 of the start module 14. In the present embodiment, the first terminal of the third start switch SWN3 is electrically connected to the second terminals 11-N2 of the first current mirror module through the first impedance R1.
In the present embodiment, the first start switch SWN1, the diode-connected transistor SWN2, and the third start switch SWN3 function as the start regulator 1. In other embodiments, other circuits may be used to start up the voltage regulator 1, and the invention is not limited thereto.
Referring to fig. 6, fig. 6 is a voltage-current diagram of the first current mirror module of fig. 1.
The dotted line I is the output impedance of the current mirror module having only a single-stage current mirror switch in the input voltage range corresponding to the current variation curve of the input voltage, and the solid line II is the low dropout shunt regulator having the first current mirror module having the high output impedance current source in the embodiment of the present invention, in the input voltage range corresponding to the current variation curve of the input voltage. The low dropout regulator 1 of the first current mirror module 11 having high output impedance of the embodiment of the present invention has a low current variation degree.
[ possible effects of the embodiment ]
In summary, the low dropout shunt regulator of the present invention utilizes the first current mirror switch and the third current mirror switch in the low voltage process and the second current mirror switch and the fourth current mirror switch in the high voltage process to form the current mirror circuit with high output impedance, so as to reduce the current variation caused by the large input voltage range and further reduce the internal energy consumption of the low dropout shunt regulator. In addition, the chip layout can be adjusted flexibly by combining the current mirror switch with the low-voltage process and the current mirror switch with the high-voltage process.
The above description is only an example of the present invention, and is not intended to limit the scope of the present invention.

Claims (8)

1. A lddc voltage regulator for converting an input voltage to an output voltage, comprising:
a first current mirror module including a first terminal, a second terminal and a third terminal, wherein the first terminal of the first current mirror module is electrically connected to the input voltage, and the first current mirror module has a high output impedance;
a second current mirror module comprising a first end and a second end, wherein the first end of the second current mirror module is electrically connected to the second end of the first current mirror module, and the second end of the second current mirror module is electrically connected to a reference voltage;
an output module including an output terminal, a first terminal and a second terminal, wherein the output terminal of the output module is electrically connected to the third terminal of the first current mirror module, the output terminal and the first terminal of the output module are respectively electrically connected to the second current mirror module, and the second terminal of the output module is electrically connected to the reference voltage; and
a start module, including a first terminal, a second terminal and a third terminal, wherein the first terminal of the start module is electrically connected to the input voltage, the second terminal of the start module is electrically connected to the reference voltage, and the third terminal of the start module is electrically connected to the first terminal of the second current mirror module;
wherein the first current mirror module comprises:
a first current mirror switch having a first end, a second end and a third end, wherein the first end of the first current mirror switch is electrically connected to the first end of the first current mirror module;
a second current mirror switch having a first end, a second end and a third end, the first end of the second current mirror switch being electrically connected to the third end of the first current mirror switch, the second end of the second current mirror switch being electrically connected to the second end of the first current mirror switch and the third end of the second current mirror switch, the third end of the second current mirror switch being electrically connected to the second end of the first current mirror module;
a third current mirror switch having a first end, a second end, and a third end, the first end of the third current mirror switch being electrically connected to the first end of the first current mirror module, the second end of the third current mirror switch being electrically connected to the second end of the first current mirror switch and the second end of the second current mirror switch; and
a fourth current mirror switch having a first end, a second end and a third end, the first end of the fourth current mirror switch being electrically connected to the third end of the third current mirror switch, the second end of the fourth current mirror switch being electrically connected to the second end of the third current mirror switch, the third end of the fourth current mirror switch being electrically connected to the third end of the first current mirror module, wherein the first current mirror switch and the third current mirror switch are a P-type metal oxide semiconductor field effect transistor with a low voltage process, and the second current mirror switch and the fourth current mirror switch are a P-type metal oxide semiconductor field effect transistor with a high voltage process.
2. The LDO of claim 1, wherein said third terminal of said start-up module is electrically connected to said second terminal of said first current mirror module through a first impedance.
3. The LDO of claim 1, wherein said output terminal of said output module is electrically connected to said first terminal of said second current mirror module through a second impedance.
4. The LDO of claim 1, wherein said second current mirror module comprises:
a first switch having a first end, a second end and a third end, wherein the first end of the first switch is electrically connected to the first end of the second current mirror module;
a fifth current mirror switch having a first end, a second end, and a third end, wherein the first end of the fifth current mirror switch is electrically connected to an external current source and the second end of the fifth current mirror switch, and the third end of the fifth current mirror switch is electrically connected to the reference voltage;
a sixth current mirror switch having a first end, a second end and a third end, the first end of the sixth current mirror switch being electrically connected to the third end of the first switch, the second end of the sixth current mirror switch being electrically connected to the second end of the fifth current mirror switch, the third end of the sixth current mirror switch being electrically connected to the reference voltage.
5. The LDO of claim 4, wherein the output module comprises:
a first output switch having a first end, a second end and a third end, wherein the first end of the first output switch is electrically connected to the output end of the output module, and the second end of the first output switch is electrically connected to the third end of the first output switch;
a second output switch having a first end, a second end and a third end, wherein the first end of the second output switch is electrically connected to the third end of the first output switch;
a third output switch having a first end, a second end and a third end, wherein the first end of the third output switch is electrically connected to the third end of the second output switch, the second end of the third output switch is electrically connected to the second end of the second output switch, and the third end of the third output switch is electrically connected to the reference voltage;
a fourth output switch having a first end, a second end and a third end, wherein the first end of the fourth output switch is electrically connected to the output end of the output module, the second end of the fourth output switch is electrically connected to the third end of the second output switch and the first end of the third output switch, and the third end of the fourth output switch is electrically connected to the reference voltage.
6. The LDO of claim 5, wherein said second terminal of said second output switch and said second terminal of said third output switch are electrically connected to said second terminal of said fifth current mirror switch and said second terminal of said sixth current mirror switch of said second current mirror module.
7. The LDO of claim 6, wherein said output terminal is electrically connected to said second terminal of said first switch of said second current mirror module through a second impedance.
8. The LDO of claim 7, wherein the start-up module comprises:
a first start switch having a first end, a second end and a third end, wherein the first end of the first start switch is electrically connected to the first end of the start module through a third impedance, the second end of the first start switch is electrically connected to the second end of the first switch of the second current mirror module, and the third end of the first start switch is electrically connected to the second end of the start module;
a diode-connected transistor having a first terminal, a second terminal, and a third terminal, wherein the first terminal of the diode-connected transistor is electrically connected to the first terminal of the first start switch and the second terminal of the diode-connected transistor, and the third terminal of the diode-connected transistor is electrically connected to the second terminal of the start module; and
a third start switch having a first end, a second end and a third end, wherein the first end of the third start switch is electrically connected to the third end of the start module, the second end of the third start switch is electrically connected to the first end of the first start switch and the first end of the diode-connected transistor, and the third end of the third start switch is electrically connected to the two ends of the start module.
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