CN110493551A - A kind of display device, mainboard and control method - Google Patents
A kind of display device, mainboard and control method Download PDFInfo
- Publication number
- CN110493551A CN110493551A CN201910867342.6A CN201910867342A CN110493551A CN 110493551 A CN110493551 A CN 110493551A CN 201910867342 A CN201910867342 A CN 201910867342A CN 110493551 A CN110493551 A CN 110493551A
- Authority
- CN
- China
- Prior art keywords
- signal
- signal end
- chip pin
- chip
- bleeder circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 17
- 230000005611 electricity Effects 0.000 claims description 11
- 230000003993 interaction Effects 0.000 claims description 6
- 238000001514 detection method Methods 0.000 abstract description 7
- 230000008859 change Effects 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000032258 transport Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Controls And Circuits For Display Device (AREA)
Abstract
A kind of display device, mainboard and control method disclosed by the invention, mainboard include: Port detecting circuit and master chip；Port detecting circuit includes: control circuit, the first bleeder circuit and the second bleeder circuit；Control circuit can be under the control of the signal of chip pin, by the first signal end and ground terminal on or off；First bleeder circuit can adjust the signal of the first signal end according to the signal at second signal end；Second bleeder circuit can adjust the signal of chip pin according to the signal at second signal end, and master chip is used to detect or adjust the signal of chip pin.By the mutual cooperation of above-mentioned module and element, can be detected to whether external equipment is inserted into.And, due to being only multiplexed the chip pin of a master chip, reduce the usage quantity of chip pin, so as to so that the quantity of the pin of master chip reduce will either be originally used for the chip pin that whether is inserted into of detection external equipment as other function carry out using.
Description
Technical field
The present invention relates to field of display technology more particularly to a kind of display devices, mainboard and control method.
Background technique
Be used for transmission signal high-definition media interface (High Definition Multimedia Interface,
HDMI it) is widely applied.The general end Source (transmission) and Sink (reception) end generally use HDMI interface and realize signal
Transmission.In practical applications, it needs the end Source being inserted into the end Sink, to carry out signal transmission.So in order to be determined as
Whether the external equipment at the end Source is inserted into the end Sink and works, and two pins :+5V are arranged usually on the chip at the end Sink
Power and Hot Plug Detect.And become by the level of detection the two pins+5V Power and Hot Plug Detect
Change, to determine whether external equipment is inserted into and works.There are two such design at least needs to be arranged on the chip at the end Sink
Dedicated pin in addition some also need another additional pin in special circumstances, will cause in this way the pin setting of chip compared with
The more complex problem of more and pin wiring.
Summary of the invention
The embodiment of the invention provides a kind of display device, mainboard and control method, for reducing drawing of being arranged on chip
Foot.A kind of display device provided in an embodiment of the present invention, comprising: mainboard, the mainboard include: Port detecting circuit and main core
Piece；The Port detecting circuit includes: control circuit, the first bleeder circuit and the second bleeder circuit；Wherein,
The control circuit is electrically connected with the first signal end, the chip pin of the master chip and ground terminal respectively；It is described
Control circuit is used under the control of the signal of the chip pin, and first signal end is connected or is cut with the ground terminal
Only；
First bleeder circuit is electrically connected with first signal end, second signal end respectively；The first partial pressure electricity
Road is used to adjust the signal of first signal end according to the signal at the second signal end；
Second bleeder circuit is electrically connected with the chip pin, the second signal end respectively；Second partial pressure
Circuit is used to adjust the signal of the chip pin according to the signal at the second signal end；
The master chip is used to detect or adjust the signal of the chip pin.
Optionally, the control circuit includes: switching tube, first resistor；Wherein, the first end of the switching tube with it is described
The electrical connection of first signal end, the control terminal of the switching tube are electrically connected with the first end of the first resistor, the switching tube
Second end is electrically connected with the ground terminal；The second end of the first resistor is electrically connected with the chip pin.
Optionally, the switching tube includes: triode；Wherein, the collector of the triode is as the switching tube
First end, second end of the emitter of the triode as the switching tube, the base stage of the triode is as the switch
The control terminal of pipe.
Optionally, first bleeder circuit includes: second resistance；Wherein, the first end of the second resistance with it is described
The electrical connection of second signal end, the second end of the second resistance are electrically connected with first signal end.
Optionally, second bleeder circuit includes: 3rd resistor；Wherein, the first end of the 3rd resistor with it is described
The electrical connection of second signal end, the second end of the 3rd resistor are electrically connected with the chip pin.
Optionally, first signal end is the first input signal end (_ HOTPLUG) of HDMI interface；
The second signal end is the second input signal end (HDMI_+5V) of the HDMI interface；
The chip pin is the universal input and output pin of the master chip.
Optionally, the display device is television set.
Correspondingly, the embodiment of the invention provides a kind of mainboards, comprising: Port detecting circuit and master chip；The port
Detection circuit includes: control circuit, the first bleeder circuit and the second bleeder circuit；Wherein,
The control circuit is electrically connected with the first signal end, the chip pin of the master chip and ground terminal respectively；It is described
Control circuit is used under the control of the signal of the chip pin, and first signal end is connected or is cut with the ground terminal
Only；
First bleeder circuit is electrically connected with first signal end, second signal end respectively；The first partial pressure electricity
Road is used to adjust the signal of first signal end according to the signal at the second signal end；
Second bleeder circuit is electrically connected with the chip pin, the second signal end respectively；Second partial pressure
Circuit is used to adjust the signal of the chip pin according to the signal at the second signal end；
The master chip is used to detect or adjust the signal of the chip pin.
Correspondingly, the embodiment of the invention provides a kind of control methods of mainboard, comprising: the first stage, second stage and
Phase III；
In the first stage, configuring the chip pin is input pattern；
In the second stage, high level loaded to the second signal end, first bleeder circuit is according to described the
The high level at binary signal end adjusts the signal of first signal end, and second bleeder circuit is according to the second signal end
High level adjusts the signal of the chip pin；
The master chip becomes high level from low level according to the signal of the chip pin, and the chip pin is configured
For output mode；
The master chip drags down the level of the signal of the chip pin, and the control circuit is in the chip pin
Under low level control, end first signal end and ground terminal；And first bleeder circuit is according to described second
The high level of signal end adjusts the signal of first signal end, makes the first signal end high level；
After the first preset time, the level of the signal of the chip pin is drawn high, and the chip pin is matched
It is set to input pattern；
In the phase III, low level loaded to the second signal end, first bleeder circuit is according to described the
The low level at binary signal end adjusts the signal of first signal end, and second bleeder circuit is according to the second signal end
Low level adjusts the signal of the chip pin；
The master chip becomes low level from high level according to the signal of the chip pin, and the chip pin is configured
For output mode；
The master chip draws high the level of the signal of chip pin, height electricity of the control circuit in the chip pin
Under flat control, first signal end is connected with ground terminal；And first bleeder circuit is according to the ground terminal
Low level adjusts the signal of first signal end, makes the first signal end low level；
After the second preset time, input pattern is configured by chip pin.
Optionally, described that high level is loaded to the second signal end, it specifically includes:
External equipment is electrically connected with mainboard, to load high level to the second signal end by the external equipment；
In the second stage, in first preset time, the control in the external equipment and the mainboard is believed
Number carry out data interaction.
The present invention has the beneficial effect that:
A kind of display device, mainboard and control method provided in an embodiment of the present invention, mainboard include: Port detecting circuit with
Master chip；Port detecting circuit includes: control circuit, the first bleeder circuit and the second bleeder circuit；Control circuit can be
Under the control of the signal of chip pin, by the first signal end and ground terminal on or off；First bleeder circuit can be according to
The signal at binary signal end adjusts the signal of the first signal end；Second bleeder circuit can adjust core according to the signal at second signal end
The signal of piece pin, master chip are used to detect or adjust the signal of chip pin.Mainboard provided in an embodiment of the present invention and display
Device can only be multiplexed the chip pin of a master chip by the mutual cooperation of foregoing circuit and element, and pass through the
The signal at binary signal end adjusts the signal of the first signal end.In this way when external equipment is inserted on mainboard, it may be implemented pair
Whether external equipment, which is inserted into, is detected.Also, due to the chip pin for being only multiplexed a master chip, reduce chip pin
Usage quantity, so as to so that master chip pin quantity reduce either will be originally used for detection external equipment whether insert
The chip pin entered as other function carry out using.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of display device in the related technology；
Fig. 2 is a kind of structural schematic diagram of mainboard in the related technology；
Fig. 3 is the structural schematic diagram of mainboard provided in an embodiment of the present invention；
Fig. 4 is the particular circuit configurations schematic diagram of mainboard provided in an embodiment of the present invention；
Fig. 5 is the flow chart of control method provided in an embodiment of the present invention.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
Attached drawing, the technical solution of the embodiment of the present invention is clearly and completely described.Obviously, described embodiment is this hair
Bright a part of the embodiment, instead of all the embodiments.And in the absence of conflict, the embodiment and reality in the present invention
The feature applied in example can be combined with each other.Based on described the embodiment of the present invention, those of ordinary skill in the art are being not necessarily to
Every other embodiment obtained, shall fall within the protection scope of the present invention under the premise of creative work.
Unless otherwise defined, the technical term or scientific term that the present invention uses should be tool in fields of the present invention
The ordinary meaning for thering is the personage of general technical ability to be understood." first ", " second " used in the present invention and similar word are simultaneously
Any sequence, quantity or importance are not indicated, and are used only to distinguish different component parts." comprising " or "comprising" etc.
Similar word means that the element or object before the word occur covers the element or object for appearing in the word presented hereinafter
And its it is equivalent, and it is not excluded for other elements or object.The similar word such as " connection " or " connected " is not limited to physics
Or mechanical connection, but may include electrical connection, it is either direct or indirectly.
It should be noted that the size and shape of each figure do not reflect actual proportions in attached drawing, purpose is schematically illustrate
The content of present invention.And same or similar label indicates same or similar element or has same or like function from beginning to end
The element of energy.
As shown in Figure 1, general display device includes panel 1, backlight assembly 2, mainboard 3, power panel 4, rear shell 5 and pedestal 6.
Wherein, panel 1 is used to that picture to be presented to user；Backlight assembly 2 is located at the lower section of panel 1, and usually some optical modules are used for
Well-off brightness and the light source being evenly distributed, enable panel 1 normally to show that image, backlight assembly 2 further include backboard 20, main
Plate 3 and power panel 4 are set on backboard 20.Wherein, power panel is for the power elements into mainboard 3.Also, usually in backboard
Some convex closure structures are stamped and formed out on 20, so that mainboard 3 and power panel 4 be allow to be fixed on convex closure by screw or hook
On；The lid of rear shell 5 is located on panel 1, for hiding the components of the display devices such as backlight assembly 2, mainboard 3 and power panel 4, this
Sample can play beautiful effect；Pedestal 6, is used to support display device.
In conjunction with shown in Fig. 1 and Fig. 2, master chip 40 and the transmission of control display device work can be set on general mainboard 3
The receiving port 100 of signal.In practical applications, the port areas 7 that receiving port 100 is typically inserted through rear shell 5 extends to rear shell 5
Outside.It can be electrically connected in this way by receiving port 100 with external equipment, to transmit signal.
The embodiment of the invention provides a kind of display devices.The display device includes: mainboard.In the specific implementation, it shows
Device can be television set.Certainly, in the specific implementation, display device can be with are as follows: mobile phone, tablet computer, display, notes
Any products or components having a display function such as this computer, Digital Frame, navigator.Other for the display device must not
The component part that can lack is it will be apparent to an ordinarily skilled person in the art that having, and this will not be repeated here, also should not be used as
Limitation of the present invention.
Mainboard provided in an embodiment of the present invention includes: Port detecting circuit 50 and master chip 40, as shown in figure 3, port is examined
Slowdown monitoring circuit includes: control circuit 10, the first bleeder circuit 20 and the second bleeder circuit 30；Wherein,
Control circuit 10 is electrically connected with the first signal end V1, the chip pin S1 of master chip 40 and ground terminal GND respectively；Control
Circuit 10 processed is used under the control of the signal of chip pin S1, by the first signal end V1 and ground terminal GND on or off；
First bleeder circuit 20 is electrically connected with the first signal end V1, second signal end V2 respectively；First bleeder circuit 20 is used
In the signal for adjusting the first signal end V1 according to the signal of second signal end V2；
Second bleeder circuit 30 is electrically connected with chip pin S1, second signal end V2 respectively；Second bleeder circuit 30 is used for
The signal of chip pin S1 is adjusted according to the signal of second signal end V2, master chip 40 is for detecting or adjusting chip pin S1's
Signal.
In the specific implementation, power panel 4 can be set on mainboard, can also be not arranged on mainboard, not limit herein
It is fixed.
Mainboard provided in an embodiment of the present invention can only be multiplexed one by the mutual cooperation of above-mentioned module and element
The chip pin S1 of master chip 40, and adjust by the signal at second signal end the signal of the first signal end V1.Exist in this way
When external equipment is inserted on the mainboard in display device, may be implemented to detect to whether external equipment is inserted into.Also, by
In the chip pin S1 for being only multiplexed a master chip 40, reduce the usage quantity of chip pin S1, so as to so that main core
The quantity of the pin of piece 40, which is reduced, will either be originally used for chip pin S1 that whether detection external equipment is inserted into as other
Function carry out using.
Combined with specific embodiments below, the present invention is described in detail.It should be noted that be in the present embodiment in order to
It preferably explains the present invention, but does not limit the present invention.
As shown in figure 4, in the specific implementation, in mainboard provided in an embodiment of the present invention, control circuit 10 includes: switch
Pipe Q, first resistor R1；Wherein, the first end of switching tube Q is electrically connected with the first signal end V1, the control terminal of switching tube Q and first
The first end of resistance R1 is electrically connected, and the second end of switching tube Q is electrically connected with ground terminal GND；The second end and core of first resistor R1
Piece pin S1 electrical connection.
Also, in the specific implementation, switching tube Q may include triode, as shown in figure 4, the collector conduct of triode
The first end of switching tube Q, second end of the emitter of triode as switching tube Q, control of the base stage of triode as switching tube Q
End processed.
In the specific implementation, when transistor base voltage is greater than 0.7V, triode is in the conductive state；Transistor base electricity
When pressure is 0V, triode is in off state, and certainly, in the specific implementation, the design parameter of triode is without being limited thereto, herein not
It limits.
Certainly, in the specific implementation, switching tube Q can also be thin film transistor (TFT) (TFT, Thin Film Transistor)
Metal oxide semiconductor field effect tube (MOS, Metal Oxide Scmiconductor) or other equally there is switch
The element of pipe Q function, is not limited thereto.
In the specific implementation, in mainboard provided in an embodiment of the present invention, the first bleeder circuit 20 includes: second resistance
R2；Wherein, the first end of the second resistance R2 is electrically connected with the second signal end V2, the second end of the second resistance R2
It is electrically connected with the first signal end V1.
In the specific implementation, in mainboard provided in an embodiment of the present invention, the second bleeder circuit 30 includes: 3rd resistor
R3；Wherein, the first end of the 3rd resistor R3 is electrically connected with the second signal end V2, the second end of the 3rd resistor R3
It is electrically connected with the chip pin S1.
In practical applications, external equipment has HDMI output port, and mainboard has HDMI receiving port.In external equipment
When being inserted on mainboard, HDMI output port and HDMI receiving port are electrically connected to each other.Wherein, the HDMI_ of HDMI output port
HOTPLUG output pin is electrically connected with the HDMI_HOTPLUG input pin of HDMI receiving port, the HDMI_ of HDMI output port
+ 5V output pin is electrically connected with the HDMI_+5V input pin of HDMI receiving port.The electric connection mode of remaining pin can be with
Mode in the prior art is identical, and therefore not to repeat here.
In the specific implementation, in mainboard provided in an embodiment of the present invention, the first signal end V1 is HDMI receiving port
First input signal end.Illustratively, the first input signal end of HDMI receiving port can be the HDMI_ of HDMI receiving port
HOTPLUG input pin.
Second signal end V2 is the second input signal end of HDMI receiving port.Illustratively, the of HDMI receiving port
Two input signal ends can be the HDMI_+5V input pin of HDMI receiving port.
Chip pin S1 is the universal input and output pin of master chip 40.
In the specific implementation, in mainboard provided in an embodiment of the present invention, first resistor R1, second resistance R2, third electricity
The material of resistance R3 should be arranged according to actual needs with resistance value, it is not limited here.
In the specific implementation, in mainboard provided in an embodiment of the present invention, master chip 40 be SOC (Systemon Chip,
System on chip) chip namely system level chip, the model of master chip 40 should be arranged according to the actual situation, be not limited thereto.
In the specific implementation, in mainboard provided in an embodiment of the present invention, chip pin S1 can be configured as input mould
Formula or output mode, in input pattern, master chip 40 can detecte the level change of chip pin S1, in output mode, main core
Piece 40 can control the level change of 40 pin of master chip.
In the specific implementation, in mainboard provided in an embodiment of the present invention, as long as chip pin S1 can match such as above content
It is set to input pattern or output mode, can choose any one chip pin S1 met the requirements.
The above is only the specific structures of each module in the mainboard for illustrating the present invention embodiment offer, are being embodied
When, the specific structure of above-mentioned each module is not limited to above structure provided in an embodiment of the present invention, can also be those skilled in the art
Other structures known to member, are not limited thereto.
Based on the same inventive concept, the embodiment of the invention also provides a kind of above-mentioned display dresses provided in an embodiment of the present invention
The control method set, as shown in Figure 5, comprising: first stage, second stage and phase III,；Wherein:
S110, first stage, configuring chip pin S1 are input pattern.
S120, second stage load high level to second signal end V2, and the first bleeder circuit 20 is according to second signal end V2
High level adjust the first signal end V1 signal, the second bleeder circuit 30 according to the high level of second signal end V2 adjust chip
The signal of pin S1；
S130, master chip 40 become high level from low level according to the signal of chip pin S1, and chip pin S1 is configured
For output mode；
S140, master chip 40 drag down the level of the signal of chip pin S1, and control circuit 10 is low chip pin S1's
Under the control of level, end the first signal end V1 and ground terminal GND；And the first bleeder circuit 20 is according to second signal end V2
High level adjust the first signal end V1 signal, make the first signal end V1 high level；
S150, after the first preset time, the level of chip pin S1 is drawn high, and configures chip pin S1 to defeated
Enter mode.
S160, phase III load low level to second signal end V2, and the first bleeder circuit 20 is according to second signal end V2
Low level adjust the first signal end V1 signal, the second bleeder circuit 30 according to the low level of second signal end V2 adjust chip
The signal of pin S1；
S170, master chip 40 become low level from high level according to the signal of chip pin S1, and chip pin S1 is configured
For output mode；
S180, master chip 40 draw high the level of the signal of chip pin S1, height of the control circuit 10 in chip pin S1
Under the control of level, the first signal end V1 is connected with ground terminal GND；And the first bleeder circuit 20 is according to ground terminal GND's
Low level adjusts the signal of the first signal end V1, makes the first signal end V1 low level；
S190, after the second preset time, configure input pattern for chip pin S1.
Below by taking mainboard shown in Fig. 4 as an example, the control method of mainboard as shown in connection with fig. 5 provides the embodiment of the present invention
The course of work of above-mentioned mainboard described: specifically, the course of work may include:
(1) in the first stage, input pattern is configured by chip pin S1.Specifically, during the system startup process, initially
Change HDMIRx driving, load extends display capabilities identification (Extended display identification data, EDID)
Or high-bandwidth digital content protection (high bandwidth digital content protection, HDCP), and initialize
HDMIRx register information.
(2) in second stage, external equipment is electrically connected with mainboard, HDMI_+5V of the external equipment to HDMI receiving port
Input pin loads high level, and second resistance R2 draws the HDMI_HOTPLUG input that high level is transmitted to HDMI receiving port
High level is transmitted to chip pin S1 by foot, 3rd resistor R3.
(3) master chip 40 becomes high level from low level according to the signal of chip pin S1, configures chip pin S1 to
Output mode.
(4) master chip 40 drags down the level of chip pin S1, and first resistor R1 transmits the low level of chip pin S1
To the base stage of triode, end triode；The HDMI_HOTPLUG input pin of HDMI receiving port is according to second resistance R2
The high level that transmission comes becomes high level.
(5) external equipment detects that the level of the HDMI_HOTPLUG input pin of HDMI receiving port is raised, and starts
EDID/HDCP interaction is initiated, starts output signal after the completion of interaction.It is main when by the first preset time and starting output signal
After chip 40 draws high the level of chip pin S1, chip pin S1 is configured input pattern by master chip 40.Wherein, first
Preset time can be to start to initiate to be transmitted duration used in signal after the completion of EDID/HDCP interaction and interaction.Certainly,
The present invention includes but is not limited to this.
(6) in the phase III, external equipment loads low level to the HDMI_+5V input pin of HDMI receiving port, and second
Low level is transmitted to the HDMI_HOTPLUG input pin of HDMI receiving port by resistance R2, and 3rd resistor R3 transmits low level
To chip pin S1.
(7) master chip 40 becomes low level from high level according to the signal of chip pin S1, configures chip pin S1 to
Output mode.
(8) master chip 40 draws high the level of the signal of chip pin S1, and first resistor R1 is electric by the height of chip pin S1
It flates pass and transports to the base stage of triode, make triode ON；The HDMI_HOTPLUG input pin of HDMI receiving port passes through three poles
Pipe is connected with ground terminal GND, is pulled low the level of the signal of the HDMI_HOTPLUG input pin of HDMI receiving port.
(9) after the second preset time, chip pin S1 is configured input pattern by master chip 40.Wherein, second is pre-
If the time can design determination according to actual application environment, it is not limited thereto.
Wherein, in the phase III, external equipment loads low level to the HDMI_+5V input pin of HDMI receiving port, can
To be to disconnect the HDMI_+5V input pin of external equipment and HDMI receiving port, it can also be that external equipment shuts down,
Or other possible situations, it is not limited thereto.
Wherein, when chip pin S1 is input pattern, the level height of 40 real-time monitoring chip pin S1 of master chip becomes
To change, external equipment is inserted into change with the level for extracting the HDMI_+5V input pin that can make HDMI input interface, correspondingly,
The level of chip pin S1 can also change.Respective handling is carried out when level changes, specifically, as chip pin S1
Level high level is become from low level, then process of starting to work (3)；When the level of chip pin S1 becomes low electricity from high level
It is flat, then process of starting to work (7)；If level does not change, 40 cycle detection of master chip is not processed.
A kind of display device, mainboard and control method provided in an embodiment of the present invention, mainboard include: Port detecting circuit with
Master chip；Port detecting circuit includes: control circuit, the first bleeder circuit and the second bleeder circuit；Control circuit can be
Under the control of the signal of chip pin, by the first signal end and ground terminal on or off；First bleeder circuit can be according to
The signal at binary signal end adjusts the signal of the first signal end；Second bleeder circuit can adjust core according to the signal at second signal end
The signal of piece pin, master chip are used to detect or adjust the signal of chip pin.Mainboard provided in an embodiment of the present invention and display
Device can only be multiplexed the chip pin of a master chip by the mutual cooperation of foregoing circuit and element, and pass through the
The signal at binary signal end adjusts the signal of the first signal end.In this way when external equipment is inserted on mainboard, it may be implemented pair
Whether external equipment, which is inserted into, is detected.Also, due to the chip pin for being only multiplexed a master chip, reduce chip pin
Usage quantity, so as to so that master chip pin quantity reduce either will be originally used for detection external equipment whether insert
The chip pin entered as other function carry out using.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (10)
1. a kind of display device, comprising: mainboard, which is characterized in that the mainboard includes: Port detecting circuit and master chip；Institute
Stating Port detecting circuit includes: control circuit, the first bleeder circuit and the second bleeder circuit；Wherein,
The control circuit is electrically connected with the first signal end, the chip pin of the master chip and ground terminal respectively；The control
Circuit is used under the control of the signal of the chip pin, by first signal end and the ground terminal on or off；
First bleeder circuit is electrically connected with first signal end, second signal end respectively；First bleeder circuit is used
In the signal for adjusting first signal end according to the signal at the second signal end；
Second bleeder circuit is electrically connected with the chip pin, the second signal end respectively；Second bleeder circuit
For adjusting the signal of the chip pin according to the signal at the second signal end；
The master chip is used to detect or adjust the signal of the chip pin.
2. display device as described in claim 1, which is characterized in that the control circuit includes: switching tube, first resistor；
Wherein, the first end of the switching tube is electrically connected with first signal end, the control terminal of the switching tube and first electricity
The first end of resistance is electrically connected, and the second end of the switching tube is electrically connected with the ground terminal；The second end of the first resistor with
The chip pin electrical connection.
3. display device as claimed in claim 2, which is characterized in that the switching tube includes: triode；Wherein, described three
First end of the collector of pole pipe as the switching tube, second end of the emitter of the triode as the switching tube,
Control terminal of the base stage of the triode as the switching tube.
4. display device as described in claim 1, which is characterized in that first bleeder circuit includes: second resistance；Its
In, the first end of the second resistance is electrically connected with the second signal end, the second end of the second resistance and described first
Signal end electrical connection.
5. display device as described in claim 1, which is characterized in that second bleeder circuit includes: 3rd resistor；Its
In, the first end of the 3rd resistor is electrically connected with the second signal end, the second end of the 3rd resistor and the chip
Pin electrical connection.
6. display device as described in claim 1, which is characterized in that first signal end is the first input of HDMI interface
Signal end；
The second signal end is the second input signal end of the HDMI interface；
The chip pin is the universal input and output pin of the master chip.
7. display device as claimed in any one of claims 1 to 6, which is characterized in that the display device is television set.
8. a kind of mainboard characterized by comprising Port detecting circuit and master chip；The Port detecting circuit includes: control
Circuit, the first bleeder circuit and the second bleeder circuit；Wherein,
The control circuit is electrically connected with the first signal end, the chip pin of the master chip and ground terminal respectively；The control
Circuit is used under the control of the signal of the chip pin, by first signal end and the ground terminal on or off；
First bleeder circuit is electrically connected with first signal end, second signal end respectively；First bleeder circuit is used
In the signal for adjusting first signal end according to the signal at the second signal end；
Second bleeder circuit is electrically connected with the chip pin, the second signal end respectively；Second bleeder circuit
For adjusting the signal of the chip pin according to the signal at the second signal end；
The master chip is used to detect or adjust the signal of the chip pin.
9. a kind of control method of mainboard as claimed in claim 8 characterized by comprising first stage, second stage and
Three stages；
In the first stage, configuring the chip pin is input pattern；
In the second stage, high level is loaded to the second signal end, first bleeder circuit is according to second letter
The high level at number end adjusts the signal of first signal end, and second bleeder circuit is according to the height electricity at the second signal end
The signal of the whole chip pin of Heibei provincial opera；
The master chip becomes high level from low level according to the signal of the chip pin, configures the chip pin to defeated
Mode out；
The master chip drags down the level of the signal of the chip pin, low electricity of the control circuit in the chip pin
Under flat control, end first signal end and ground terminal；And first bleeder circuit is according to the second signal
The high level at end adjusts the signal of first signal end, makes the first signal end high level；
After the first preset time, the level of the signal of the chip pin is drawn high, and configures the chip pin to
Input pattern；
In the phase III, low level is loaded to the second signal end, first bleeder circuit is according to second letter
The low level at number end adjusts the signal of first signal end, and second bleeder circuit is according to the low electricity at the second signal end
The signal of the whole chip pin of Heibei provincial opera；
The master chip becomes low level from high level according to the signal of the chip pin, configures the chip pin to defeated
Mode out；
The master chip draws high the level of the signal of chip pin, high level of the control circuit in the chip pin
Under control, first signal end is connected with ground terminal；And first bleeder circuit is according to the low electricity of the ground terminal
The signal of whole first signal end of Heibei provincial opera, makes the first signal end low level；
After the second preset time, input pattern is configured by chip pin.
10. control method as claimed in claim 9, which is characterized in that described to load high level, tool to the second signal end
Body includes:
External equipment is electrically connected with mainboard, to load high level to the second signal end by the external equipment；
In the second stage, in first preset time, control signal in the external equipment and the mainboard into
Row data interaction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910867342.6A CN110493551B (en) | 2019-09-12 | 2019-09-12 | Display device, main board and control method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910867342.6A CN110493551B (en) | 2019-09-12 | 2019-09-12 | Display device, main board and control method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110493551A true CN110493551A (en) | 2019-11-22 |
| CN110493551B CN110493551B (en) | 2021-11-16 |
Family
ID=68557897
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910867342.6A Active CN110493551B (en) | 2019-09-12 | 2019-09-12 | Display device, main board and control method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110493551B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021223460A1 (en) * | 2020-05-08 | 2021-11-11 | 深圳Tcl数字技术有限公司 | Machine core main board and display device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201215981Y (en) * | 2008-06-16 | 2009-04-01 | 青岛海信电器股份有限公司 | Control circuit and television having the control circuit |
| CN103259999A (en) * | 2012-02-20 | 2013-08-21 | 联发科技（新加坡）私人有限公司 | Hot plug detection (HPD) signal output control method and high definition multimedia interface (HDMI) receiving end device and system |
-
2019
- 2019-09-12 CN CN201910867342.6A patent/CN110493551B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201215981Y (en) * | 2008-06-16 | 2009-04-01 | 青岛海信电器股份有限公司 | Control circuit and television having the control circuit |
| CN103259999A (en) * | 2012-02-20 | 2013-08-21 | 联发科技（新加坡）私人有限公司 | Hot plug detection (HPD) signal output control method and high definition multimedia interface (HDMI) receiving end device and system |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021223460A1 (en) * | 2020-05-08 | 2021-11-11 | 深圳Tcl数字技术有限公司 | Machine core main board and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110493551B (en) | 2021-11-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10382803B2 (en) | Display device and signal source switching method | |
| US9329672B2 (en) | High-definition multimedia interface (HDMI) receiver apparatuses, HDMI systems using the same, and control methods therefor | |
| CN102097050B (en) | A kind of apparatus and method realizing display seamless switching | |
| US8352660B2 (en) | Portable computer capable of connecting discrete graphics card to PCIe controller by combination switch | |
| TWI525531B (en) | Electronic device and video data receiving method thereof | |
| US20170337151A1 (en) | System for Implementing MXM on a PCI Card | |
| CN104683714A (en) | Time sequence control method of two-stage V-BY-ONE signal system | |
| CN103546741A (en) | Hot plugging detection method and device | |
| US20110249409A1 (en) | Computer motherboard | |
| CN111031371A (en) | Single-line screen projection system and method | |
| CN110493551A (en) | A kind of display device, mainboard and control method | |
| CN208384970U (en) | Liquid crystal display panel driving circuit, driving board card, liquid crystal display screen and intelligent mirror | |
| CN105991953A (en) | Video signal processing method and electronic equipment | |
| CN107331353B (en) | Back-light source control system and method and liquid crystal display device | |
| US7864137B2 (en) | Burning system having print interface for liquid crystal display | |
| CN208507112U (en) | Display module identification device and display equipment | |
| US9722444B2 (en) | Electronic device and charging interface | |
| US11842704B2 (en) | Mainboard with at least two interfaces to boost performance for connecting different displays and the related device and method | |
| CN104182189A (en) | Electronic equipment and information-processing method | |
| CN202041946U (en) | Display circuit module | |
| US20130117491A1 (en) | Electronic device and control method thereof | |
| US20170220069A1 (en) | Docking apparatus and control method thereof | |
| CN202798972U (en) | HDMI (high-definition multimedia interface) recognition circuit and television | |
| CN110012253A (en) | A kind of server start process video display optimization method | |
| CN203433457U (en) | Power supply control system of display |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: 266555 Qingdao economic and Technological Development Zone, Shandong, Hong Kong Road, No. 218 Applicant after: Hisense Visual Technology Co., Ltd. Address before: 266555 Qingdao economic and Technological Development Zone, Shandong, Hong Kong Road, No. 218 Applicant before: QINGDAO HISENSE ELECTRONICS Co.,Ltd. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant |