CN110391941B - Method for receiving and transmitting data by circuit board, circuit board and storage medium - Google Patents

Method for receiving and transmitting data by circuit board, circuit board and storage medium Download PDF

Info

Publication number
CN110391941B
CN110391941B CN201910690324.5A CN201910690324A CN110391941B CN 110391941 B CN110391941 B CN 110391941B CN 201910690324 A CN201910690324 A CN 201910690324A CN 110391941 B CN110391941 B CN 110391941B
Authority
CN
China
Prior art keywords
port
circuit board
state
data
receiving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201910690324.5A
Other languages
Chinese (zh)
Other versions
CN110391941A (en
Inventor
郭军勇
孟庆晓
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Genew Technologies Co Ltd
Original Assignee
Shenzhen Genew Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Genew Technologies Co Ltd filed Critical Shenzhen Genew Technologies Co Ltd
Priority to CN201910690324.5A priority Critical patent/CN110391941B/en
Publication of CN110391941A publication Critical patent/CN110391941A/en
Application granted granted Critical
Publication of CN110391941B publication Critical patent/CN110391941B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/06Management of faults, events, alarms or notifications
    • H04L41/0654Management of faults, events, alarms or notifications using network fault recovery
    • H04L41/0663Performing the actions predefined by failover planning, e.g. switching to standby network elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The invention discloses a method for receiving and transmitting data by a circuit board, the circuit board and a storage medium, wherein the method for receiving and transmitting data by the circuit board is applied to a circuit, the circuit board is provided with a network switch sheet for connecting a network, the network switch sheet is provided with a first port and a second port, and the method for receiving and transmitting data by the circuit board comprises the following steps: receiving and transmitting data through the first port, and monitoring the state of the first port; when the state of the first port is a fault, detecting the state of the second port; and when the state of the second port is normal, switching to receiving and transmitting data through the second port. According to the invention, the standby network port is provided for the circuit board, so that the circuit board can be switched to the standby network port for receiving and transmitting data when the current network port fails in network connection, the redundant protection of the network port for receiving and transmitting data of the circuit board is realized, and the reliability of the data receiving and transmitting function of the circuit board is improved.

Description

Method for receiving and transmitting data by circuit board, circuit board and storage medium
Technical Field
The present invention relates to the field of circuit board technologies, and in particular, to a method for transceiving data by a circuit board, and a storage medium.
Background
In a circuit board for performing data Processing, a DSP (Digital Signal Processing) chip provided on the circuit board generally encodes and decodes a packet, and then transmits and receives the packet through a network port. Because the service function of the circuit board is single, the probability of the circuit board per se failing is low, but because the circuit board needs to process a large amount of data streams, the requirement on a network is high, and the probability of the network connection failing is relatively high. In the existing product, the circuit board is only provided with one network port, and the network port is not designed redundantly, so that when the network connection of the network port fails, the service function of the circuit board fails, and the reliability of the data receiving and transmitting function of the circuit board is low.
Thus, there is still a need for improvement and development of the prior art.
Disclosure of Invention
The present invention provides a method for receiving and transmitting data by a circuit board, a circuit board and a storage medium, aiming at solving the problem that the reliability of the data receiving and transmitting function is low because no standby network port is provided in the circuit board in the prior art.
The technical scheme of the invention is as follows:
in a first aspect, an embodiment of the present invention provides a method for a circuit board to receive and transmit data, where a network switch chip for connecting to a network is disposed on the circuit board, and the network switch chip is provided with a first port and a second port, and the method for the circuit board to receive and transmit data includes:
receiving and transmitting data through the first port, and monitoring the state of the first port;
when the state of the first port is a fault, detecting the state of the second port;
and when the state of the second port is normal, switching to receiving and transmitting data through the second port.
The method for transceiving data by the circuit board, wherein transceiving data by the first port specifically includes:
and the DSP chip which is connected with the network switch chip is controlled to be connected with a network through the first port, and the data sent from the outside of the circuit board is received and sent to the outside of the circuit board through the network.
The method for receiving and transmitting data by the circuit board, wherein the monitoring the state of the first port specifically includes:
monitoring a physical state and a logical state of the first port.
The method for receiving and transmitting data by the circuit board, wherein the monitoring of the physical state and the logical state of the first port specifically includes:
reading a physical state of the first port in a register of the network switch slice;
and controlling the DSP chip to determine the logic state of the first port through a PING command.
The method for receiving and transmitting data by the circuit board, wherein the step of controlling the DSP chip to determine the logic state of the first port through a PING command specifically includes:
controlling the DSP chip to send a first data packet to a gateway of a network connected with the first port through a PING command every second preset time, and receiving a second data packet corresponding to the first data packet returned by the gateway;
and when the DSP chip cannot receive the second data packet for three times continuously, determining that the logic state of the first port is a fault.
The method for transceiving data by the circuit board, wherein when the state of the first port is a fault, the detecting the state of the second port specifically includes:
and when the physical state and/or the logic state of the first port is a fault, detecting the physical state and the logic state of the second port.
The method for transceiving data by the circuit board, wherein the detecting the physical state and the logical state of the second port specifically includes:
reading a physical state of the second port in a register of the network switch slice;
and the CPU controlling the circuit board determines the logic state of the second port through a PING command.
The method for transceiving data by the circuit board, wherein when the state of the second port is normal, switching to transceiving data by the second port specifically includes:
and when the physical state and the logic state of the second port are both normal, controlling the DSP to be connected with the network through the second port, and receiving data sent from the outside of the circuit board and sending data to the outside of the circuit board through the network.
In a second aspect, an embodiment of the present invention provides a circuit board, where the circuit board includes: the CPU is used for loading instructions to execute the method for transceiving data by the circuit board.
In a third aspect, an embodiment of the present invention further provides a storage medium, where the storage medium stores a plurality of instructions, and the instructions are adapted to be loaded by a processor and to perform the steps of the method for transceiving data by a circuit board according to any one of the above.
The invention has the technical effects that: according to the method for receiving and transmitting the data of the circuit board, the standby network port is provided for the circuit board, so that the circuit board can be switched to the standby network port to receive and transmit the data when the current network port fails in network connection, the network port for receiving and transmitting the data of the circuit board is subjected to redundancy protection, and the reliability of the function of receiving and transmitting the data of the circuit board is improved.
Drawings
Fig. 1 is a flowchart of a first embodiment of a method for transceiving data by a circuit board according to the present invention;
fig. 2 is a schematic diagram of a circuit board for transceiving data according to a first embodiment of a method for transceiving data by a circuit board according to the present invention;
fig. 3 is a schematic diagram of a method for transceiving data through a first port according to a first embodiment of the present invention;
FIG. 4 is a diagram illustrating a method for transceiving data through a second port according to a first embodiment of the present invention
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer and clearer, the present invention is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Example one
Referring to fig. 1, fig. 1 is a flowchart of a preferred embodiment of the present invention, in the first embodiment, the method for transceiving data by a circuit board is applied to a media board in a VoIP (Voice over Internet Protocol, Voice over IP) system, and it should be noted that, here, the method for transceiving data by a circuit board is only one embodiment of the present invention, and the method for transceiving data by a circuit board provided by the present invention is not limited to be applied to a media board in the VoIP system, but may be applied to other circuit boards having data transceiving service, for example, a data processing board of a VoLTE (Voice over Long-Term Evolution) system, a data processing board of a Video over Long-Term Evolution (Video over Long-Term Evolution, Video call) system, and the like.
In a first embodiment, a network switch chip for connecting a network is disposed on the circuit board, and the network switch chip has a first port and a second port, referring to fig. 1, the method for transceiving data by the circuit board includes:
s100, receiving and sending data through the first port, and monitoring the state of the first port.
Specifically, the circuit board, that is, the media board is provided with a CPU (Central Processing Unit) for receiving an instruction of a control board and sending an instruction to other components on the circuit board, so that the other components execute corresponding actions; a DSP (Digital Signal Processing) chip is used for coding and decoding data packets; LSW (Lan Switch, network Switch slice) is used to connect networks.
Specifically, the LSW is provided with a network port for connecting a network, and in this embodiment, the LSW is provided with two ports: a first port and a second port. As shown in FIG. 2, the first port is connected to a first switch (shown as L2)1Shown), the first switch is connected to a first router (shown as L3)1Represents) then connects to a Gateway (Gateway), in this embodiment a Media Gateway (MGW) for the Media board, to enable connection to an external network. The second port is connected to a second switch (shown as L2)2Shown), the first switch is connected to a first router (shown as L3)2Representation) then connects to the gateway. The first router and the second router support HSRP (Hot Standard R)outer protocol, hot standby router protocol).
The CPU is connected to the DSP chip and is connected to the network switch chip, preferably, the CPU is also connected to the DSP chip through the network switch chip, so that the CPU can send instructions to the DSP chip and the network switch chip. Preferably, as shown in fig. 2, in this embodiment, the CPU and the DSP chip are connected through the network switch, so that the CPU and the DSP chip only need to provide one interface to implement two-by-two communication of three components without more interfaces.
When the method for transceiving data by a circuit board according to the present invention is implemented, as shown in fig. 3, the CPU controls the DSP chip connected to the network switch chip to connect to a network through the first port, and receives data transmitted from the outside of the circuit board and transmits data to the outside of the circuit board through the network. Specifically, for the media board in the VoIP system of this embodiment, the other end of the voice transmission sends an RTP (Real-time Transport protocol) packet to the media board through the network, the media board receives the RTP packet through the first port and transmits the RTP packet to the DSP chip, the DSP chip decodes the RTP packet to obtain information stored therein, which is a process of receiving data, and when the media board needs to send data, the data is encoded through the DSP chip to form an RTP packet, and the RTP packet is sent out through the network connected to the first port, which is a process of sending.
When the circuit board receives and transmits data through the first port, monitoring the state of the first port, specifically, monitoring the physical state and the logical state of the first port. The following describes the specific monitoring modes of these two states:
for the physical state of the first port, the CPU may directly read the register of the network switch chip. This is the prior art and will not be described herein. Specifically, the physical state of the first port may be read once at regular intervals, for example, 100ms, 150ms, and the like. And when the read physical state of the first port is a fault, data cannot be transmitted and received through the first port.
As for the logic state of the first port, in this embodiment, the DSP chip is controlled to determine through a PING (Packet Internet Groper Internet Packet explorer) command.
Specifically, the PING command is a network fault diagnosis tool, in this embodiment, the DSP chip sends a first data packet to the gateway connected to the first port through the PING command at preset intervals, and requests the gateway to return a second data packet corresponding to the first data packet through the PING command, and when the DSP chip can receive the second data packet corresponding to the first data packet, it indicates that the network connection between the DSP chip and the gateway is normal. In the present invention, when the DSP chip cannot receive the second data packet for three consecutive times, it is determined that the logic state of the first port is a failure, where a person skilled in the art may set the preset time, such as 1s, 0.5s, etc., according to an actual situation, which is not specifically limited in the present invention. It can be seen that, when the logic state of the first port is a failure, it indicates that the path connecting the first port to the gateway cannot implement data transmission, that is, the network connection of the first port to the gateway has failed.
In this embodiment, after the step S100, receiving and sending data through the first port, and monitoring the state of the first port, the method further includes the steps of:
s200, when the state of the first port is a fault, detecting the state of the second port.
And when the physical state and/or the logic state of the first port is a fault, the DSP chip can not realize data receiving and sending through the normal connection network of the first port any more, and at the moment, the state of the second port is detected. Similarly, the state of the second port includes a physical state and a logical state of the second port.
And for the physical state of the second port, the physical state is obtained by directly reading the register of the network switch chip by the CPU. Specifically, the physical state of the first port may be read once at regular intervals, for example, 100ms, 150ms, and the like.
For the logic state of the second port, since the DSP chip is connected to the first port at this time, the logic state of the second port cannot be detected by the DSP chip, and thus, when the logic state of the second port is detected, it is determined by the CPU through a PING command. Specifically, the CPU sends a third data packet to the gateway connected to the second port through a PING command at preset intervals, and requests the gateway to return a fourth data packet corresponding to the third data packet through the PING command, and when the CPU can receive the fourth data packet corresponding to the third data packet, it indicates that the network connection between the CPU and the gateway is normal. In the present invention, when the CPU cannot receive the fourth data packet for three consecutive times, it is determined that the logic state of the second port is a failure, where a person skilled in the art may set the preset time, such as 1s, 0.5s, and the like, according to an actual situation, and the present invention also does not specifically limit this.
The first embodiment further comprises the steps of:
and S300, when the state of the second port is normal, switching to receiving and transmitting data through the second port.
As can be seen from the foregoing description of the physical state and the logical state, data can be transmitted and received through the network port only when the physical state and the logical state of the corresponding network port are both normal.
Therefore, when it is detected that the physical state and the logic state of the second port are both normal, as shown in fig. 4 (fig. 4 shows a case where the logic state of the first port is a failure due to a failure of the first switch), the CPU controls the DSP not to send and receive data through the first port any more, but controls the DSP to receive data sent from outside the circuit board and send data to outside the circuit board through a network connected to the second port.
If it is detected that the physical state and/or the logic state of the second port is a fault, it indicates that the circuit board cannot implement data transceiving through the second port, at this time, switching of the network ports is not performed, but the step of monitoring the state of the first port is re-performed, and data transceiving is implemented through the network port in a normal state until the state of the first port or the second port is normal.
It should be noted that, although in the first embodiment, two network ports are arranged on the network switch chip, the present invention is not limited to only two network ports, in practical applications, a plurality of network ports may be arranged on the network switch chip, and when one of the network ports is in a failure state, the state of the other network port is detected, and the network port in a normal state is switched to implement data transceiving.
In summary, the present invention provides a method for receiving and transmitting data by a circuit board, which provides a standby network port for the circuit board, so that the circuit board can be switched to the standby network port to receive and transmit data when the current network port fails in network connection, thereby implementing redundancy protection for the network port of the circuit board to receive and transmit data, and improving the reliability of the function of the circuit board to receive and transmit data.
It should be understood that, although the steps in the flowchart of fig. 1 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a portion of the steps in fig. 1 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
Example two
With reference to the first embodiment, the present invention further provides a circuit board, including: the system comprises a CPU, a DSP chip and a network switch chip, wherein the CPU is used for loading instructions to execute the following steps:
receiving and transmitting data through the first port, and monitoring the state of the first port;
when the state of the first port is a fault, detecting the state of the second port;
and when the state of the second port is normal, switching to receiving and transmitting data through the second port.
The method for transceiving data by the circuit board, wherein transceiving data by the first port specifically includes:
and the DSP chip which is connected with the network switch chip is controlled to be connected with a network through the first port, and the data sent from the outside of the circuit board is received and sent to the outside of the circuit board through the network.
The method for receiving and transmitting data by the circuit board, wherein the monitoring the state of the first port specifically includes:
monitoring a physical state and a logical state of the first port.
The method for receiving and transmitting data by the circuit board, wherein the monitoring of the physical state and the logical state of the first port specifically includes:
reading a physical state of the first port in a register of the network switch slice;
and controlling the DSP chip to determine the logic state of the first port through a PING command.
The method for receiving and transmitting data by the circuit board, wherein the step of controlling the DSP chip to determine the logic state of the first port through a PING command specifically includes:
controlling the DSP chip to send a first data packet to a gateway of a network connected with the first port through a PING command every second preset time, and receiving a second data packet corresponding to the first data packet returned by the gateway;
and when the DSP chip cannot receive the second data packet for three times continuously, determining that the logic state of the first port is a fault.
The method for transceiving data by the circuit board, wherein when the state of the first port is a fault, the detecting the state of the second port specifically includes:
and when the physical state and/or the logic state of the first port is a fault, detecting the physical state and the logic state of the second port.
The method for transceiving data by the circuit board, wherein the detecting the physical state and the logical state of the second port specifically includes:
reading a physical state of the second port in a register of the network switch slice;
and the CPU controlling the circuit board determines the logic state of the second port through a PING command.
The method for transceiving data by the circuit board, wherein when the state of the second port is normal, switching to transceiving data by the second port specifically includes:
and when the physical state and the logic state of the second port are both normal, controlling the DSP to be connected with the network through the second port, and receiving data sent from the outside of the circuit board and sending data to the outside of the circuit board through the network.
EXAMPLE III
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, databases, or other media used in embodiments provided herein may include non-volatile and/or volatile memory. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
It is to be understood that the invention is not limited to the examples described above, but that modifications and variations may be effected thereto by those of ordinary skill in the art in light of the foregoing description, and that all such modifications and variations are intended to be within the scope of the invention as defined by the appended claims.

Claims (4)

1. A method for receiving and transmitting data by a circuit board is characterized in that the method for receiving and transmitting data by the circuit board is applied to the circuit board, a network switch sheet for connecting a network is arranged on the circuit board, a first port and a second port are arranged on the network switch sheet, and the method for receiving and transmitting data by the circuit board comprises the following steps:
receiving and transmitting data through the first port, and monitoring the state of the first port;
when the state of the first port is a fault, detecting the state of the second port;
when the state of the second port is normal, switching to receiving and sending data through the second port;
the receiving and sending data through the first port specifically includes:
controlling a DSP chip connected with the network switch chip to be connected with a network through the first port, and receiving data sent from the outside of the circuit board and sending data to the outside of the circuit board through the network;
the monitoring the state of the first port specifically includes:
monitoring the physical state and the logic state of the first port;
the monitoring the physical state and the logic state of the first port specifically includes:
reading a physical state of the first port in a register of the network switch slice;
controlling the DSP chip to determine the logic state of the first port through a PING command;
the CPU on the circuit board is connected with the DSP chip through the network switch chip;
the DSP chip decodes the RTP packet after receiving the RTP packet and encodes the data to form the RTP packet when the data needs to be sent out;
the controlling the DSP chip to determine the logic state of the first port through a PING command specifically includes:
controlling the DSP chip to send a first data packet to a gateway connected with the first port through a PING command every preset time, and receiving a second data packet corresponding to the first data packet returned by the gateway;
when the DSP chip cannot receive the second data packet for three times continuously, determining that the logic state of the first port is a fault;
when the state of the first port is a fault, detecting the state of the second port specifically includes:
when the physical state and/or the logic state of the first port is a fault, detecting the physical state and the logic state of the second port;
the detecting the physical state and the logical state of the second port specifically includes:
reading a physical state of the second port in a register of the network switch slice;
and the CPU controlling the circuit board determines the logic state of the second port through a PING command.
2. The method for transceiving data on a circuit board according to claim 1, wherein the switching to transceiving data through the second port when the status of the second port is normal specifically comprises:
and when the physical state and the logic state of the second port are both normal, controlling the DSP to be connected with the network through the second port, and receiving data sent from the outside of the circuit board and sending data to the outside of the circuit board through the network.
3. A circuit board, comprising: a CPU, a DSP chip, and a network switch, the CPU to load instructions to perform the method of transceiving data by the circuit board of any of claims 1-2.
4. A storage medium storing a plurality of instructions adapted to be loaded by a processor and to perform the steps of the method for transceiving data by a circuit board according to any of claims 1-2.
CN201910690324.5A 2019-07-29 2019-07-29 Method for receiving and transmitting data by circuit board, circuit board and storage medium Active CN110391941B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910690324.5A CN110391941B (en) 2019-07-29 2019-07-29 Method for receiving and transmitting data by circuit board, circuit board and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910690324.5A CN110391941B (en) 2019-07-29 2019-07-29 Method for receiving and transmitting data by circuit board, circuit board and storage medium

Publications (2)

Publication Number Publication Date
CN110391941A CN110391941A (en) 2019-10-29
CN110391941B true CN110391941B (en) 2022-04-19

Family

ID=68287884

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910690324.5A Active CN110391941B (en) 2019-07-29 2019-07-29 Method for receiving and transmitting data by circuit board, circuit board and storage medium

Country Status (1)

Country Link
CN (1) CN110391941B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114501172B (en) * 2020-11-11 2024-07-23 荣群电讯股份有限公司 Telecommunication grade network exchanger

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101877631A (en) * 2010-06-28 2010-11-03 中兴通讯股份有限公司 Server and business switching method thereof
CN104753710A (en) * 2013-12-30 2015-07-01 北京大唐高鸿软件技术有限公司 Main/standby switching system and method of dual-wan PORT network apparatus
CN106850423A (en) * 2015-12-04 2017-06-13 北京东土军悦科技有限公司 A kind of pair of fast replacing method and device of network port device
CN106952650A (en) * 2017-02-28 2017-07-14 大连理工大学 A kind of train voice amplifying unit based on ARM+FPGA frameworks
US10291464B1 (en) * 2012-12-31 2019-05-14 Juniper Networks, Inc. Separation of control plane functions using virtual machines in network device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7391719B2 (en) * 2002-07-15 2008-06-24 Sixnet, Llc Redundant network interface for ethernet devices
CN102347896B (en) * 2011-07-14 2015-01-07 广州海格通信集团股份有限公司 Ethernet-based platform for loading FPGA (Field Programmable Gate Array) and DSP (Digital Signal Processor) and implementation method thereof
CN105553883A (en) * 2014-10-28 2016-05-04 江苏绿扬电子仪器集团有限公司 Multi-DSP data exchange apparatus based on FPGA

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101877631A (en) * 2010-06-28 2010-11-03 中兴通讯股份有限公司 Server and business switching method thereof
US10291464B1 (en) * 2012-12-31 2019-05-14 Juniper Networks, Inc. Separation of control plane functions using virtual machines in network device
CN104753710A (en) * 2013-12-30 2015-07-01 北京大唐高鸿软件技术有限公司 Main/standby switching system and method of dual-wan PORT network apparatus
CN106850423A (en) * 2015-12-04 2017-06-13 北京东土军悦科技有限公司 A kind of pair of fast replacing method and device of network port device
CN106952650A (en) * 2017-02-28 2017-07-14 大连理工大学 A kind of train voice amplifying unit based on ARM+FPGA frameworks

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
一种智能变电站新型双网冗余设备及实现;谢黎等;《电力***保护与控制》;20190601(第11期);全文 *
基于IEC60870-5-103规约的保护装置冗余网络通信设计;郑飞等;《电力***保护与控制》;20101216(第24期);全文 *

Also Published As

Publication number Publication date
CN110391941A (en) 2019-10-29

Similar Documents

Publication Publication Date Title
US8339943B2 (en) Virtual router failover dampening
CN101350817B (en) Intelligent load balancing and failover of network traffic
JP5187249B2 (en) Redundant system connection recovery device, method and processing program
CN101350818B (en) Intelligent load balancing and failover of network traffic
TW200910840A (en) Intelligent load balancing and failover of network traffic
TWI410084B (en) Intelligent failover in a load-balanced networking environment
WO2019174390A1 (en) Industrial ethernet-based data transmission system and method, and communication device
US8713353B2 (en) Communication system including a switching section for switching a network route, controlling method and storage medium
US10541904B2 (en) Establishing a network fault detection session
US20210096939A1 (en) Fault Tolerance Processing Method, Apparatus, and Server
EP3930267A1 (en) Link aggregation port switching method, network device and computer storage medium
CN110391941B (en) Method for receiving and transmitting data by circuit board, circuit board and storage medium
CN111614553B (en) Communication method and device
US7978597B2 (en) Communication management system, communication management method, and communication management device
CN111490932B (en) Communication method and device
WO2019119269A1 (en) Network fault detection method and control center device
CN114584575B (en) Ship-shore communication method and system in ship management system
CN111934909B (en) Main-standby machine IP resource switching method, device, computer equipment and storage medium
JP5176914B2 (en) Transmission device and system switching method for redundant configuration unit
US11431623B2 (en) Method for configuring private line service, device, and storage medium
CN108933720B (en) Information processing method, device and system for ring system and storage medium
US9374315B2 (en) Spare resource election in a computing system
US20200084138A1 (en) Controller, method for adjusting flow rule, and network communication system
CN115883338B (en) Marine dual-redundancy network communication zero-frame-loss implementation method based on detention frame retransmission
CN112671639B (en) Port aggregation protocol traffic forwarding method, device, switch and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant