CN110365218B - PWM switching power supply control circuit and method with self-adaptive adjustment - Google Patents

PWM switching power supply control circuit and method with self-adaptive adjustment Download PDF

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Publication number
CN110365218B
CN110365218B CN201910746758.2A CN201910746758A CN110365218B CN 110365218 B CN110365218 B CN 110365218B CN 201910746758 A CN201910746758 A CN 201910746758A CN 110365218 B CN110365218 B CN 110365218B
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output
circuit
comparator
control circuit
output end
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CN110365218A (en
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冯开勇
杨光
陈西
李盼盼
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Wuxi Botong Microelectronics Technology Co ltd
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Wuxi Botong Microelectronics Technology Co ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33523Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention provides a PWM switching power supply control circuit with self-adaptive regulation and a method thereof, belonging to the technical field of microelectronics. The technical proposal is as follows: a PWM switching power supply control circuit with self-adaptive regulation comprises a variable gain network, an output state detection circuit, an error amplifier, a mode control circuit, a slope compensation circuit, a PWM logic circuit and a soft drive circuit. The beneficial effects of the invention are as follows: the periphery of the PWM switching power supply control circuit with the self-adaptive regulation can detect the output voltage state by only one resistor, and the loop gain, the working frequency and the working mode of the control circuit can be automatically regulated according to different output voltages, so that the optimal loop gain, the optimal working frequency and the optimal working mode can be realized under the output high voltage state and the output low voltage state, the conversion efficiency under different loads can be optimal, and the system conversion efficiency and the loop stability under different output voltage states can be greatly improved.

Description

PWM switching power supply control circuit and method with self-adaptive adjustment
Technical Field
The invention relates to the technical field of microelectronics, in particular to a PWM switching power supply control circuit with self-adaptive adjustment and a method thereof.
Background
Fast charge switching power supplies are an increasingly popular power supply device that may require a variety of output voltages for a variety of fast charge applications, with the output voltage being automatically adjusted to a target value based on received and transmitted handshaking protocol signals. These applications require that the primary control circuit, i.e. controlling the on and off of the primary power switching transistors, have optimal performance and conversion efficiency under different output voltage conditions, and conventional primary PWM control circuits typically do not have the capability to detect the system output voltage and make internal control adjustments thereto. This approach has obvious disadvantages: when a power engineer designs a system scheme, it is difficult to simultaneously consider system efficiency, loop response performance and the like under different output voltages, so that the system efficiency is reduced and a large amount of peripheral debugging work is caused.
How to solve the technical problems is the subject of the present invention.
Disclosure of Invention
The invention aims to provide a PWM switching power supply control circuit and a PWM switching power supply control method with self-adaptive adjustment, wherein the working mode, the working frequency, the loop gain and the like can be automatically adjusted according to detection signals, the detection signals can correspond to whether the output is in a low-voltage environment or a high-voltage environment, the self-adaptive adjustment can enable the conversion efficiency of a system under different output voltages and different loads to be optimal, the loop control is more stable, and therefore the debugging time of a power engineer is greatly saved.
The invention is realized by the following measures: a PWM switching power supply control circuit with self-adaptive regulation, wherein the PWM switching power supply control circuit comprises a rectifying circuit for inputting alternating current, a driving circuit connected to the output end of the rectifying circuit, an output filter circuit connected to the output end of the driving circuit, and a feedback circuit connected between the output filter circuit and the driving circuit;
the rectification circuit comprises a rectification bridge BR1 for rectifying an input alternating current power supply into direct current, and an input capacitor C1 connected to the output end of one bridge arm of the rectification bridge BR 1; typically, some filtering devices may be included that are required to meet the electromagnetic interference criteria.
The driving circuit comprises a transformer T1, a power switching tube M1, a control circuit, a starting resistor R1, a voltage detection resistor Rdet, a current sampling resistor R4, a power supply diode D1 and a power supply capacitor C2; depending on the design, the drive circuit may also include other elements that filter and meet the electromagnetic interference criteria.
The output filter circuit comprises an output rectifying diode D2 and an output capacitor C3, wherein the output rectifying diode D2 is connected between a secondary side winding of the transformer T1 and the output capacitor C3;
the feedback circuit comprises a current limiting resistor R5, an optocoupler and a protocol chip, wherein one end of the current limiting resistor R5 is connected to the positive end of the output capacitor C3, the other end of the current limiting resistor R5 is connected with one end of the input of the optocoupler, the other end of the input of the optocoupler is connected with one end of the input of the protocol chip, and one end of the output of the optocoupler is connected with the control circuit; the feedback circuit may also comprise other elements depending on the design.
As a further optimization scheme of the PWM switching power supply control circuit with self-adaptive regulation, the transformer T1 comprises a primary side winding of the transformer, a secondary side winding of the transformer and an auxiliary winding of the transformer;
the drain electrode of the power switch tube M1 is connected with one end of a primary side winding of the transformer T1, and the other end of the primary side winding of the transformer T1 is connected with an input capacitor C1; the source electrode end of the power switch tube M1 is connected with the resistor R4 and is used for sampling the current in the power switch tube M1;
the starting resistor R1 is connected between the positive end of the input capacitor C1 and the power supply capacitor C2, and the power supply capacitor C2 is also connected with the power supply input end of the control circuit and is used for supplying power to the control circuit;
the positive electrode of the power supply diode D1 is connected with one end of an auxiliary winding of the transformer T1, the other end of the auxiliary winding of the transformer T1 is connected with the reference ground, and the negative electrode of the power supply diode D2 is connected with the power supply capacitor C2;
one end of a primary side winding of the transformer T1 is connected with the positive electrode of the capacitor C1, and the other end of the primary side winding of the transformer T1 is connected with the drain electrode of the power switch tube M1;
one end of a secondary side winding of the transformer T1 is connected with the positive end of an output rectifying diode D2, the other end of the output rectifying diode is connected with one end of an output capacitor C3, and the other end of the secondary side winding of the transformer T1 is connected with the other end of the output capacitor.
As a further optimization scheme of the PWM switching power supply control circuit with self-adaptive regulation, one end of an auxiliary winding of the transformer T1 is connected with the anode of the power supply diode D1 and one end of the voltage detection resistor Rdet, the cathode of the power supply diode D1 is connected with the power supply capacitor C2, the other end of the voltage detection resistor Rdet is connected with the control circuit, and the other end of the auxiliary winding of the transformer T1 is grounded.
As a further optimization scheme of the PWM switching power supply control circuit with self-adaptive adjustment, the control circuit comprises a variable gain network, an output state detection circuit, an error amplifier, a mode control circuit, a pulse generator, a slope compensation circuit, a PWM logic circuit, a soft driving circuit, an OCP circuit and an internal power supply;
the output state detection circuit generates control signals of the variable gain network and the mode control circuit; the variable gain network generates an input signal of the error amplifier and a control signal of the mode control circuit;
the mode control circuit generates a control signal of the pulse generator;
the pulse generator generates an input signal of the slope compensation circuit and an input signal of the PWM logic circuit;
the PWM logic circuit generates an input signal of a soft drive circuit that controls the on and off of the power switch M1.
The variable gain network includes: the upper bias resistor R10, the diode D3, the voltage dividing resistor R11, the voltage dividing resistor R12, the voltage dividing resistor R13, the voltage dividing resistor R14, the switching tube M11, the switching tube M12, the switching tube M13, the switching tube M14, the switching tube M15, the switching tube M16, the switching tube M17, the inverter U1, the inverter U2, the inverter U3, the inverter U7, the NOR logic gate U4, the AND logic gate U5 and the AND logic gate U6.
As a further optimization scheme of the PWM switching power supply control circuit with self-adaptive adjustment, the output state detection circuit comprises: the resistor R20, the resistor R21, the resistor R22, the resistor R23 and the resistor R24, wherein the resistors R20, the resistor R21, the resistor R22, the resistor R23 and the resistor R24 have the same resistor type and the same width, and the lengths of the resistor R21, the resistor R22, the resistor R23 and the resistor R24 are all integral multiples of the resistor R20 or the resistor R21, the resistor R22, the resistor R23 and the resistor R24 are all formed by connecting n resistors R20 in series or in parallel;
the circuit further comprises NMOS switching tubes M21, M22 and M24, a PMOS switching tube M23, a capacitor C11, a capacitor C12, schmitt triggers U11 and U16, an inverter U12, an inverter U15, an AND logic gate U13, an AND logic gate U14 or a logic gate U17, current sources Ir0, ir1, ir2, ir3, ir4 and Ir5, and Ir1, ir2 and Ir3 are mirror current sources of Ir0, and a first comparator, a second comparator, a third comparator and a fourth comparator.
As a further optimization scheme of the PWM switching power supply control circuit with the self-adaptive regulation, the mode control circuit comprises a current synthesis controller and an FB voltage detection circuit, wherein the current synthesis controller comprises current sources Ir6, ir7 and Ir8, switches S1, S2 and S3, a current adder and a V-I control circuit, and the FB voltage detection circuit comprises a fifth comparator and a sixth comparator;
the negative terminals of the fifth comparator and the sixth comparator are connected with a terminal 204, and the voltage of the terminal 204 is V FB -V BE(D3) ,V FB For FB port voltage, V BE(D3) Is the forward voltage drop of diode D3; the fifth comparator input positive terminal is connected with the fourth reference voltage, the sixth comparator input positive terminal is connected with the fifth reference voltage, and the fourth reference voltage is larger than the fifth reference voltage.
As a further optimization scheme of the PWM switching power supply control circuit with self-adaptive adjustment, one output end of the variable gain network is connected with the negative input end of the error amplifier, and the other output end of the variable gain network is connected with the input end of the mode control circuit; one output end of the output state detection circuit is connected with the input end of the variable gain network, and the other output end of the output state detection circuit is connected with the input end of the mode control circuit;
the output end of the mode control circuit is connected with the input end of the pulse generator, one output end of the pulse generator is connected with the input end of the slope compensation circuit, and the other output end of the pulse generator is connected with the input end of the PWM logic circuit;
one output end of the OCP circuit is connected with the input end of the slope compensation circuit, and the other output end of the OCP circuit is connected with the PWM logic circuit;
the output end of the slope compensation circuit is connected with the positive input end of the error amplifier; the output end of the error amplifier is connected with the input end of the PWM logic circuit; the output end of the PWM logic circuit is connected with the input end of the soft driving circuit, and the output of the soft driving circuit controls the on and off of the power switch tube M1.
In order to better achieve the above object, the present invention further provides a control method of a PWM switching power supply control circuit with adaptive adjustment, specifically including the following steps:
1) Setting a voltage detection resistor Rdet at the pin periphery of the control circuit DET, wherein the current flowing through the voltage detection resistor Rdet and the internal reference currents Ir1, ir2, ir3 and Ir0 in the output state detection circuit respectively generate voltages on resistors R20, R21, R22, R23 and R24 which are of the same type and have proportional resistance values, and the voltages on the resistor R20 and the voltages on the resistors R21, R22, R23 and R24 are respectively compared by a first comparator to a fourth comparator to detect the output voltage state;
2) The mode control circuit detects in real time a signal from the variable gain network that characterizes the feedback pin FB voltage.
Further, the step 1) specifically includes the following steps:
(1) when the output voltage is low voltage output, the first comparator and the second comparator both output low level, the variable gain network adjusts the input gain impedance to R11+R14, and the mode control circuit controls the output frequency Switch1 of the pulse generator;
(2) when the output voltage is the medium voltage output, the first comparator outputs a high level, the second comparator outputs a low level, the variable gain network adjusts the input gain impedance to R11+R12+R14, and the mode control circuit controls the output frequency Switch2 of the pulse generator;
(3) when the output voltage is high voltage output, the first comparator and the second comparator both output high level, the variable gain network adjusts the input gain impedance to R11+R12+R13+R14, and the mode control circuit controls the output frequency Switch3 of the pulse generator;
further, the step 2) specifically includes the following steps:
(1) when the FB voltage is higher, the fifth comparator and the sixth comparator both output low level, and the mode control circuit controls the pulse generator to work in a fixed frequency mode;
(2) when the FB voltage is reduced to the high level output by the fifth comparator and the low level output by the sixth comparator, the mode control circuit controls the pulse generator to work in a frequency modulation mode;
(3) when the FB voltage is reduced to the high level output by the fifth comparator and the sixth comparator, the mode control circuit controls the pulse generator to work in the standby mode.
The beneficial effects of the invention are as follows: the periphery of the PWM switching power supply control circuit with the self-adaptive regulation can detect the output voltage state by only one resistor, and the loop gain, the working frequency and the working mode of the control circuit can be automatically regulated according to different output voltages, so that the optimal loop gain, the optimal working frequency and the optimal working mode can be realized under the output high voltage state and the output low voltage state, the conversion efficiency under different loads can be optimal, the system conversion efficiency and the loop stability under different output voltage states can be greatly improved for the quick charging switching power supply for providing various output voltages, the system debugging time is greatly shortened, and the PWM switching power supply has higher engineering application value.
Drawings
FIG. 1 is a schematic diagram of the overall system architecture of an embodiment of the present invention;
FIG. 2 is a circuit diagram of a PWM switching power supply control of the present invention;
FIG. 3 is a circuit diagram of a variable gain network in an example embodiment of the invention;
FIG. 4 is a diagram of an output state detection circuit of an embodiment of the present invention;
FIG. 5 is a schematic diagram of a mode control circuit according to an embodiment of the present invention;
FIG. 6 is a circuit diagram of a current combining controller according to an embodiment of the present invention;
FIG. 7 is a diagram of a FB voltage detection circuit in an embodiment of the present invention;
FIG. 8 is a timing diagram illustrating operation of an embodiment of the present invention;
fig. 9 is a flowchart of an example of an implementation of the present invention.
Wherein, the reference numerals are as follows: 1. a rectifying circuit; 2. a driving circuit; 3. an output filter circuit; 4. a feedback circuit; 5. and a control circuit.
Detailed Description
In order to clearly illustrate the technical characteristics of the scheme, the scheme is explained below through a specific embodiment.
Referring to fig. 1, the present invention is: a PWM switching power supply control circuit with adaptive regulation, wherein the control circuit comprises a rectifying circuit 1 for inputting alternating current, a driving circuit 2 connected to the output end of the rectifying circuit 1, an output filter circuit 4 connected to the output end of the driving circuit 2, and a feedback circuit 4 connected between the output filter circuit 3 and the driving circuit 2;
the rectifying circuit 1 comprises a rectifying bridge BR1 for rectifying an input alternating current power supply into direct current, and an input capacitor C1 connected to the output end of one bridge arm of the rectifying bridge BR 1; typically, some filtering devices may be included that are required to meet the electromagnetic interference criteria.
The driving circuit 2 comprises a transformer T1, a power switching tube M1, a control circuit 5, a starting resistor R1, a voltage detection resistor Rdet, a current sampling resistor R4, a power supply diode D1 and a power supply capacitor C2; depending on the design, the drive circuit 2 may also comprise further elements for filtering and for satisfying the electromagnetic interference criterion.
The output filter circuit 3 comprises an output rectifying diode D2 and an output capacitor C3, wherein the output rectifying diode D2 is connected between a secondary side winding of the transformer T1 and the output capacitor C3;
the feedback circuit 4 comprises a current limiting resistor R5, an optocoupler and a protocol chip, wherein one end of the current limiting resistor R5 is connected to the positive end of the output capacitor C3, the other end of the current limiting resistor R5 is connected with one end of the input of the optocoupler, the other end of the input of the optocoupler is connected with one end of the input of the protocol chip, and one end of the output of the optocoupler is connected with the control circuit 5; the feedback circuit 4 may also comprise other elements depending on the design.
Specifically, the transformer T1 includes a transformer primary side winding, a transformer secondary side winding, and a transformer auxiliary winding;
the drain electrode of the power switch tube M1 is connected with one end of a primary side winding of the transformer T1, and the other end of the primary side winding of the transformer T1 is connected with an input capacitor C1; the source electrode end of the power switch tube M1 is connected with the resistor R4 and is used for sampling the current in the power switch tube M1;
the starting resistor R1 is connected between the positive end of the input capacitor C1 and the power supply capacitor C2, and the power supply capacitor C2 is also connected with the power supply input end of the control circuit 5 and is used for supplying power to the control circuit 5;
the positive electrode of the power supply diode D1 is connected with one end of an auxiliary winding of the transformer T1, the other end of the auxiliary winding of the transformer T1 is connected with the reference ground, and the negative electrode of the power supply diode D2 is connected with the power supply capacitor C2;
one end of a primary side winding of the transformer T1 is connected with the positive electrode of the capacitor C1, and the other end of the primary side winding of the transformer T1 is connected with the drain electrode of the power switch tube M1;
one end of a secondary side winding of the transformer T1 is connected with the positive end of an output rectifying diode D2, the other end of the output rectifying diode is connected with one end of an output capacitor C3, and the other end of the secondary side winding of the transformer T1 is connected with the other end of the output capacitor.
Specifically, one end of the auxiliary winding of the transformer T1 is connected to the anode of the power supply diode D1 and one end of the voltage detection resistor Rdet, the cathode of the power supply diode D1 is connected to the power supply capacitor C2, the other end of the voltage detection resistor Rdet is connected to the control circuit 5, and the other end of the auxiliary winding of the transformer T1 is grounded.
Specifically, referring to fig. 2, the control circuit 5 includes a variable gain network, an output state detection circuit, an error amplifier, a mode control circuit, a pulse generator, a slope compensation circuit, a PWM logic circuit, a soft driving circuit, an OCP circuit, and an internal power supply;
the output state detection circuit generates control signals of the variable gain network and the mode control circuit; the variable gain network generates an input signal of the error amplifier and a control signal of the mode control circuit;
the mode control circuit generates a control signal of the pulse generator;
the pulse generator generates an input signal of the slope compensation circuit and an input signal of the PWM logic circuit;
the PWM logic circuit generates an input signal of a soft drive circuit that controls the on and off of the power switch M1.
Specifically, referring to fig. 3, the variable gain network includes: the upper bias resistor R10, the diode D3, the voltage dividing resistor R11, the voltage dividing resistor R12, the voltage dividing resistor R13, the voltage dividing resistor R14, the switching tube M11, the switching tube M12, the switching tube M13, the switching tube M14, the switching tube M15, the switching tube M16, the switching tube M17, the inverter U1, the inverter U2, the inverter U3, the inverter U7, the NOR logic gate U4, the AND logic gate U5 and the AND logic gate U6.
Specifically, referring to fig. 4, the output state detection circuit includes: the resistor R20, the resistor R21, the resistor R22, the resistor R23 and the resistor R24, wherein the resistors R20, the resistor R21, the resistor R22, the resistor R23 and the resistor R24 have the same resistor type and the same width, and the lengths of the resistor R21, the resistor R22, the resistor R23 and the resistor R24 are all integral multiples of the resistor R20 or the resistor R21, the resistor R22, the resistor R23 and the resistor R24 are all formed by connecting n resistors R20 in series or in parallel;
the circuit further comprises NMOS switching tubes M21, M22 and M24, a PMOS switching tube M23, a capacitor C11, a capacitor C12, schmitt triggers U11 and U16, an inverter U12, an inverter U15, an AND logic gate U13, an AND logic gate U14 or a logic gate U17, current sources Ir0, ir1, ir2, ir3, ir4 and Ir5, and Ir1, ir2 and Ir3 are mirror current sources of Ir0, and a first comparator, a second comparator, a third comparator and a fourth comparator.
Specifically, referring to fig. 5, 6 and 7, the mode control circuit includes a current synthesis controller including current sources Ir6, ir7 and Ir8, switches S1, S2 and S3, a current adder, a V-I control circuit, and an FB voltage detection circuit including a fifth comparator and a sixth comparator;
the negative terminals of the fifth comparator and the sixth comparator are connected with a terminal 204, and the voltage of the terminal 204 is V FB -V BE(D3) ,V FB For FB port voltage, V BE(D3) Is the forward voltage drop of diode D3; the fifth comparator input positive terminal is connected with the fourth reference voltage, the sixth comparator input positive terminal is connected with the fifth reference voltage, and the fourth reference voltage is larger than the fifth reference voltage.
Specifically, one output end of the variable gain network is connected with the negative input end of the error amplifier, and the other output end of the variable gain network is connected with the input end of the mode control circuit; one output end of the output state detection circuit is connected with the input end of the variable gain network, and the other output end of the output state detection circuit is connected with the input end of the mode control circuit;
the output end of the mode control circuit is connected with the input end of the pulse generator, one output end of the pulse generator is connected with the input end of the slope compensation circuit, and the other output end of the pulse generator is connected with the input end of the PWM logic circuit;
one output end of the OCP circuit is connected with the input end of the slope compensation circuit, and the other output end of the OCP circuit is connected with the PWM logic circuit;
the output end of the slope compensation circuit is connected with the positive input end of the error amplifier; the output end of the error amplifier is connected with the input end of the PWM logic circuit; the output end of the PWM logic circuit is connected with the input end of the soft driving circuit, and the output of the soft driving circuit controls the on and off of the power switch tube M1.
The invention has the following concrete contents when in actual use:
according to the working principle of the flyback switching power supply, when the primary side power switching tube is turned off, the auxiliary winding voltage Va and the output voltage Vo have correlation, and Va= (NA/NS) (vo+VF), wherein NA is the number of turns of the auxiliary winding, NS is the number of turns of the secondary side winding, and VF is the forward voltage drop of the secondary rectifying tube, so that the output voltage information can be detected by detecting Va information.
When the primary side power switch tube is turned off, peak voltage can appear on the auxiliary winding due to the existence of leakage inductance of the primary side winding of the transformer and parasitic parameters. In order to accurately acquire Va information, the primary side power switch tube is turned off and then delayed for a small time to acquire Va information.
Referring to fig. 8, in the period t0-t1, the PWM logic circuit outputs 207 a driving signal at high level, M22 is turned on, the upper level of the capacitor C11 is discharged at low level via M22, the schmitt trigger U11 is output at high level, the U12 is output at low level, the U13 is output at low level 301, the U15 is output at low level, M23 is turned on, the upper voltage of the capacitor C12 is at high level, the schmitt trigger U16 is output at low level, and the U17 is output at high level 302.
At time t1, 207 is turned from high to low, the U15 output is turned to high level, M23 is turned off, M24 is turned on, the capacitor C12 is discharged through M24 and the current source Ir5, the discharging current is Ir5, at the moment, the U16 output maintains low level, and the U17 output 302 is turned to low level; as the voltage on C12 decreases, the U16 output toggles high and the U17 output 302 goes high at time t 2.
At time t1, 207 is turned from high to low, M22 is turned off, the current source Ir4 starts to charge C11, at this time, the Schmitt trigger U11 maintains to output a high level, U12 outputs a high level, and U13 outputs a high level 301; as the voltage on capacitor C11 rises, the U11 output toggles low and the U13 output 301 goes low at time t 3.
At time t0-t1, 301 is low level, 302 is high level, U14 output Sample is low level, and M21 is cut off; at the time t1-t2, 301 is high level, 302 is low level, U14 outputs Sample low level, and M21 is cut off; at time t2-t3, 301 is high, 302 is high, U14 outputs Sample high, M21 is on, and signals are transmitted from DET to the inputs of comparators U18, U19, U20, U21. After time t3, before the primary side power switch tube of the next switching period is turned on, U13 outputs 301 low level, U14 outputs Sample low level, and M21 is turned off.
At time t2-t3, M21 is turned on and control circuit 5 gathers auxiliary winding voltage Va information via the DET pin. The current idet=va/(rdet+r20) flowing through DET pin, voltage V across R20 R20 R20/(rdet+r20) =idet×r20=r20=va×r21, voltage V across resistor R21 R21 =ir1×r21, voltage V on R20 R20 And voltage V on R21 R21 The comparison is made by a first comparator. Suppose 20<<Rdet, idet is determined mainly by Rdet. Internal setting Ir 0R 24<Ir1*R21<Ir2*R22<Ir 3R 23, r21=r20×n1, r22=r20×n2, r23=r20×n3, r24=r20×n4, ir1=ir0×m1, ir2=ir0×m2, ir3=ir0×m3, and the output state can be detected by comparing the relationship between Idet and Ir 0.
When n4 is Ir0< Idet < n1 is Ir0, the first comparator output 201 and the second comparator output 202 are both low, and the output state is low; when n1×m1×ir0< Idet < n2×m2×ir0, the first comparator output 201 is high, the second comparator output 202 is low, and the output state is medium voltage; when n2×m3×ir0< Idet < n3×m3×ir0, the first comparator output 201 is high, the second comparator output 202 is high, and the output state is high; when det > n3 x m3 x Ir0, the third comparator output Ovp is high and the output state is over voltage; when Idet < n4 Ir0, the fourth comparator output Short is high, and the output state is under voltage or Short circuit.
When 201 and 202 are both at low level, M11 and M12 are turned on, the input gain resistor is (R11+R14), when 201 is at high level and 202 is at low level, M11 is turned off, M12 is turned on, the input gain resistor is (R11+R12+R14), when 201 and 202 are both at high level, M11 and M12 are both turned off, and the input gain resistor is (R11+R12+R13+R14).
When 201, 202 are both low, S1, S2 are off, iosc=ir6; when 201 is high and 202 is low, S1 is closed and S2 is open, iosc=ir6+ir7; when 201, 202 are both high, S1, S2 are both closed, iosc=ir6+ir7+ir8.
When the voltage 204 is greater than the fourth reference voltage Vref4, namely the FB port voltage V FB >Vref4+V BE(D3) The fifth and sixth comparator outputs 401, 402 are both low, M13 is on, and the FB signal is transmitted to 203 output via the variable gain network. Different Iosc are generated according to different states of 201 and 202, and the output 209 of the Iosc is used for controlling the frequency of the pulse generator after passing through the V-I control circuit 5, at the moment, S3 is disconnected, and the pulse generator works in a fixed frequency mode; when 201, 202 are both low, the pulser outputs frequency Switch1, when 201 is high, 202 is low, the pulser outputs frequency Switch2, and when 201, 202 are both high, the pulser outputs frequency Switch3.
When the voltage 204 is smaller than the fourth reference voltage Vref4 and larger than the fifth reference voltage Vref5, namely the FB port voltage Vref5+V BE(D3) <V FB <Vref4+V BE(D3) The fifth comparator output 401 is high and the sixth comparator output 402 is low, M13 is on, and the R11 and R12 junction voltage is transferred to the 203 output. Different Iosc are generated according to the different states of 201, 202,the output 209 of the Iosc after passing through the V-I control circuit 5 controls the frequency of the pulse generator, at this time, S3 is closed, the 204 voltage modulates Iosc, the lower the 204 voltage, the lower the 209 output current, and the pulse generator operates in the frequency modulation mode.
When the voltage 204 is smaller than the fifth reference voltage Vref5, namely the FB port voltage V FB <Vref5+V BE(D3) The fifth comparator output 401 is high, the sixth comparator output 402 is high, M13 is off, M14 is on, and the first reference voltage Vref1, the second reference voltage Vref2, or the third reference voltage Vref3 is transmitted 203 to the output according to different states of 201, 202. Different Iosc are generated according to different states of 201 and 202, the output 209 of the Iosc is used for controlling the frequency of the pulse generator after passing through the V-I control circuit, at this time, S3 is closed, 204 voltage modulates the Iosc, and the pulse generator works in a standby mode.
The technical features of the present invention that are not described in the present invention may be implemented by or using the prior art, and are not described in detail herein, but the above description is not intended to limit the present invention, and the present invention is not limited to the above examples, but is also intended to be within the scope of the present invention by those skilled in the art.

Claims (1)

1. The PWM switching power supply control circuit with the self-adaptive regulation is characterized by being applied to a switching power supply main circuit, wherein the switching power supply main circuit comprises a rectifying circuit connected to an output end of an input alternating current power supply, a conversion circuit connected to an output end of the rectifying circuit, an output filter circuit connected to an output end of the conversion circuit, and a feedback circuit connected to an output end of the output filter circuit and an input end of the control circuit;
the conversion circuit comprises a transformer T1 and a power switch tube M1, wherein the transformer T1 comprises a primary winding, a secondary winding and an auxiliary winding, the drain electrode of the power switch tube M1 is connected with one end of the primary winding, the other end of the primary winding is connected with the output end of the rectifying circuit, the source electrode of the power switch tube M1 is connected with the CS pin of the control circuit and grounded through a resistor R4, the GATE pin of the control circuit is connected with the grid electrode of the power switch tube M1, the DET pin of the control circuit is connected with one end of the auxiliary winding through a resistor Rdet, the other end of the auxiliary winding is grounded, and the FB pin of the control circuit is connected with the output end of the feedback circuit;
the control circuit comprises a variable gain network, an output state detection circuit, an error amplifier, a mode control circuit, a pulse generator, a slope compensation circuit, a PWM logic circuit, a soft drive circuit, an OCP circuit and an internal power supply;
the variable gain network comprises a diode D3, resistors R10-R14, switching tubes M11-M17, inverters U1-U3 and U7, a NOR gate U4, and AND gates U5 and U6, wherein the anode of the diode D3 is connected with a FB pin and one end of the resistor R10, the other end of the resistor R10 is connected with an internal power source Pow, the cathode of the diode D3 is connected with one end of the resistor R11, the other end of the R11 is connected with one end of the R12, the drain of the M11 and the drain of the M13, the other end of the R12 is connected with one end of the R13 and the drain of the M12, the other end of the R13 is connected with one end of the R14 and the source of the M12, the gates of the M11, the M12 and the M13 are respectively connected with the output ends of the U1, U2 and U7, the source of the M13 is connected with the source of the M14, the drain of the M14 is respectively connected with the source of the M15-M17, the drains of the M15-M17 are respectively connected with the first reference voltage, the second reference voltage and the third reference voltage, and the gates of the M15-M17 are respectively connected with the output ends of the U4-U6;
the output state detection circuit comprises resistors R20-R24, switching tubes M21-M24, current sources Ir0-Ir5, a first comparator-fourth comparator, capacitors C11 and C12, inverters U12 and U15, schmitt triggers U11 and U16, AND gates U13 and U14, or gates U17 and M22, wherein the grid electrode of the gates is connected with the output end of a PWM logic circuit, the input end of the U12, the input end of the U15 and one input end of the U17, the drain electrode of the M22 is connected with the output end of a current source Ir4, one end of the capacitor C11 and the input end of the U11, the other end of the C11 and the source electrode of the M22 are grounded, the output ends of the U12 and the U11 are respectively connected with two input ends of the U13, the output end of the U13 is connected with one input end of the U14, the output end of the U15 is connected with the grid electrode of the M23 and the M24, the source electrode of the M23 is connected with the drain electrode of the power source Pow, the drain electrode of the M23 is connected with the drain electrode of the M24, one end of the capacitor C12 and the input end of the U16, and the other end of the C12 is grounded, the source electrode of M24 is connected with one end of a current source Ir5, the other end of the current source Ir5 is grounded, the output end of U16 is connected with the other input end of U17, the output end of U17 is connected with the other input end of U14, the output end of U14 is connected with the grid electrode of M21, the drain electrode of M21 is connected with the DET pin and one end of a resistor R20, the other end of R20 is grounded, the source electrode of M21 is connected with the positive input end of a first comparator, a second comparator, a third comparator and the negative input end of a fourth comparator, the negative input end of the first comparator is connected with one end of a resistor R21 and the output end of a current source Ir1, the negative input end of the second comparator is connected with one end of a resistor R22 and the output end of a current source Ir2, the positive input end of the fourth comparator is connected with one end of a resistor R24 and the output end of a current source Ir0, and the other ends of R21-R24 are grounded; the output end of the first comparator is connected with the input end of U1 and one input end of U4-U6, the output end of the second comparator is connected with the input ends of U2 and U3 and the other input ends of U4 and U6, and the output end of U3 is connected with the other input end of U5;
the mode control circuit comprises a current synthesis controller and an FB voltage detection circuit, wherein the current synthesis controller comprises current sources Ir6-Ir8, switches S1-S3, a current adder and a V-I control circuit, the FB voltage detection circuit comprises a fifth comparator and a sixth comparator, the output ends of the current sources Ir7 and Ir8 are respectively connected with one ends of S1 and S2, the other ends of S1 and S2 and the output end of the current source Ir6 are respectively connected with three input ends of the current adder, the output end of the current adder is connected with one input end of the V-I control circuit, the cathode of a diode D3 is connected with one end of a switch S3, the other end of the switch S3 is connected with the other input end of the V-I control circuit, the control ends of the switches S1 and S2 are respectively connected with the output ends of a first comparator and a second comparator, the output end of the V-I control circuit is connected with the input end of a pulse generator, one output end of the pulse generator is connected with the first input end of a slope compensation circuit, the other output end of the pulse generator is connected with the first input end of a PWM logic circuit, and the output end of the PWM logic circuit is connected with the output end of a soft pin of the PWM logic circuit; the negative input ends of the fifth comparator and the sixth comparator are connected with the cathode of the diode D3, the positive input end of the fifth comparator is respectively connected with the fourth reference voltage and the fifth reference voltage, and the output end of the sixth comparator is connected with the input end of U7 and the grid electrode of M14; the fourth reference voltage is larger than the fifth reference voltage, the resistance value of R20 is far smaller than Rdet, ir0.R24 < Ir1.R21 < Ir2.R22 < Ir3.R23;
the source electrode of M13 of the variable gain network is connected with the negative input end of the error amplifier, the output end of the slope compensation circuit is connected with the positive input end of the error amplifier, the output end of the error amplifier is connected with the second input end of the PWM logic circuit, and the mode control circuit generates a control signal of the pulse generator; the input end of the OCP circuit is connected with the CS pin, one output end of the OCP circuit is connected with the second input end of the slope compensation circuit, and the other output end of the OCP circuit is connected with the third input end of the PWM logic circuit.
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