CN110361631B - Power distribution network fault positioning method and system containing high-permeability distributed power supply - Google Patents

Power distribution network fault positioning method and system containing high-permeability distributed power supply Download PDF

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CN110361631B
CN110361631B CN201910697635.4A CN201910697635A CN110361631B CN 110361631 B CN110361631 B CN 110361631B CN 201910697635 A CN201910697635 A CN 201910697635A CN 110361631 B CN110361631 B CN 110361631B
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fault
bus
power supply
error
sequence
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CN110361631A (en
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崔超奇
朱杰
刘斌
程亚航
董苏
朱新菊
郭运泽
王化山
郭碧翔
韦杰杰
张振洋
何宇鑫
徐虎
卢家奎
张剑东
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State Grid Corp of China SGCC
Fuyang Power Supply Co of State Grid Anhui Electric Power Co Ltd
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State Grid Corp of China SGCC
Fuyang Power Supply Co of State Grid Anhui Electric Power Co Ltd
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08—Locating faults in cables, transmission lines, or networks
    • G01R31/081—Locating faults in cables, transmission lines, or networks according to type of conductors
    • G01R31/086—Locating faults in cables, transmission lines, or networks according to type of conductors in power transmission or distribution networks, i.e. with interconnected conductors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08—Locating faults in cables, transmission lines, or networks
    • G01R31/088—Aspects of digital computing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S10/00—Systems supporting electrical power generation, transmission or distribution
    • Y04S10/50—Systems or methods supporting the power network operation or management, involving a certain degree of interaction with the load-side end user applications
    • Y04S10/52—Outage or fault management, e.g. fault detection or location

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Abstract

The invention discloses a method and a system for positioning faults of a power distribution network containing a high-permeability distributed power supply, wherein the method comprises the following steps: s1: when a power distribution network containing a high-permeability distributed power supply fails, detecting break variables at power grid power supply detection points and distributed power supply grid-connected points, and collecting A, B, C three-phase current voltages of current transformers and voltage transformers at the power grid power supply detection points and the distributed power supply grid-connected points; s2: carrying out Thevenin equivalence on the distributed power supply, calculating positive sequence, negative sequence and zero sequence Thevenin equivalent impedances of the distributed power supply, and further establishing a bus impedance matrix; s3: constructing a fault index identification fault section; s4: and constructing a virtual bus to locate a fault point. According to the invention, the distributed power supply is subjected to normalization processing, a model suitable for various types of distributed power supplies is established, and the established bus impedance matrix is ensured to be irrelevant to the types of the distributed power supplies.

Description

Power distribution network fault positioning method and system containing high-permeability distributed power supply
Technical Field
The invention relates to the technical field of power distribution network fault location, in particular to a power distribution network fault location method and system with a high-permeability distributed power supply.
Background
With depletion of fossil fuel reserves and increasing global energy demand, the position of renewable energy sources is increasing. The distributed power supply improves the utilization efficiency of clean energy and solves the problem of power supply in remote rural areas through renewable energy sources such as wind power, solar energy and the like, and becomes one of important measures for promoting energy conservation and emission reduction and coping with climate change in countries in the world. However, the distributed power supply is connected to the power distribution network, so that the original single power supply and radial structure characteristics of the power distribution network are changed, the power distribution network becomes a network with bidirectional power flow, the characteristics of fault current of the network are greatly changed, and the existing fault location is seriously influenced.
Generally, a percentage value obtained by dividing a DG capacity by a load capacity in a power distribution system can be defined as a permeability of a DG, and it is generally considered that when the permeability is greater than 10%, an influence of access of the DG on fault location of a power distribution network needs to be considered.
At present, most fault location algorithms locate a fault section by using a protection device, and then realize fault point location. However, in fault location of a distributed power supply with high permeability, a fault interval determined by a protection device is not necessarily accurate, because the protection device may have failure and misoperation in practical application, and meanwhile, a traditional fault point location method is only for a power distribution network with a single power supply, and does not consider the characteristic of multi-power imbalance of the power distribution network with the distributed power supply, so that fault location accuracy is far from meeting requirements.
Through the analysis, the existing fault positioning method cannot be suitable for the condition that a high-permeability distributed power supply is connected into a power distribution network, the condition of misjudgment and misjudgment can be caused, and the reliability of a power system is seriously influenced. Therefore, aiming at the influence of the high-permeability distributed power supply connected to the power distribution network on fault location, the invention of the method and the system for locating the fault of the power distribution network containing the high-permeability distributed power supply is necessary.
Disclosure of Invention
The invention mainly aims to provide a power distribution network fault positioning method and system containing a high-permeability distributed power supply, and aims to solve the problems that the existing fault positioning method cannot be suitable for the condition that the high-permeability distributed power supply is connected into a power distribution network, misjudgment and misjudgment can be caused, and the reliability of a power system is seriously influenced.
In order to achieve the purpose, the invention provides a fault positioning method for a power distribution network containing a high-permeability distributed power supply, which comprises the following steps:
s1: when a power distribution network containing a high-permeability distributed power supply fails, detecting break variables at power grid power supply detection points and distributed power supply grid-connected points, and collecting A, B, C three-phase current voltages of current transformers and voltage transformers at the power grid power supply detection points and the distributed power supply grid-connected points;
s2: carrying out Thevenin equivalence on the distributed power supply, calculating positive sequence, negative sequence and zero sequence Thevenin equivalent impedances of the distributed power supply, and further establishing a bus impedance matrix;
s3: and constructing a fault index and identifying a fault section.
Preferably, the method for performing thevenin equivalent calculation on the distributed power supply in step S2 includes:
Figure BDA0002148070540000021
Figure BDA0002148070540000022
Figure BDA0002148070540000023
wherein E is a power supply voltage; vLIs the voltage at the power bus before failure; i isLCurrent at the power bus before failure;
Figure BDA0002148070540000024
is the positive sequence voltage at the power bus after the fault;
Figure BDA0002148070540000025
is the positive sequence current at the power bus after the fault;
Figure BDA0002148070540000026
is the negative sequence voltage at the power bus after the fault;
Figure BDA0002148070540000027
is the negative sequence current at the power bus after the fault;
Figure BDA0002148070540000028
the zero sequence voltage at the power bus after the fault;
Figure BDA0002148070540000029
zero sequence current at the power bus after the fault;
Figure BDA00021480705400000210
is positive sequence Thevenin equivalent impedance;
Figure BDA00021480705400000211
is a negative-sequence Thevenin equivalent impedance;
Figure BDA00021480705400000212
is a zero sequence Thevenin equivalent impedance。
Preferably, the positive sequence, negative sequence, and zero sequence thevenin equivalent impedances of the distributed power source in step S2 can be expressed as:
Figure BDA00021480705400000213
Figure BDA00021480705400000214
Figure BDA0002148070540000031
in the formula, VLIs the voltage at the power bus before failure; i isLCurrent at the power bus before failure;
Figure BDA0002148070540000032
is the positive sequence voltage at the power bus after the fault;
Figure BDA0002148070540000033
is the positive sequence current at the power bus after the fault;
Figure BDA0002148070540000034
is the negative sequence voltage at the power bus after the fault;
Figure BDA0002148070540000035
is the negative sequence current at the power bus after the fault;
Figure BDA0002148070540000036
the zero sequence voltage at the power bus after the fault;
Figure BDA0002148070540000037
zero sequence current at the power bus after the fault;
Figure BDA0002148070540000038
is positive sequence Thevenin equivalent impedance;
Figure BDA0002148070540000039
is a negative-sequence Thevenin equivalent impedance;
Figure BDA00021480705400000310
is zero sequence Thevenin equivalent impedance;
Figure BDA00021480705400000311
respectively representing the voltage and current changes at the power bus due to the fault, respectively marked as delta V(1)、ΔI(1)。
Preferably, the specific process of establishing the bus impedance matrix in step S2 is as follows:
firstly, establishing a three-phase coupling impedance matrix ZS of the distributed power supply, wherein the calculation formula is as follows:
Figure BDA00021480705400000312
wherein a ═ ej2π/3；
Second, a bus impedance matrix is established
Figure BDA00021480705400000313
The matrix can accurately simulate all unbalanced systems, and the calculation formula is as follows:
Figure BDA00021480705400000314
wherein Z isii、ZjiRespectively self-impedance and mutual impedance, the values of which are that when a unit current is injected into the bus i and the injected current of each other bus is zero, the voltage on the bus i is self-impedance ZiiThe voltage on bus j (j ≠ 1,2, …, n, j ≠ i) is the mutual impedance Z between bus j and bus iji(ii) a Namely, it is
Figure BDA00021480705400000315
Figure BDA00021480705400000316
Preferably, the specific process of constructing the fault indicator and identifying the fault section in step 3 includes:
s31: assuming that the total number of power supplies is m, recorded as S1, S2 and … Sm, the total number of buses is n, recorded as B (1), B (2) and … B (n), and the buses at the power supplies are recorded as BS (1), BS (2) and … BS (m);
s32: when a fault occurs at J, the voltage change at I is recorded as
Figure BDA00021480705400000317
The calculation formula is as follows:
Figure BDA0002148070540000041
in the formula (I), the compound is shown in the specification,
Figure BDA0002148070540000042
the three-phase fault current injected at J has the value of the sum of the three-phase fault currents measured by the power buses BS (1), BS (2), … BS (m);
Figure BDA0002148070540000043
for injection current at J
Figure BDA0002148070540000044
Induced three-phase voltage changes at I;
Figure BDA0002148070540000045
for the three-phase bus impedance matrix when current injection is performed at the position J and other current injection is zero, the calculation formula is as follows:
Figure BDA0002148070540000046
s33: constructing a fault index Error, wherein the meaning of the fault index Error is that the smaller the Error value is, the closer the assumed fault point is to the real fault point is; the larger the Error value, the farther the assumed fault point is from the true fault point. The calculation formula is as follows:
Figure BDA0002148070540000047
wherein norm (X) [ | X (1) ] non-conducting2+|X(2)|2+|X(3)|2+…+|X(k)|2]1/2；
Figure BDA0002148070540000048
The calculated value represents the three-phase voltage change at the position BS (J) of the power supply bus when the position B (I) has a fault;
Figure BDA0002148070540000049
the real value of the three-phase voltage change at the power bus BS (J) is represented when the bus B (I) has a fault, and the real value can be obtained by calculating the measured voltage at the power bus BS (J) before and after the fault;
s34: assuming that the fault occurs at B (1), then
Figure BDA00021480705400000410
Similarly, assuming that faults occur in B (2), B (3) and … B (n), sequentially calculating Error (2), Error (3) and … Error (n);
s35: comparing the sizes of the Error (1), the Error (2), the Error (3), the … Error (n), and the fault interval is between the minimum Error and the second minimum Error.
Preferably, the method further comprises step S4: the method comprises the following steps of constructing a virtual bus positioning fault point, wherein the specific process comprises the following steps:
s41: assuming that B (6) and B (7) are the minimum Error and the second minimum Error, the fault occurs between B (6) and B (7), and a virtual bus is added at a small distance delta L from B (6) and is marked as B (n + 1);
Figure BDA00021480705400000411
wherein L is a line length from B (6) to B (7), and k is an integer;
s42: assuming that the fault occurs in B (n +1), calculating Error (n + 1);
s43: increasing buses at a small distance 2 delta L, 3 delta L, … and k delta L from B (6) in sequence, and recording as B (n +2), B (n +3), … and B (n + k); assuming that faults occur in B (n +2), B (n +3) and … B (n + k) in sequence, and calculating Error (n +2), Error (n +3) and … Error (n + k) in sequence;
s44: the fault interval is between the minimum Error and the minimum Error times;
s45: repeating the above process until an Error is found to be zero; the position where Error is zero represents that the virtual fault bus is superposed with the real fault point; the failure point is where Error is zero.
In order to achieve the purpose, the invention also discloses a power distribution network fault positioning system containing the high-permeability distributed power supply, which comprises the following modules:
the current and voltage acquisition module comprises: the fault detection circuit is used for collecting current and voltage information before and after a fault;
constructing a bus impedance matrix module: carrying out Thevenin equivalence on the distributed power supply, calculating positive sequence, negative sequence and zero sequence Thevenin equivalent impedances, and further establishing a bus impedance matrix;
and a fault interval identification module: identifying a fault section by constructing a fault index;
positioning a fault module: and (4) positioning a fault point by constructing a virtual bus.
In the technical scheme of the invention, (1) the distributed power supply is subjected to normalization processing, a model suitable for various types of distributed power supplies is established, and the established bus impedance matrix is ensured to be irrelevant to the types of the distributed power supplies; (2) according to the invention, the fault section is identified by constructing the fault index only by utilizing the current and voltage information of the power supply before and after the fault, a protection device is not required, and misjudgment caused by the condition that the protection device is out of order or misoperated possibly in field practice is avoided; (3) the method realizes the accurate positioning of the fault point by constructing the virtual bus, and simultaneously prevents the occurrence of misjudgment and misjudgment of the fault section in the process of establishing the virtual bus to position the fault point; (4) the invention effectively eliminates the influence on fault location caused by the access of the distributed power supply to the power distribution network, and avoids the condition that the precision of fault location changes along with the change of the access capacity of the distributed power supply.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a general flowchart of a fault location method for a power distribution network including a high-permeability distributed power supply according to embodiment 1;
FIG. 2 is a network diagram of a power distribution network in an embodiment;
FIG. 3 is an equivalent network diagram of a network frame of a power distribution network in case of a fault in an embodiment;
FIG. 4 is an equivalent schematic diagram of a distributed power supply Thevenin in an embodiment;
FIG. 5 is a flow chart of fault section identification in an embodiment;
FIG. 6 is a flowchart of fault location in an embodiment;
FIG. 7 is a schematic diagram of a virtual bus bar construction in an embodiment;
fig. 8 is a schematic structural diagram of a power distribution network fault location system including a high-permeability distributed power supply in embodiment 2.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that, if directional indications (such as up, down, left, right, front, and back … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description of "first", "second", etc. in an embodiment of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the meaning of "and/or" appearing throughout includes three juxtapositions, exemplified by "A and/or B" including either A or B or both A and B. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
The existing fault positioning method cannot be suitable for the condition that a high-permeability distributed power supply is connected into a power distribution network, the condition of misjudgment and misjudgment can be caused, and the reliability of a power system is seriously influenced. Therefore, aiming at the influence of the high-permeability distributed power supply connected to the power distribution network on fault location, the invention of the method and the system for locating the fault of the power distribution network containing the high-permeability distributed power supply is necessary.
Example 1
In order to achieve the purpose, in a power distribution network system as shown in fig. 2, system power sources and distributed power sources are subjected to thevenin equivalent into a form of ideal power source series equivalent impedance, wherein the total number of the power sources is m and is recorded as S1, S2 and … Sm, the total number of buses is n and is recorded as B (1), B (2) and … B (n), and the buses to the power sources are recorded as BS (1), BS (2) and … BS (m); s is a system power supply, and DG is a distributed power supply. Assuming that a fault occurs between B (6) -B (7), when the fault occurs, the system power supply and the distributed power supply grid-connected point will detect a sudden voltage and current change, as shown in FIG. 3, and the process starts, and the general flow chart is shown in FIG. 1:
it should be noted that, in this embodiment, the distributed power supply is subjected to normalization processing, a model adapted to various types of distributed power supplies is established, and it is ensured that the established bus impedance matrix is independent of the type of the distributed power supply.
It can be understood that, the embodiment effectively eliminates the influence on fault location caused by the fact that the distributed power supply is connected to the power distribution network, and avoids the situation that the accuracy of fault location changes along with the change of the access capacity of the distributed power supply.
S1: detecting break variables at a power grid power detection point and a distributed power grid connection point, and collecting A, B, C three-phase current and voltage of a current transformer and a voltage transformer at the power grid power detection point and the distributed power grid connection point;
in the embodiment, the fault section is identified by establishing the fault index only by utilizing the current and voltage information of the power supply before and after the fault, the protection device is not required, and misjudgment caused by the condition that the protection device is out of order or misoperated possibly in field practice is avoided.
S2: carrying out Thevenin equivalence on the distributed power supply, as shown in FIG. 4, calculating Thevenin equivalent impedances of a positive sequence, a negative sequence and a zero sequence of the distributed power supply, and further establishing a bus impedance matrix;
further, the method for calculating thevenin equivalence of the distributed power source in the step S2 includes:
Figure BDA0002148070540000071
Figure BDA0002148070540000072
Figure BDA0002148070540000073
wherein E is a power supply voltage; vLIs the voltage at the power bus before failure; i isLCurrent at the power bus before failure;
Figure BDA0002148070540000074
is the positive sequence voltage at the power bus after the fault;
Figure BDA0002148070540000075
is the positive sequence current at the power bus after the fault;
Figure BDA0002148070540000076
is the negative sequence voltage at the power bus after the fault;
Figure BDA0002148070540000077
is the negative sequence current at the power bus after the fault;
Figure BDA0002148070540000081
the zero sequence voltage at the power bus after the fault;
Figure BDA0002148070540000082
zero sequence current at the power bus after the fault;
Figure BDA0002148070540000083
is positive sequence Thevenin equivalent impedance;
Figure BDA0002148070540000084
is a negative-sequence Thevenin equivalent impedance;
Figure BDA0002148070540000085
is the zero sequence Thevenin equivalent impedance.
Further, the positive sequence, negative sequence, and zero sequence thevenin equivalent impedances of the distributed power source in step S2 may be expressed as:
Figure BDA0002148070540000086
Figure BDA0002148070540000087
Figure BDA0002148070540000088
wherein
Figure BDA0002148070540000089
Respectively representing the voltage and current changes at the power bus due to the fault, respectively marked as delta V(1)、ΔI(1)。
The specific process of establishing the bus impedance matrix in step S2 is as follows:
firstly, establishing a three-phase coupling impedance matrix ZS of the distributed power supply, wherein the calculation formula is as follows:
Figure BDA00021480705400000810
wherein a ═ ej2π/3；
Second, a bus impedance matrix is established
Figure BDA00021480705400000811
The matrix can accurately simulate all unbalanced systems, and the calculation formula is as follows:
Figure BDA00021480705400000812
wherein Z isii、ZjiRespectively self-impedance and mutual impedance, the values of which are that when a unit current is injected into the bus i and the injected current of each other bus is zero, the voltage on the bus i is self-impedance ZiiThe voltage on bus j (j ≠ 1,2, …, n, j ≠ i) is the mutual impedance Z between bus j and bus iji(ii) a Namely, it is
Figure BDA00021480705400000813
Figure BDA00021480705400000814
S3: constructing a fault index identification fault section; the specific process for constructing the fault index and identifying the fault section comprises the following steps:
s31: assuming that the total number of power supplies is m, recorded as S1, S2 and … Sm, the total number of buses is n, recorded as B (1), B (2) and … B (n), and the buses at the power supplies are recorded as BS (1), BS (2) and … BS (m);
s32: when a fault occurs at J, the voltage change at I is recorded as
Figure BDA0002148070540000091
The calculation formula is as follows:
Figure BDA0002148070540000092
in the formula (I), the compound is shown in the specification,
Figure BDA0002148070540000093
the three-phase fault current injected at J has the value of the sum of the three-phase fault currents measured by the power buses BS (1), BS (2), … BS (m);
Figure BDA0002148070540000094
for injection current at J
Figure BDA0002148070540000095
Induced three-phase voltage changes at I;
Figure BDA0002148070540000096
is a three-phase bus impedance matrix with current injection at J and zero other current injectionThe calculation formula is as follows:
Figure BDA0002148070540000097
s33: constructing a fault index Error, wherein the meaning of the fault index Error is that the smaller the Error value is, the closer the assumed fault point is to the real fault point is; the larger the Error value, the farther the assumed fault point is from the true fault point. The calculation formula is as follows:
Figure BDA0002148070540000098
wherein norm (X) [ | X (1) ] non-conducting2+|X(2)|2+|X(3)|2+…+|X(k)|2]1/2；
Figure BDA0002148070540000099
The calculated value represents the three-phase voltage change at the position BS (J) of the power supply bus when the position B (I) has a fault;
Figure BDA00021480705400000910
the real value of the three-phase voltage change at the power bus BS (J) is represented when the bus B (I) has a fault, and the real value can be obtained by calculating the measured voltage at the power bus BS (J) before and after the fault;
s34: the flow chart for identifying the fault section is shown in fig. 5: assuming that the fault occurs at B (1), then
Figure BDA00021480705400000911
Similarly, assuming that faults occur in B (2), B (3) and … B (n), sequentially calculating Error (2), Error (3) and … Error (n);
s35: comparing the sizes of the Error (1), the Error (2), the Error (3), the … Error (n), and the fault interval is between the minimum Error and the second minimum Error.
S4: a virtual bus is constructed to position a fault point, a fault point positioning flow chart is shown in fig. 6, and the specific flow includes:
s41: it is determined through step S3 that B (6) and B (7) are the minimum Error and the minimum Error times, and then the fault occurs between B (6) and B (7), and in order to realize fault point positioning, a virtual bus is constructed to position the fault point, as shown in fig. 7. The method specifically comprises the following steps: adding a virtual bus at a small distance delta L from B (6), and recording as B (n + 1);
Figure BDA0002148070540000101
wherein L is a line length from B (6) to B (7), and k is an integer;
s42: assuming that the fault occurs in B (n +1), calculating Error (n + 1);
s43: increasing buses at a small distance 2 delta L, 3 delta L, … and k delta L from B (6) in sequence, and recording as B (n +2), B (n +3), … and B (n + k); assuming that faults occur in B (n +2), B (n +3) and … B (n + k) in sequence, and calculating Error (n +2), Error (n +3) and … Error (n + k) in sequence;
s44: the fault interval is between the minimum Error and the minimum Error times;
s45: repeating the above process until an Error is found to be zero; the position where Error is zero represents that the virtual fault bus is superposed with the real fault point; the failure point is where Error is zero.
It should be understood that, in this embodiment, the accurate positioning of the fault point is realized by constructing the virtual bus, and meanwhile, in the process of establishing the virtual bus to position the fault point, the occurrence of erroneous judgment of the fault section is prevented.
Example 2
To achieve the above object, see fig. 8: the embodiment also discloses a power distribution network fault positioning system containing the high-permeability distributed power supply, which comprises the following modules:
the current and voltage acquisition module comprises: the fault detection circuit is used for collecting current and voltage information before and after a fault;
constructing a bus impedance matrix module: carrying out Thevenin equivalence on the distributed power supply, calculating positive sequence, negative sequence and zero sequence Thevenin equivalent impedances, and further establishing a bus impedance matrix;
and a fault interval identification module: identifying a fault section by constructing a fault index;
positioning a fault module: and (4) positioning a fault point by constructing a virtual bus.
In the embodiment, the distributed power supply is subjected to normalization processing, a model suitable for various types of distributed power supplies is established, and the established bus impedance matrix is ensured to be independent of the types of the distributed power supplies.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., a rom/ram, a magnetic disk, an optical disk) and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, an air conditioner, or a network device) to execute the method according to the embodiments of the present invention.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (4)

1. A fault location method for a power distribution network with a high-permeability distributed power supply is characterized by comprising the following steps:
s1: when a power distribution network containing a high-permeability distributed power supply fails, detecting break variables at power grid power supply detection points and distributed power supply grid-connected points, and collecting A, B, C three-phase current voltages of current transformers and voltage transformers at the power grid power supply detection points and the distributed power supply grid-connected points;
s2: carrying out Thevenin equivalence on the distributed power supply, calculating positive sequence, negative sequence and zero sequence Thevenin equivalent impedances of the distributed power supply, and further establishing a bus impedance matrix;
s3: constructing a fault index identification fault section; the specific process of constructing the fault index identification fault section in the step 3 comprises the following steps:
s31: assuming that the total number of power supplies is m, recorded as S1, S2 and … Sm, the total number of buses is n, recorded as B (1), B (2) and … B (n), and the buses at the power supplies are recorded as BS (1), BS (2) and … BS (m);
s32: when a fault occurs at J, the voltage change at I is recorded as
Figure FDA0003055026840000011
The calculation formula is as follows:
Figure FDA0003055026840000012
in the formula (I), the compound is shown in the specification,
Figure FDA0003055026840000013
the three-phase fault current injected at J has the value of the sum of the three-phase fault currents measured by the power buses BS (1), BS (2), … BS (m);
Figure FDA0003055026840000014
for injection current at J
Figure FDA0003055026840000015
Induced three-phase voltage changes at I;
Figure FDA0003055026840000016
for the three-phase bus impedance matrix when current injection is performed at the position J and other current injection is zero, the calculation formula is as follows:
Figure FDA0003055026840000017
k is an integer not equal to J from 1 to n;
s33: constructing a fault index Error, wherein the meaning of the fault index Error is that the smaller the Error value is, the closer the assumed fault point is to the real fault point is; the larger the Error value is, the farther the assumed fault point is from the true fault point is; the calculation formula is as follows:
Figure FDA0003055026840000018
wherein norm (X) [ | X (1) ] non-conducting2+|X(2)|2+|X(3)|2+…+|X(k)|2]1/2；
Figure FDA0003055026840000019
The calculated value represents the three-phase voltage change at the position BS (J) of the power supply bus when the position B (I) has a fault;
Figure FDA00030550268400000110
the real value of the three-phase voltage change at the power bus BS (J) is represented when the bus B (I) has a fault, and the real value can be obtained by calculating the measured voltage at the power bus BS (J) before and after the fault;
s34: assuming that the fault occurs at B (1), then
Figure FDA0003055026840000021
Similarly, assuming that faults occur in B (2), B (3) and … B (n), sequentially calculating Error (2), Error (3) and … Error (n);
s35: comparing the sizes of the Error (1), the Error (2), the Error (3), the … Error (n), and setting the fault interval between the minimum Error and the second minimum Error;
further comprising step S4: the method comprises the following steps of constructing a virtual bus positioning fault point, wherein the specific process comprises the following steps:
s41: assuming that B (6) and B (7) are the minimum Error and the second minimum Error, the fault occurs between B (6) and B (7), and a virtual bus is added at a small distance delta L from B (6) and is marked as B (n + 1);
Figure FDA0003055026840000022
wherein L is a line length from B (6) to B (7), and k is an integer;
s42: assuming that the fault occurs in B (n +1), calculating Error (n + 1);
s43: increasing buses at a small distance 2 delta L, 3 delta L, … and k delta L from B (6) in sequence, and recording as B (n +2), B (n +3), … and B (n + k); assuming that faults occur in B (n +2), B (n +3) and … B (n + k) in sequence, and calculating Error (n +2), Error (n +3) and … Error (n + k) in sequence;
s44: the fault interval is between the minimum Error and the minimum Error times;
s45: repeating the above process until an Error is found to be zero; the position where Error is zero represents that the virtual fault bus is superposed with the real fault point; the failure point is where Error is zero.
2. The method for locating the fault of the power distribution network with the high-permeability distributed power supply according to claim 1, wherein the method for calculating thevenin equivalent of the distributed power supply in the step S2 includes:
Figure FDA0003055026840000023
Figure FDA0003055026840000024
Figure FDA0003055026840000025
wherein E is a power supply voltage; vLIs the voltage at the power bus before failure; i isLCurrent at the power bus before failure;
Figure FDA0003055026840000026
is the positive sequence voltage at the power bus after the fault;
Figure FDA0003055026840000027
is the positive sequence current at the power bus after the fault;
Figure FDA0003055026840000028
is the negative sequence voltage at the power bus after the fault;
Figure FDA0003055026840000029
is the negative sequence current at the power bus after the fault;
Figure FDA00030550268400000210
the zero sequence voltage at the power bus after the fault;
Figure FDA00030550268400000211
zero sequence current at the power bus after the fault;
Figure FDA00030550268400000212
is positive sequence Thevenin equivalent impedance;
Figure FDA00030550268400000213
is a negative-sequence Thevenin equivalent impedance;
Figure FDA00030550268400000214
is the zero sequence Thevenin equivalent impedance.
3. The method for locating the fault of the power distribution network with the high-permeability distributed power supplies according to claim 1, wherein the positive-sequence, negative-sequence and zero-sequence Thevenin equivalent impedances of the distributed power supplies in the step S2 are expressed as follows:
Figure FDA0003055026840000031
Figure FDA0003055026840000032
Figure FDA0003055026840000033
in the formula, VLIs the voltage at the power bus before failure; i isLCurrent at the power bus before failure;
Figure FDA0003055026840000034
is the positive sequence voltage at the power bus after the fault;
Figure FDA0003055026840000035
is the positive sequence current at the power bus after the fault;
Figure FDA0003055026840000036
is the negative sequence voltage at the power bus after the fault;
Figure FDA0003055026840000037
is the negative sequence current at the power bus after the fault;
Figure FDA0003055026840000038
the zero sequence voltage at the power bus after the fault;
Figure FDA0003055026840000039
zero sequence current at the power bus after the fault;
Figure FDA00030550268400000310
is positive sequence Thevenin equivalent impedance;
Figure FDA00030550268400000311
is a negative-sequence Thevenin equivalent impedance;
Figure FDA00030550268400000312
is zero sequence Thevenin equivalent impedance;
Figure FDA00030550268400000313
respectively representing the voltage and current changes at the power bus due to the fault, respectively marked as delta V(1)、ΔI(1)。
4. The method for locating the fault of the power distribution network with the high-permeability distributed power supply according to any one of claims 2 to 3, wherein the specific process of establishing the bus impedance matrix in the step S2 is as follows:
firstly, establishing a three-phase coupling impedance matrix Z of the distributed power supplySThe calculation formula is as follows:
Figure FDA00030550268400000314
wherein a ═ ej2π/3；
Second, a bus impedance matrix is established
Figure FDA00030550268400000315
The matrix can accurately simulate all unbalanced systems, and the calculation formula is as follows:
Figure FDA00030550268400000316
wherein Z isii、ZjiRespectively self-impedance and mutual impedance, the values of which are that when a unit current is injected into the bus i and the injected current of each other bus is zero, the voltage on the bus i is self-impedance ZiiThe voltage on bus j (j ≠ 1,2, …, n, j ≠ i) is the mutual impedance Z between bus j and bus iji(ii) a Namely, it is
Figure FDA00030550268400000317
Figure FDA0003055026840000041
Wherein, IkK is an integer not equal to i from 1 to n, which is the injection current at the bus k.
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