CN110333638A - The cascaded modulator chip of photon analog-to-digital conversion - Google Patents
The cascaded modulator chip of photon analog-to-digital conversion Download PDFInfo
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- CN110333638A CN110333638A CN201910487730.1A CN201910487730A CN110333638A CN 110333638 A CN110333638 A CN 110333638A CN 201910487730 A CN201910487730 A CN 201910487730A CN 110333638 A CN110333638 A CN 110333638A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F7/00—Optical analogue/digital converters
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Abstract
A kind of cascaded modulator chip of photon analog-to-digital conversion is equipped with multiple modulated structures, functional electrode and optical port on one chip, and the modulated structure includes gloss spline structure and multi-channel parallel demux architecture；The functional electrode includes DC electrode, radio-frequency electrode and hot phase shifting electrodes；The optical port includes to optical port, light input port, output test port and test port；It can add or be not added delay line in affiliated cascaded modulator chip before each modulated structure.The present invention realizes on piece Optical Sampling and multi-channel parallel demultiplexing effect, substantially reduces the complexity, volume and power consumption of Optical Sampling and parallel demux architecture, effectively reduces Channel Mismatch, while improving analog-to-digital conversion Performance And Reliability.As the nucleus module of photon analog-to-digital conversion, cascade modulation chip has the function of very crucial miniaturization, low-power consumption and the high stability of realizing photon A/D conversion system.
Description
Technical field
It is integrated that the present invention relates to microwave photons, the cascaded modulator chip in especially a kind of photon analog-to-digital conversion.
Background technique
With the continuous hair in the fields such as optical signal prosessing and conversion, high-resolution measuring device and optical signal quality detection
Exhibition, the requirement to modulus conversion technique are higher and higher.Since conditional electronic technology meets with " electronic bottleneck ", electronics is further promoted
Analog-to-digital conversion performance faces very big challenge.Photon modulus conversion technique (hereinafter referred to as PADC) utilizes the high speed of photon, broadband
The characteristics of can effectively promote the performance of A/D conversion system, so that the analog-digital commutator development for a new generation provides effectively
Approach.With the continuous development of PADC technology, multiple technologies scheme is suggested, analog-digital converter, gloss including optics auxiliary
The analog-digital converter and Quan Guangzi of the analog-digital converter of sample electricity, the analog-to-digital conversion of electricity sampling light quantization, Optical Sampling light quantization
Analog-digital converter etc..Wherein, the analog-digital converter of Optical Sampling electricity combine the big bandwidth of photonics, high-precision and at
The advantages that ripe electric quantification technique, become a big research hot topic of current optoelectronic areas.There are mainly two types of Optical Sampling electricity at present
The analog-digital converter scheme of quantization: based on wavelength-division multiplex technique (referring to T.R.Clark, J.U.Kang and R.D.Esman,
“Performance of a time andwavelengthinterleaved photonic sampler for analog-
Digital conversion, " IEEE Photon.Tech.Lett., vol.11,1168~1169,1999), it is multiple based on the time-division
With technology (A.Yariv and R.G.M.P.Koumans et al., " Time interleaved optical sampling
forultra-high speed A/D conversion,”Electronics Letters,34(21):2012-2013,
1998)。
Demux architecture based on wavelength-division multiplex technique is simple, but as the demand to superelevation sampling rate is continuously increased,
More system channel numbers, and the inhomogenous mismatch for having aggravated system of spectrum caused by WDM device are needed, to increase
System complexity is added.With the continuous development of high repetition frequency light pulse generation technology and high-speed optical switch technology, by right
High-speed optical pulse sequence after sampling carries out multichannel demultiplexing, realizes the data processing of parallelization, can reduce rear end electric light
The pressure of the bandwidth and rate of conversion and electricity ADC is (referring to G.Yang, W.Zou, L.Yu, and J.Chen, " Influence of
the sampling clock pulse shape mismatch on channel-interleaved photonic
analog-to-digital conversion,”Opt.Lett.43(15):3530-3533,2018)。
PADC technology based on high-speed optical switch needs photon analog-digital commutator to make using the pulse laser of high-speed
For system source, multichannel demultiplexing is carried out to the light pulse sequence after sampling by the cascade mode of modulator, and by simultaneously
Capable photoelectric conversion, parallel electricity and parallel data processing, the final photon modulus for realizing high-speed high-precision wide band turn
It changes.Modulator stage therein is associated in photon analog-to-digital conversion in occupation of critical positions, using multiple discrete modulators, is faced with
The problems such as system is unstable, and volume is big.On the other hand, with the development of Optoelectronic Integration, PADC system is integrated
Change and miniaturization is the inexorable trend of its innovation and development.
Summary of the invention
It is an object of the invention in view of the above shortcomings of the prior art, propose the grade joint debugging in a kind of photon analog-to-digital conversion
Device chip processed, multiple modulated structures are integrated on one chip, the volume and power consumption of demux architecture can not only be reduced, moreover it is possible to
Channel Mismatch is effectively reduced, the stability of system is improved, while being also the core for realizing PADC system integration and miniaturization
Element.
Technical scheme is as follows:
A kind of cascade modulation chip based on photon analog-to-digital conversion, it is characterized in that, it on one chip include multiple tune
Structure, functional electrode and optical port processed,
The modulated structure includes gloss spline structure and multi-channel parallel demux architecture, and the gloss spline structure
Output end be connected with the input terminal of multi-channel parallel demux architecture, the gloss spline structure includes 1 grade 1 × 1 of modulation
Structure, for realizing the sampling of time domain consecutive variations electric signal；The multi-channel parallel demux architecture includes N grade 1 × 2
Modulated structure demultiplexes for realizing the multichannel of high-speed light sample sequence.The output end of the gloss spline structure directly with
The input terminal of multi-channel parallel demux architecture is connected.
The multi-channel parallel demux architecture include N grade 1 × 2 modulated structure, wherein the 1st grade include one 1 ×
2 modulated structure, the 2nd grade comprising 21 × 2 modulated structure, 3rd level include 41 × 2 modulated structure ..., N grades
Include 2N-1A 1 × 2 modulated structure；The output end of the input terminal of 1st grade 1 × 2 of modulated structure and the gloss spline structure
It is connected, the input terminal of the output end of the 1st grade 1 × 2 of the modulated structure modulated structure with the 2nd grade two 1 × 2 respectively is connected, often
The input terminal of the output end of a 2nd grade 1 × 2 of modulated structure modulated structure with 3rd level two 1 × 2 respectively is connected, with such
It pushes away, to generate 2NThe output channel of road demultiplexing；
The functional electrode includes DC electrode, radio-frequency electrode and hot phase shifting electrodes, and the DC electrode includes N
It is a, it is located at left and right sides of chip top, powers respectively to N number of modulated structure；The radio-frequency electrode is comprising N number of, positioned at chip
Lower left side, respectively to N number of modulated structure provide radiofrequency signal；The hot phase shifting electrodes are comprising N number of, positioned at chip bottom right
Side provides hot phase shift signal to N number of modulated structure respectively；
The optical port includes to optical port, light input port, output test port and test port.It is described to light
Port is 2, positioned at the two sides of optical port；The input port is 1, is the input terminal of first order modulated structure, i.e. light
The input terminal of sampling structure；The output test port is the 2 of N gradesN-1The output test port of a modulated structure amounts to
2NIt is a；The test port is the input port of the modulated structure in multi-channel parallel demux architecture.
It can add or be not added delay line in the cascaded modulator chip before each modulated structure.
The modulated structure can be used that silicon based SOI is integrated, body silicon substrate is integrated, silicon substrate LiNbO_3 film is integrated, silicon substrate key
Conjunction lithium niobate is integrated, graphene is integrated, heterogeneous semiconductor integrates or the modes such as semiconductor Manufacturing resource are realized, but not limited to this.
Mach-Zehnder (MZ) single armed interferometric modulator structure (MZI), push-pull type MZ both arms can be used in the modulated structure
Interferometric modulator structure, but not limited to this.
Compared with prior art, the invention has the following advantages that
Conventionally employed single discrete modulation device cascade, completes Optical Sampling and parallel demultiplexing, but face total volume it is big,
The disadvantages of power consumption is big, performance is unstable.The present invention uses builds gloss spline structure and multi-channel parallel simultaneously on one chip
Demux architecture realize photon analog-to-digital conversion, to reduce the complexity of Optical Sampling door and parallel demux architecture, body
Long-pending and power consumption, while Channel Mismatch is effectively reduced, Performance And Reliability is substantially improved, to the integrated and small of realization PADC
Type has the function of very crucial.
Detailed description of the invention
Fig. 1 is the cascaded modulator chip embodiment domain of photon analog-to-digital conversion of the present invention
Fig. 2 is the topological structure schematic diagram of the cascade modulation chip embodiment of photon analog-to-digital conversion of the present invention
Fig. 3 is the functional electrode schematic diagram of the cascade modulation chip embodiment of photon analog-to-digital conversion of the present invention
Fig. 4 is the optical port schematic diagram of the cascade modulation chip embodiment of photon analog-to-digital conversion of the present invention
Specific embodiment
It elaborates with reference to the accompanying drawings and examples to the present invention, gives detailed embodiment and process, but
Protection scope of the present invention is not limited to following embodiments.
Embodiment
Refering to fig. 1, the cascaded modulator chip embodiment domain of photon analog-to-digital conversion of the present invention, N=3, as three-level solution
Multiplexing, including modulated structure 1 to 8, functional electrode (DC, RF and R) and optical port (Light Input).
Referring to Fig.2, Fig. 2 is the topological structure schematic diagram of the cascade modulation chip embodiment of photon analog-to-digital conversion of the present invention,
The modulated structure of the present embodiment includes gloss spline structure and multi-channel parallel demux architecture.The gloss spline structure includes 1
The modulated structure of grade 1 × 1, for realizing the sampling of time domain consecutive variations electric signal；The multi-channel parallel demux architecture
Comprising 3 grade 1 × 2 of modulated structure, demultiplexed for realizing the multichannel of high-speed light sample sequence.The gloss spline structure
Output end is directly connected with the input terminal of multi-channel parallel demux architecture, the multichannel demux architecture include 3 grade 1 ×
2 modulator.1st grade includes 11 × 2 first modulators 2, the first input end of the first modulator 2 and the photon sampling gate
1 output end is connected.2nd grade includes two 1 × 2 modulators, respectively the second modulator 3, third modulator 4, and second adjusts
The first input end of device 3 processed is connected with the first output end of the 1st grade of the first modulator 2, the first input end of third modulator 4
It is connected with the second output terminal of the first modulator 2.The third level includes 41 × 2 modulator devices, respectively the 4th modulator 5,
5th modulator 6, the 6th modulator 7 and the 7th modulator 8, wherein the first input end of the 4th modulator 5 and the second of the 2nd grade
First output end of modulator 3 is connected, the second output of the first input end of the 5th modulator 6 and the 2nd grade of the second modulator 3
End is connected, and the first input end of the 6th modulator 7 is connected with the first output end of the 2nd grade of third modulator 4, the 7th modulator
8 first input end is connected with the second output terminal of the 2nd grade of third modulator 4.
Refering to Fig. 3, Fig. 3 is the functional electrode schematic diagram of the cascade modulation chip embodiment of photon analog-to-digital conversion of the present invention,
The functional electrode includes DC electrode, radio-frequency electrode and hot phase shifting electrodes.The DC electrode is load direct current signal,
Guarantee that modulator works normally；The hot phase shifting electrodes are load direct current signal, and modulator operating point is arranged；The radio frequency
Electrode is load high-frequency signal.The DC electrode is located at left and right sides of chip top, respectively to 8 modulated structure power supplies；
The radio-frequency electrode is located at chip lower left side, provides radiofrequency signal to 8 modulated structures respectively；The DC electrode is located at
Chip lower right side provides hot phase shift signal to 8 modulated structures respectively.
Refering to Fig. 4, Fig. 4 is the optical port schematic diagram of the cascade modulation chip embodiment of photon analog-to-digital conversion of the present invention, by
Figure is as it can be seen that the optical port of the present embodiment includes to optical port, light input port, output test port and test port.Optical port
Two sides be to optical port, there are 1 light input port, 8 output test ports and 7 test ports in the centre of optical port.Its
In, optical port is used when to light, the reference as entering light；1 light input port is first in cascaded modulator chip
The input port of modulated structure, the i.e. input port of sampling gate；8 output test ports are, are the 8 of 3rd level demux architecture
The output test port of a modulated structure, including modulated structure 5 exports test port 1, modulated structure 5 exports test port 2, adjusts
Structure 6 processed exports test port 1, modulated structure 6 exports test port 2, modulated structure 7 exports test port 1, modulated structure 7
Export test port 2, modulated structure 8 exports test port 1, modulated structure 8 exports test port 2；7 test ports are tune
1 to 2 input test port of structure processed, 2 to 3 input test port of modulated structure, 2 to 4 input test port of modulated structure, modulation
3 to 5 input test port of structure, 3 to 6 input test port of modulated structure, 4 to 7 input test port of modulated structure and modulation
8 input test port of structure.
It can add or be not added delay waveguide in the cascaded modulator chip before each modulated structure.
Modulated structure on the chip can be used that silicon based SOI is integrated, body silicon substrate is integrated, silicon substrate LiNbO_3 film collection
It is integrated at, Bonded on Silicon Substrates lithium niobate, graphene is integrated, heterogeneous semiconductor is integrated or the modes such as semiconductor Manufacturing resource are realized, but
It is without being limited thereto.
Modulated structure on the chip can be used Mach-Zehnder (MZ) single armed interferometric modulator structure (MZI), recommend
Formula MZ both arms interferometric modulator structure, but not limited to this.
The present invention demultiplexes the Optical Sampling pulse of high-speed using cascade modulated structure on one chip step by step
With effectively reducing Channel Mismatch.As the core cell of photon analog-to-digital conversion, for realizing the small-sized of photon analog-to-digital conversion
Change, low-power consumption, high stability have the function of very crucial.
Claims (4)
1. a kind of cascaded modulator chip of photon analog-to-digital conversion, which is characterized in that on one chip include that multiple modulation are tied
Structure, functional electrode and optical port,
Multiple modulated structures include gloss spline structure and multi-channel parallel demux architecture, the gloss spline structure packet
Containing 1 grade 1 × 1 of modulated structure, for realizing the sampling of time domain consecutive variations electric signal；The multi-channel parallel demultiplexes knot
Structure includes the modulated structure of N grade 1 × 2, and the 1st grade includes one 1 × 2 modulated structure, and the 2nd grade includes two 1 × 2 modulation knots
Structure, 3rd level include four 1 × 2 modulated structure ..., N grade include 2N-1A 1 × 2 modulated structure；1st grade 1 × 2
The input terminal of modulated structure is connected with the output end of the gloss spline structure, the output end point of the 1st grade 1 × 2 of modulated structure
The input terminal of modulated structure not with the 2nd grade two 1 × 2 is connected, the output end of each 2nd grade 1 × 2 of modulated structure respectively with
The input terminal for the modulated structure that 3rd level is two 1 × 2 is connected, and so on, to generate 2NThe output channel of road demultiplexing, is used
In the multichannel demultiplexing for realizing high-speed light sample sequence；The output end of the gloss spline structure directly with multi-channel parallel solution
The input terminal of multiplexing structure is connected；
The functional electrode includes DC electrode, radio-frequency electrode and hot phase shifting electrodes, and the DC electrode includes N number of, position
In the left and right sides on chip top, power respectively to N number of modulated structure；The radio-frequency electrode (RF) is comprising N number of, positioned at chip
Lower left side provides radiofrequency signal to N number of modulated structure respectively；The hot phase shifting electrodes (R) are comprising N number of, positioned at chip bottom right
Side provides hot phase shift signal to N number of modulated structure respectively；
The optical port includes to optical port, light input port, exports test port and test port, described to optical port
It is 2, positioned at the two sides of optical port, is used when to light, the reference being aligned as optical fiber with the entering light port of modulator；It is described
Input port be 1, be the input terminal of first order modulated structure, the i.e. input terminal of gloss spline structure；The output test
Port is the 2 of N gradesN-1The output test port of a modulated structure amounts to 2NIt is a；The test port is multi-channel parallel
The input port of modulated structure in demux architecture amounts to 2N- 1.
2. the cascaded modulator chip of photon analog-to-digital conversion according to claim 1, which is characterized in that the grade joint debugging
It can add or be not added delay line in device chip processed before each modulated structure.
3. the cascaded modulator chip of photon analog-to-digital conversion according to claim 1, which is characterized in that the chip is adopted
It is integrated with silicon based SOI, body silicon substrate is integrated, silicon substrate LiNbO_3 film is integrated, Bonded on Silicon Substrates lithium niobate is integrated, graphene is integrated, partly
The heterogeneous integrated or semiconductor Manufacturing resource of conductor.
4. the cascaded modulator chip of photon analog-to-digital conversion according to any one of claims 1 to 3, which is characterized in that institute
The single modulated structure stated is Mach-Zehnder (MZ) single armed interferometric modulator structure (MZI) or push-pull type MZ both arms interferometric modulator
Structure.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111478729A (en) * | 2020-04-07 | 2020-07-31 | 上海交通大学 | Method for testing performance of demultiplexing module in optical analog-to-digital conversion system |
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| CN106933001A (en) * | 2017-05-04 | 2017-07-07 | 上海交通大学 | Based on the photon modulus conversion chip that silicon light is integrated |
| CN106990642A (en) * | 2017-05-31 | 2017-07-28 | 上海交通大学 | The optical analog to digital conversion device demultiplexed based on modulator multichannel |
| US10069619B1 (en) * | 2011-08-05 | 2018-09-04 | Rockwell Collins, Inc. | Optical sample and hold system and method |
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| CN106933001A (en) * | 2017-05-04 | 2017-07-07 | 上海交通大学 | Based on the photon modulus conversion chip that silicon light is integrated |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111478729A (en) * | 2020-04-07 | 2020-07-31 | 上海交通大学 | Method for testing performance of demultiplexing module in optical analog-to-digital conversion system |
| CN111478729B (en) * | 2020-04-07 | 2022-10-11 | 上海交通大学 | Method for testing performance of demultiplexing module in optical analog-to-digital conversion system |
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Application publication date: 20191015 |