CN110324272B - Fast carrier recovery system and method based on combined ring - Google Patents
Fast carrier recovery system and method based on combined ring Download PDFInfo
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- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
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Abstract
The invention relates to the technical field of communication, in particular to a quick carrier recovery system and a method based on a combined ring, the quick carrier recovery system based on the combined ring comprises a costas ring, a universal carrier recovery ring and a selection switch, the costas ring and the universal carrier recovery ring form the combined ring, in the quick carrier recovery method based on the combined ring, a section of pulse data with a frame structure consisting of a synchronous head and synchronous data is preset, the synchronous head comprises single carrier data and fixed data, and a carrier recovery system combining a costas ring and a universal carrier recovery ring is used for capturing and tracking the pulse data, so that the carrier recovery rate is improved, the quick carrier recovery is realized, the frequency deviation after carrier recovery is ensured not to be increased along with the increase of working time, and the requirement of high accuracy of carrier recovery under shorter carrier recovery time is met.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a fast carrier recovery system and a fast carrier recovery method based on a combined ring.
Background
In a system for transmitting short-time data pulses by a Quadrature Amplitude Modulation (QAM) method, the carrier recovery speed of a coherent demodulation system is a key index for evaluating the quality of the coherent demodulation system. The carrier recovery algorithm of Quadrature Amplitude Modulation (QAM) generally includes a decision feedback algorithm, a general carrier recovery algorithm, a polarity decision phase detection algorithm, and the like. The decision feedback algorithm and the general carrier recovery algorithm have the characteristics of small capture range and good tracking performance, wherein the small capture range means that capture cannot be realized when the deviation between a local carrier and a received carrier frequency is large; the polarity decision phase detection algorithm has the characteristics of large capture range and poor tracking performance, and the poor tracking performance is that the deviation of the continuously tracked and received carrier frequency becomes larger after long-time signal reception. Under the condition that the carrier recovery time required to be met is short, the carrier recovery algorithms have some defects, so that the carrier recovery algorithms cannot meet the requirements.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the fast carrier recovery system and method based on the combined ring are provided, and the requirement of high accuracy of carrier recovery under short carrier recovery time is met.
In order to solve the technical problems, the invention adopts the technical scheme that:
a fast carrier recovery system based on a combined ring comprises a costas ring, a universal carrier recovery ring and a selection switch;
the costas loop comprises a first multiplier, two first low-pass filters, a first phase detector and a first loop filter, the common carrier recovery loop comprises a second multiplier, two second low-pass filters, a second phase detector and a second loop filter, the costas loop and the common carrier recovery loop share a numerically controlled oscillator, and the selector switch comprises a first selector switch and a second selector switch;
the output end of the first multiplier is respectively connected with the input end of one of the two first low-pass filters and the input end of one of the two second low-pass filters, the output end of the second multiplier is respectively connected with the input end of the other one of the two first low-pass filters and the input end of the other one of the two second low-pass filters, the output ends of the two first low-pass filters and the output ends of the two second low-pass filters are respectively connected with the input end of a first selector switch, the output end of the first selector switch is respectively connected with the input end of a first phase discriminator and the input end of a second phase discriminator, the output end of the first phase discriminator is connected with the input end of the first loop filter, and the output end of the second phase discriminator is connected with the input end of the second loop filter, the output end of the first loop filter and the output end of the second loop filter are respectively connected with the input end of a second selection switch, the output end of the second selection switch is connected with the input end of a numerically-controlled oscillator, and the output end of the numerically-controlled oscillator is respectively connected with the input end of a first multiplier and the input end of a second multiplier.
A recovery method of a fast carrier recovery system based on a combined ring comprises the following steps:
s1, presetting first pulse data with a first character number and transmitting the first pulse data, wherein the first pulse data comprise a synchronization head and synchronization data which are sequentially and continuously arranged, the synchronization head comprises single carrier data with a second character number, first fixed data with a third character number and second fixed data with a fourth character number, which are sequentially and continuously arranged, the first fixed data is used for bit synchronization, and the second fixed data is used for frame synchronization, and the character number of the synchronization data is a fifth character number;
s2, receiving the second pulse data and converting the second pulse data into corresponding digital signals, when the corresponding digital signals are identified to be larger than a preset threshold value, operating a costas loop to start capturing and recording the number of characters, and starting timing to obtain timing duration; when the timing duration is equal to the duration of a preset threshold, determining whether the first digital signals corresponding to the second pulse data in the timing duration are all greater than the preset threshold, if so, performing step S3;
s3, judging whether the number of characters recorded in the step S2 is equal to a second number of characters, if so, acquiring a digital signal captured by the costas ring as single carrier data, carrying out carrier coarse synchronization according to the single carrier data, operating a universal carrier recovery ring to start capturing while stopping the costas ring, and recording the number of characters again;
s4, judging whether the character number re-recorded in the step S3 is equal to the third character number, if so, acquiring the digital signal captured by the universal carrier recovery loop, taking the digital signal as first fixed data, re-recording the character number and continuing to capture the digital signal;
s5, judging whether the character number re-recorded in the step S4 is equal to a fourth character number, if so, acquiring a digital signal captured by a general carrier recovery loop as second fixed data, and performing carrier fine synchronization according to the first fixed data and the second fixed data; recording the number of characters again and continuing to capture;
and S6, judging whether the character number re-recorded in the step S5 is equal to the fifth character number, if so, acquiring the digital signal captured by the universal carrier recovery loop to obtain synchronous data.
The invention has the beneficial effects that: the carrier recovery system combining the costas loop and the universal carrier recovery loop is arranged, pulse data with a section of frame structure consisting of the synchronization head and the synchronization data is preset, the synchronization head comprises single carrier data and fixed data, the pulse data is captured and tracked by the carrier recovery system combining the costas loop and the universal carrier recovery loop, the carrier recovery rate is improved, the carrier rapid recovery is realized, the frequency deviation after carrier recovery cannot increase along with the increase of working time, and the requirement of high accuracy of carrier recovery under shorter carrier recovery time is met.
Drawings
Fig. 1 is a schematic diagram of a fast carrier recovery system based on a combined ring according to the present invention;
FIG. 2 is a diagram illustrating a fast carrier recovery method based on a combined ring according to the present invention;
fig. 3 is a schematic structural diagram of first pulse data of the fast carrier recovery method based on a combined loop according to the present invention;
FIG. 4 is a time domain waveform diagram of a whole frame signal of first pulse data of the fast carrier recovery method based on the combinational loop of the present invention;
FIG. 5 is a diagram of a simulation scenario of the fast carrier recovery method based on a combined ring according to the present invention;
fig. 6 is a statistical chart of the simulated bit error rate of the fast carrier recovery method based on the combined ring according to the present invention.
Detailed Description
In order to explain technical contents, achieved objects, and effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
Referring to fig. 1 to 6, a fast carrier recovery system based on a combined ring according to the present invention includes a costas ring, a general carrier recovery ring, and a selection switch;
the costas loop comprises a first multiplier, two first low-pass filters, a first phase detector and a first loop filter, the common carrier recovery loop comprises a second multiplier, two second low-pass filters, a second phase detector and a second loop filter, the costas loop and the common carrier recovery loop share a numerically controlled oscillator, and the selector switch comprises a first selector switch and a second selector switch;
the output end of the first multiplier is respectively connected with the input end of one of the two first low-pass filters and the input end of one of the two second low-pass filters, the output end of the second multiplier is respectively connected with the input end of the other one of the two first low-pass filters and the input end of the other one of the two second low-pass filters, the output ends of the two first low-pass filters and the output ends of the two second low-pass filters are respectively connected with the input end of a first selector switch, the output end of the first selector switch is respectively connected with the input end of a first phase discriminator and the input end of a second phase discriminator, the output end of the first phase discriminator is connected with the input end of the first loop filter, and the output end of the second phase discriminator is connected with the input end of the second loop filter, the output end of the first loop filter and the output end of the second loop filter are respectively connected with the input end of a second selection switch, the output end of the second selection switch is connected with the input end of a numerically-controlled oscillator, and the output end of the numerically-controlled oscillator is respectively connected with the input end of a first multiplier and the input end of a second multiplier.
The digital-to-analog converter is capable of converting pulse data into digital signals.
As can be seen from the above description, the costas loop and the general carrier recovery loop have a plurality of common component digitally controlled oscillators and selection switches, the costas loop and the general carrier recovery loop use components of the other side, such as the first low pass filter and the second low pass filter, and the costas loop and the general carrier recovery loop are structurally inseparable, so that the common components improve the working efficiency and save resources.
Furthermore, the device also comprises a counter for recording the number of characters, and the counter is respectively and electrically connected with an external control chip and the selection switch.
As can be seen from the above description, the counter can record the number of characters on the pulse data, and provides an effective means for the costas loop and the general carrier recovery loop to capture the pulse data, and under the condition that the frame structure of the pulse data is known, after the preset number of characters are recorded, a signal is sent to an external control chip, and the control chip sends a control signal to the selection switch, so that switching can be performed between the costas loop and the general carrier recovery loop in time, thereby increasing the speed of carrier recovery.
Further, the device also comprises a timer which is respectively and electrically connected with an external control chip, the selection switch and the analog-to-digital converter.
As can be seen from the above description, after the analog-to-digital converter converts the pulse data into the digital signal, the counter can start timing, and when the digital signal is always greater than the preset threshold value within the duration of the preset threshold value, it is determined that the signal capture of the required pulse data has been completed, so that the costas loop and the general carrier recovery loop are started to operate.
Furthermore, the first selection switch includes four input ends, and the output ends of the two first low-pass filters and the output ends of the two second low-pass filters are respectively connected with the four input ends of the first selection switch in a one-to-one correspondence manner.
Further, first select switch includes four outputs, first phase discriminator and second phase discriminator all include two inputs, two outputs in four of first select switch are connected with two inputs of first phase discriminator, two other outputs in four of first select switch are connected with two inputs of second phase discriminator.
As can be seen from the above description, because two first low-pass filters are arranged in the costas loop and two second low-pass filters are arranged in the general carrier recovery loop, the first selection switch needs to be provided with four input ends for the two first low-pass filters and the two second low-pass filters to transmit data, and the first selection switch is provided with four output ends for respectively transmitting the data transmitted by the two first low-pass filters and the two second low-pass filters to the first phase discriminator and the second phase discriminator in a one-to-one correspondence manner.
A recovery method of a fast carrier recovery system based on a combined ring comprises the following steps:
s1, presetting first pulse data with a first character number and transmitting the first pulse data, wherein the first pulse data comprise a synchronization head and synchronization data which are sequentially and continuously arranged, the synchronization head comprises single carrier data with a second character number, first fixed data with a third character number and second fixed data with a fourth character number, which are sequentially and continuously arranged, the first fixed data is used for bit synchronization, and the second fixed data is used for frame synchronization, and the character number of the synchronization data is a fifth character number;
s2, receiving the second pulse data and converting the second pulse data into corresponding digital signals, when the corresponding digital signals are identified to be larger than a preset threshold value, operating a costas loop to start capturing and recording the number of characters, and starting timing to obtain timing duration; when the timing duration is equal to the duration of a preset threshold, determining whether the first digital signals corresponding to the second pulse data in the timing duration are all greater than the preset threshold, if so, performing step S3;
s3, judging whether the number of characters recorded in the step S2 is equal to a second number of characters, if so, acquiring a digital signal captured by the costas ring as single carrier data, carrying out carrier coarse synchronization according to the single carrier data, operating a universal carrier recovery ring to start capturing while stopping the costas ring, and recording the number of characters again;
s4, judging whether the character number re-recorded in the step S3 is equal to the third character number, if so, acquiring the digital signal captured by the universal carrier recovery loop, taking the digital signal as first fixed data, re-recording the character number and continuing to capture the digital signal;
s5, judging whether the character number re-recorded in the step S4 is equal to a fourth character number, if so, acquiring a digital signal captured by a general carrier recovery loop as second fixed data, and performing carrier fine synchronization according to the first fixed data and the second fixed data; recording the number of characters again and continuing to capture;
and S6, judging whether the character number re-recorded in the step S5 is equal to the fifth character number, if so, acquiring the digital signal captured by the universal carrier recovery loop to obtain synchronous data.
From the above description, the beneficial effects of the present invention are: the carrier recovery system combining the costas loop and the universal carrier recovery loop is arranged, pulse data with a section of frame structure consisting of the synchronization head and the synchronization data is preset, the synchronization head comprises single carrier data and fixed data, the pulse data is captured and tracked by the carrier recovery system combining the costas loop and the universal carrier recovery loop, the carrier recovery rate is improved, the carrier rapid recovery is realized, the frequency deviation after carrier recovery cannot increase along with the increase of working time, and the requirement of high accuracy of carrier recovery under shorter carrier recovery time is met.
Referring to fig. 1, a first embodiment of the present invention is:
a fast carrier recovery system based on a combined ring comprises an analog-to-digital converter, a costas ring, a universal carrier recovery ring, a selection switch, a counter and a timer;
the costas loop comprises a first multiplier, two first low-pass filters, a first phase detector and a first loop filter, the common carrier recovery loop comprises a second multiplier, two second low-pass filters, a second phase detector and a second loop filter, the costas loop and the common carrier recovery loop share a numerically controlled oscillator, and the selector switch comprises a first selector switch and a second selector switch;
the output end of the first multiplier is respectively connected with the input end of one of the two first low-pass filters and the input end of one of the two second low-pass filters, the output end of the second multiplier is respectively connected with the input end of the other one of the two first low-pass filters and the input end of the other one of the two second low-pass filters, the first selection switch comprises four input ends, the output ends of the two first low-pass filters and the output ends of the two second low-pass filters are respectively connected with the four input ends of the first selection switch in a one-to-one correspondence manner, the first selection switch comprises four output ends, the first phase discriminator and the second phase discriminator both comprise two input ends, and the two output ends of the four first selection switches are connected with the two input ends of the first phase discriminator, the other two output ends of the four first selector switches are connected with two input ends of a second phase discriminator, the output end of the first phase discriminator is connected with the input end of the first loop filter, the output end of the second phase discriminator is connected with the input end of the second loop filter, the output ends of the first loop filter and the second loop filter are respectively connected with the input end of the second selector switch, the output end of the second selector switch is connected with the input end of the numerically-controlled oscillator, the first multiplier and the second multiplier are respectively provided with two input ends, the output end of the numerically-controlled oscillator is respectively connected with one of the two input ends of the first multiplier and one of the two input ends of the second multiplier, the output end of the analog-to-digital converter is respectively connected with the output end of the numerically-controlled oscillator and the other of the two input ends of the first multiplier and the two input ends of the second multiplier The other input end of the input ends is connected, and the analog-to-digital converter can convert the pulse data into a digital signal. The costas loop and the universal carrier recovery loop are structurally inseparable, and share elements to improve the working efficiency and save resources.
The counter is used for recording the number of characters of pulse data and provides an effective means for a costas loop and a general carrier recovery loop to capture the pulse data of a carrier, the counter is respectively electrically connected with an external control chip and the selector switch, under the condition that the frame structure of the pulse data is known, after the preset number of characters are recorded, a signal is sent to the external control chip, and the control chip sends a control signal to the selector switch to be capable of switching between the costas loop and the general carrier recovery loop in time, so that the carrier recovery speed is improved.
The timer is respectively electrically connected with an external control chip, the selection switch and the analog-to-digital converter, when the analog-to-digital converter converts the pulse data into the digital signal, the counter starts timing, judges that the signal capture of the required pulse data is finished within the duration of a preset threshold value and when the digital signal is always greater than the preset threshold value, and starts the costas loop and the universal carrier recovery loop to work.
Referring to fig. 2 to 5, a second embodiment of the present invention is:
a recovery method of a fast carrier recovery system based on a combined ring comprises the following steps:
s1, as shown in fig. 3, presetting a first pulse data with a first number of characters (300 characters) and transmitting the first pulse data, where the first pulse data includes a synchronization header and synchronization data arranged in sequence, the synchronization header includes a single carrier data with a second number of characters (30 characters), a first fixed data with a third number of characters (23 characters) for bit synchronization and a second fixed data with a fourth number of characters (7 characters) for frame synchronization, which are arranged in sequence, and the number of characters of the synchronization data is a fifth number of characters (240 characters);
fig. 4 is a time domain waveform diagram of the whole frame signal of the first pulse data, and it can be clearly seen that the time domain waveform is composed of three parts, namely, a pure carrier signal, a fixed variable signal with different amplitudes, and a random signal, and corresponds to two parts of a synchronization header and useful data, respectively;
s2, receiving second pulse data and converting the second pulse data into corresponding digital signals, and when the corresponding digital signals are identified to be larger than a preset threshold value, and the threshold value of the digital signals of the pulse data is 2048, operating a costas loop to start capturing and recording the number of characters, and starting timing to obtain timing duration; when the timing duration is equal to the duration of a preset threshold, the duration is preset to 7 μ S, whether the first digital signals corresponding to the second pulse data in the timing duration are all larger than the preset threshold is judged, if yes, the step S3 is performed
Through the steps, the interference data can be prevented from being identified as the first pulse data;
s3, judging whether the number of characters recorded in the step S2 is equal to a second number of characters (30 characters), if so, acquiring a digital signal captured by the costas ring as single carrier data, carrying out coarse carrier synchronization according to the single carrier data, stopping the costas ring, simultaneously operating the universal carrier recovery ring to start capturing, and recording the number of characters again;
s4, judging whether the character number re-recorded in the step S3 is equal to a third character number (23 characters), if so, acquiring a digital signal captured by the universal carrier recovery loop, taking the digital signal as first fixed data, re-recording the character number and continuously capturing the digital signal;
s5, judging whether the character number re-recorded in the step S4 is equal to a fourth character number (7 characters), if so, acquiring a digital signal captured by a general carrier recovery loop as second fixed data, and carrying out carrier fine synchronization according to the first fixed data and the second fixed data; recording the number of characters again and continuing to capture;
the first fixed data is used for bit synchronization, and the bit synchronization is to extract the occurrence frequency of symbols by identifying the maximum value point and the minimum value point of the amplitude change of the symbols, so that each symbol can obtain the optimal demodulation decision; the second fixed data is used for frame synchronization, and the frame synchronization is to distinguish the starting position of the synchronous data from the received signal by using known 7 fixed symbols;
s6, judging whether the character number re-recorded in the step S5 is equal to the fifth character number (240 characters), if so, acquiring the digital signal captured by the universal carrier recovery loop to obtain synchronous data;
the second phase discriminator obtains the actual coordinate of each symbol in the synchronous data, and the second phase discriminator adjusts the integer controlled oscillator by taking the difference value between the actual coordinate of each symbol in the synchronous data and the nearest constellation reference point as a phase error signal so as to realize carrier tracking.
The time for capturing the single carrier data by the costas loop is 8 mus, the total time for capturing the first fixed data, the second fixed data and the synchronous data by the universal carrier recovery loop is 72 mus, the capturing process is judged in time according to the recording duration of the timer, and whether the required first pulse data is captured is further determined.
Fig. 5 is a simulation of the recovery method of the above fast carrier recovery system based on the combined ring, where the first 8us is the carrier synchronization of the costas ring, in order to achieve fast synchronization, the filter bandwidth is set to be large, and it can be seen that much noise enters, but by averaging the values in a period of time after synchronization, the deviation of the obtained carrier synchronization result (the frequency deviation ratio of the local carrier generated by the digitally controlled oscillator after loop adjustment to the actually received carrier frequency) can be reduced to 10-4And the requirement of the general carrier recovery loop on the frequency offset range is met.
FIG. 6 is a statistical view of simulated bit error rate of the recovery method for fast carrier recovery system based on the combined ring, which measures the bit error rate of a certain number of samples through simulation, and reduces the bit error rate to 10 when the SNR is higher than 20dB-4The following shows that the accuracy of the combined loop for carrier recovery is high.
Quadrature Amplitude Modulation (QAM) usually uses a general carrier recovery loop, but the general carrier recovery loop has a disadvantage of poor capturing capability, and when the local carrier frequency is greatly deviated from the received carrier frequency, capturing cannot be achieved. The method utilizes the characteristic of short capturing time of the costas loop, improves the carrier recovery rate, and overcomes the defect of poor capturing capability of the general carrier recovery loop; on the other hand, the universal carrier recovery loop has good tracking performance, and the defect of poor tracking performance of the costas loop under the condition of quick acquisition is also overcome. By complementarily combining the two loops, rapid carrier recovery is achieved, and a critical effect is played on the improvement of Quadrature Amplitude Modulation (QAM) demodulation performance.
In summary, the carrier recovery system provided by the invention combines the costas loop and the general carrier recovery loop, and then presets the pulse data with a frame structure composed of the synchronization header and the synchronization data, wherein the synchronization header comprises the single carrier data and the fixed data, and the carrier recovery system combining the costas loop and the general carrier recovery loop is used to capture and track the pulse data, so that the carrier recovery rate is improved, the carrier fast recovery is realized, the frequency deviation after the carrier recovery is ensured not to be increased along with the increase of the working time, and the requirement of high accuracy of the carrier recovery in a short carrier recovery time is met.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to the related technical fields, are included in the scope of the present invention.
Claims (6)
1. A recovery method of a fast carrier recovery system based on a combined ring is characterized in that the fast carrier recovery system of the combined ring comprises a costas ring, a universal carrier recovery ring and a selection switch;
the costas loop comprises a first multiplier, two first low-pass filters, a first phase detector and a first loop filter, the common carrier recovery loop comprises a second multiplier, two second low-pass filters, a second phase detector and a second loop filter, the costas loop and the common carrier recovery loop share a numerically controlled oscillator, and the selector switch comprises a first selector switch and a second selector switch;
the output end of the first multiplier is respectively connected with the input end of one of the two first low-pass filters and the input end of one of the two second low-pass filters, the output end of the second multiplier is respectively connected with the input end of the other one of the two first low-pass filters and the input end of the other one of the two second low-pass filters, the output ends of the two first low-pass filters and the output ends of the two second low-pass filters are respectively connected with the input end of a first selector switch, the output end of the first selector switch is respectively connected with the input end of a first phase discriminator and the input end of a second phase discriminator, the output end of the first phase discriminator is connected with the input end of the first loop filter, and the output end of the second phase discriminator is connected with the input end of the second loop filter, the output end of the first loop filter and the output end of the second loop filter are respectively connected with the input end of a second selection switch, the output end of the second selection switch is connected with the input end of a digital controlled oscillator, and the output end of the digital controlled oscillator is respectively connected with the input end of a first multiplier and the input end of a second multiplier;
the recovery method of the fast carrier recovery system of the combined ring comprises the following steps:
s1, presetting first pulse data with a first character number and transmitting the first pulse data, wherein the first pulse data comprise a synchronization head and synchronization data which are sequentially and continuously arranged, the synchronization head comprises single carrier data with a second character number, first fixed data with a third character number and second fixed data with a fourth character number, which are sequentially and continuously arranged, the first fixed data is used for bit synchronization, and the second fixed data is used for frame synchronization, and the character number of the synchronization data is a fifth character number;
s2, receiving the second pulse data and converting the second pulse data into corresponding digital signals, when the corresponding digital signals are identified to be larger than a preset threshold value, operating a costas loop to start capturing and recording the number of characters, and starting timing to obtain timing duration; when the timing duration is equal to the duration of a preset threshold, determining whether the first digital signals corresponding to the second pulse data in the timing duration are all greater than the preset threshold, if so, performing step S3;
s3, judging whether the number of characters recorded in the step S2 is equal to a second number of characters, if so, acquiring a digital signal captured by the costas ring as single carrier data, carrying out carrier coarse synchronization according to the single carrier data, operating a universal carrier recovery ring to start capturing while stopping the costas ring, and recording the number of characters again;
s4, judging whether the character number re-recorded in the step S3 is equal to the third character number, if so, acquiring the digital signal captured by the universal carrier recovery loop, taking the digital signal as first fixed data, re-recording the character number and continuing to capture the digital signal;
s5, judging whether the character number re-recorded in the step S4 is equal to a fourth character number, if so, acquiring a digital signal captured by a general carrier recovery loop as second fixed data, and performing carrier fine synchronization according to the first fixed data and the second fixed data; recording the number of characters again and continuing to capture;
and S6, judging whether the character number re-recorded in the step S5 is equal to the fifth character number, if so, acquiring the digital signal captured by the universal carrier recovery loop to obtain synchronous data.
2. The recovery method for a combined-loop-based fast carrier recovery system according to claim 1, further comprising an analog-to-digital converter, wherein the first multiplier and the second multiplier are both provided with two inputs, the output terminal of the digitally controlled oscillator is connected to one of the two inputs of the first multiplier and one of the two inputs of the second multiplier, respectively, and the output terminal of the analog-to-digital converter is connected to the other of the two inputs of the first multiplier and the other of the two inputs of the second multiplier, respectively, and the analog-to-digital converter is capable of converting the pulse data into a digital signal.
3. The recovery method of a combined ring based fast carrier recovery system according to claim 1, further comprising a counter for recording the number of characters, wherein the counter is electrically connected to an external control chip and the selection switch, respectively.
4. The recovery method for a combined ring based fast carrier recovery system according to claim 2, further comprising a timer, wherein the timer is electrically connected to the external control chip, the selection switch and the analog-to-digital converter, respectively.
5. The recovery method for a combined-loop-based fast carrier recovery system according to claim 1, wherein the first selection switch includes four input terminals, and the output terminals of the two first low-pass filters and the output terminals of the two second low-pass filters are respectively connected to the four input terminals of the first selection switch in a one-to-one correspondence.
6. The recovery method for a combined-loop-based fast carrier recovery system according to claim 5, wherein the first selection switch includes four output terminals, the first phase detector and the second phase detector each include two input terminals, two output terminals of the four first selection switches are connected to two input terminals of the first phase detector, and the other two output terminals of the four first selection switches are connected to two input terminals of the second phase detector.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106789790A (en) * | 2017-02-10 | 2017-05-31 | 天津中兴智联科技有限公司 | A kind of carrier wave frequency deviation adjusting method |
| CN108055224A (en) * | 2017-12-07 | 2018-05-18 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | 16QAM carrier synchronization loop genlocing detection methods |
| CN109067514A (en) * | 2018-08-21 | 2018-12-21 | 华清瑞达（天津）科技有限公司 | Digital high-speed parallel carrier synchronization device, method and digital communication receiver |
| CN109309641A (en) * | 2017-07-28 | 2019-02-05 | 西安电子科技大学 | A kind of QPSK base band recovery system resisting big frequency deviation |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106789790A (en) * | 2017-02-10 | 2017-05-31 | 天津中兴智联科技有限公司 | A kind of carrier wave frequency deviation adjusting method |
| CN109309641A (en) * | 2017-07-28 | 2019-02-05 | 西安电子科技大学 | A kind of QPSK base band recovery system resisting big frequency deviation |
| CN108055224A (en) * | 2017-12-07 | 2018-05-18 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | 16QAM carrier synchronization loop genlocing detection methods |
| CN109067514A (en) * | 2018-08-21 | 2018-12-21 | 华清瑞达（天津）科技有限公司 | Digital high-speed parallel carrier synchronization device, method and digital communication receiver |
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