CN110299318A - Wafer alignment method - Google Patents
Wafer alignment method Download PDFInfo
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- CN110299318A CN110299318A CN201910585997.4A CN201910585997A CN110299318A CN 110299318 A CN110299318 A CN 110299318A CN 201910585997 A CN201910585997 A CN 201910585997A CN 110299318 A CN110299318 A CN 110299318A
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- wafer
- power lens
- lens group
- high power
- alignment mark
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/8212—Aligning
- H01L2224/82121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/8213—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
The present invention provides a kind of wafer alignment method, it include: offer aligning equipment, aligning equipment includes at least two aligned units, each aligned units include the low power lens group and high power lens group that interval is arranged and moves synchronously, the integral multiple of the distance between low power lens group and high power lens the group distance between adjacent two alignment mark on wafer；An alignment mark in low power lens group search to the first wafer of face, while another alignment mark face on high power lens group and the first wafer and shooting its picture；An alignment mark in low power lens group search to the second wafer of face, while another alignment mark face on high power lens group and the second wafer and shooting its picture；Using high power lens group shooting picture as foundation, alignment is realized in the relative position for adjusting the first wafer and the second wafer.For the big fast searching of low power lens group field range to alignment mark, high power lens group image-capturing resolution is high, improves alignment precision while improving wafer alignment efficiency.
Description
Technical field
The invention belongs to semiconductor fields, and in particular to a kind of wafer alignment method.
Background technique
As the integrated level of semiconductor integrated circuit is higher and higher, the integrated level of transistor progressivelyes reach the upper limit in chip,
Therefore there is 3D integrated circuit (integrated circuit, IC) technology.3D integrated circuit is defined as a kind of system-level
Integrated morphology, 3D integrated circuit realize the perpendicular interconnection between multiple chips by bonding technology, increase the space of chip, mention
The high integrated level of transistor, while the operating rate of integrated circuit can also be improved, reduce the power consumption of integrated circuit.Currently, 3D
Integrated circuit technique has become one of important directions of IC design.
Being bonded for wafer and wafer is the key technology for realizing 3D integrated circuit, in wafer bond techniques, wafer bonding pair
Quasi- precision is important characterization parameter.The alignment precision defect of wafer bonding can seriously affect the back-end process of technique, more into one
Step will affect the connection of circuit, can reduce the yield of wafer.Cu-Cu bonding in wafer level is as a pass in 3D IC
Key technology has important application trend on high-end product.In Cu-Cu (copper is to copper) bonding, the precision of wafer bonding is outstanding
It is crucial, directly affects the circuit connection and functionality of technique.
In alignment procedures, alignment camera lens first searches the alignment mark on wafer, (the alignment mark i.e. on wafer after searching
It is being directed at camera lens within sweep of the eye) it is precisely aligned again so as to subsequent bonding.
When being directed at camera lens selection high power lens, the corresponding field range of high power lens is small, needs gradually to move alignment camera lens
The alignment mark that can just search on wafer is taken a long time, on the contrary clarity is high for high power lens when being precisely aligned later
Conducive to precisely aligning.
When being directed at camera lens and selecting low power lens, low power lens corresponds to that field range is big, and the alignment mark on wafer is easy to
It falls into the corresponding field range of low power lens, therefore the alignment mark on wafer can be searched within a short period of time, still
Low power lens clarity is low when being precisely aligned later is unfavorable for precisely aligning.
Therefore, at present in alignment procedures, alignment camera lens cannot always combine alignment efficiency and alignment precision.
Summary of the invention
Alignment precision is promoted while it is an object of the invention to improve wafer alignment efficiency.
To achieve the goals above, the present invention provides a kind of wafer alignment methods, comprising:
Aligning equipment is provided, the aligning equipment includes at least two aligned units, between each aligned units include
Every the low power lens group and high power lens group for being arranged and moving synchronously, the distance between the low power lens group and high power lens group
The integral multiple of distance between adjacent two alignment mark on the first wafer and the second wafer to be aligned；
An alignment mark in the low power lens group search to the first wafer of face, while the high power lens group and institute
Another alignment mark face on the first wafer is stated, the high power lens group shoots another alignment mark on first wafer
Picture；
An alignment mark in the low power lens group search to the second wafer of face, while the high power lens group and institute
Another alignment mark face on the second wafer is stated, the high power lens group shoots another alignment mark on second wafer
Picture；
Using high power lens group shooting picture as foundation, the relative position of first wafer and the second wafer is adjusted,
To realize alignment.
Further, the low power lens group includes the upper low power lens and lower low power lens of face setting, the high power
Lens group includes the upper high power lens and lower high power lens of face setting.
Further, upper low power lens and lower low power lens lock after being aligned up and down, upper high power lens and lower high power lens
It is locked after alignment up and down.
Further, the high power lens group is fixed on the lens barrel frame of the aligned units, adjusts the low power lens
Head group makes the spacing distance between the low power lens group and the high power lens group to right in the position of the lens barrel frame
The integral multiple of distance between adjacent two alignment mark on quasi- the first wafer and the second wafer, by the low power after adjustment
Lens group is fixed on the lens barrel frame.
Further, the alignment mark in the low power lens group search to the first wafer of face, while the high power
Another alignment mark face in lens group and first wafer, the high power lens group shoots another on first wafer
The picture of one alignment mark specifically includes: the mobile lens barrel frame drives the upper low power lens mobile and searches to face the
An alignment mark on one wafer simultaneously locks the lens barrel frame, while upper high power lens is located at another alignment on the first wafer
Right above label, the upper high power lens shoots the picture of another alignment mark on first wafer, removes first later
Wafer.
Further, the alignment mark in the low power lens group search to the second wafer of face, while the high power
Another alignment mark face in lens group and second wafer, the high power lens group shoots another on second wafer
The picture of one alignment mark specifically includes: the alignment mark of the second wafer is searched in the lower low power lens, mobile second is brilliant
Lower low power lens, locks the second wafer described in a round alignment mark face up on second wafer, with high power lens at present
Head is located at immediately below another alignment mark on the second wafer, and the lower high power lens shoots another pair on second wafer
The picture of fiducial mark note.
Further, using high power lens group shooting picture as foundation, first wafer and the second wafer are adjusted
Relative position, to realize that alignment specifically includes: using the upper high power lens and lower high power lens shooting picture as foundation, adjusting institute
The position of the first wafer is stated, to realize the alignment with second wafer.
Further, the spacing distance of the low power lens group and high power lens group is first wafer and the second wafer
An exposure field distance.
Further, the amplification factor of the upper high power lens and lower high power lens is greater than 5 times.
Further, the amplification factor of the upper low power lens and lower low power lens is less than 5 times.
Compared with prior art, the present invention provides a kind of wafer alignment methods, provide aligning equipment, the aligning equipment
Including at least two aligned units, each aligned units include the low power lens group and high power that interval is arranged and moves synchronously
Lens group, the distance between the low power lens group and high power lens group are the phase on the first wafer and the second wafer to be aligned
The integral multiple of distance between two adjacent alignment marks；Pass through reasonable disposition low power lens group and high power lens group, low power lens
Group field range greatly can fast searching alignment mark, high power lens group and another alignment mark face at the same time, high power lens
Group image-capturing resolution is high, improves the recognition efficiency of wafer alignment mark, improves wafer while improving wafer alignment efficiency
Alignment precision, to promote wafer bonding quality.
Detailed description of the invention
Fig. 1 is the wafer alignment method flow schematic diagram of the embodiment of the present invention；
Fig. 2 is the aligning equipment schematic diagram of the embodiment of the present invention；
Fig. 3 is the first wafer schematic diagram of the embodiment of the present invention；
Fig. 4 is the second wafer schematic diagram of the embodiment of the present invention；
Fig. 5-a to Fig. 7 is each step schematic diagram of wafer alignment of the embodiment of the present invention；
Wherein, figures are as follows:
A- aligning equipment；B- aligned units；10- low power lens group；Low power lens under 101-；The upper low power lens of 102-；20-
High power lens group；High power lens under 201-；The upper high power lens of 202-；30- lens barrel frame；The first wafer of 40-；401- exposure is single
Member；402- Cutting Road；The first alignment mark of 403-；The second wafer of 50-；501- exposing unit；502- Cutting Road；503- second is right
Fiducial mark note；40 '-the first wafer chucks；50 '-the second wafer chucks.
Specific embodiment
Wafer alignment method of the invention is further described below in conjunction with the drawings and specific embodiments.According to following
Illustrate, advantages and features of the invention will become apparent from.It should be noted that attached drawing is all made of very simplified form and using non-
Accurately ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
Fig. 1 is the wafer alignment method flow schematic diagram of the embodiment of the present invention, as shown in Figure 1, a kind of wafer alignment method,
Include:
Step S1, aligning equipment is provided, the aligning equipment includes at least two aligned units, each aligned units
Including the low power lens group and high power lens group interval setting and moved synchronously, between the low power lens group and high power lens group
Distance be the first wafer and the second wafer to be aligned on adjacent two alignment mark between distance integral multiple；
Step S2, the alignment mark in the described low power lens group search to the first wafer of face, while the high power lens
Head group and another alignment mark face on first wafer, the high power lens group shoots another on first wafer
The picture of alignment mark；
Step S3, the alignment mark in the described low power lens group search to the second wafer of face, while the high power lens
Head group and another alignment mark face on second wafer, the high power lens group shoots another on second wafer
The picture of alignment mark；
Step S4, using high power lens group shooting picture as foundation, first wafer and the second wafer are accurately adjusted
Relative position, with realize alignment.
It should be appreciated that step S2 and step S3 shoot the figure of first wafer and the alignment mark on the second wafer respectively
Piece, the picture for first shooting the alignment mark of the first wafer or the second wafer can be with so step S2's and step S3 be successive
Without limitation, first carrying out step S2 and executing step S3 again or first carry out step S3 and execute step S2 again is possible sequence.
Below in conjunction with Fig. 2~Fig. 7, the wafer alignment method of the embodiment of the present invention is discussed in detail.As shown in Fig. 2, offer pair
Quasi- equipment A, the aligning equipment include at least two aligned units B, and the alignment of two wafers is usually required through two wafers
The alignment of corresponding two different locations is completed, and two wafers corresponding alignment position is distributed around an alignment
Unit B.Each aligned units B includes spaced low power lens group 10 and high power lens group 20, the low power lens
Group 10 includes the upper low power lens 102 and lower low power lens 101 of face setting, and the high power lens group includes the upper of face setting
High power lens 202 and lower high power lens 201.Upper low power lens 102 and about 101 lower low power lens lock after being aligned, upper high power
Camera lens 202 and about 201 lower high power lens lock after being aligned.The upper high power lens 202 and lower high power lens 201 are configured
For the optical lens of camera.
The first adjacent alignment mark of at least two groups is distributed in first wafer, and first alignment mark can also be with the period point
Cloth.The second adjacent alignment mark of at least two groups is distributed in second wafer, and second alignment mark can also be with period profile.One
A aligned units B for realizing one group of first adjacent alignment mark and one group of second adjacent alignment mark alignment.It is described
Second alignment mark and first alignment mark are correspondingly arranged；The distance between first adjacent alignment mark is equal to adjacent
The distance between second alignment mark.Second alignment mark and first alignment mark are metal pattern or dielectric layer figure
Case.Metal material in metal pattern is any one in aluminium, copper and tungsten.Dielectric layer material in medium layer pattern is, for example,
Silica and/or silicon nitride.The period of second alignment mark is equal with the period of the first alignment mark.
Fig. 3 is the first wafer schematic diagram of the embodiment of the present invention；Illustratively, as shown in figure 3, the first wafer 40 is divided into
The edge of several exposing units 401,403 period profile of the first alignment mark, each exposing unit 401 is all provided with
There is the first alignment mark 403.In the present embodiment, Cutting Road 402, first alignment are equipped between adjacent exposing unit 401
Label 403 is formed on the Cutting Road 402.The period of first alignment mark 403 be, for example, 1 shot (exposure field) away from
From, that is, adjacent the distance between two exposing units 401.Shot (exposure field) refers to Polaroid the covered area of litho machine
Domain.The pith hood (mask) of photoetching be in itself it is rectangular, it is made of many grids, and each grid is called one
Shot, it is the minimum unit of exposure.During making integrated circuit on wafer, for the convenience of technique production, wafer
It is the row of being repeated cyclically on wafer that several shot, which can be divided into, usually using Shot as the basic unit in production
Column.It in each basic Shot unit, and include one or more than one chip (Die).
Fig. 4 is the second wafer schematic diagram of the embodiment of the present invention；Illustratively, as shown in Figure 3 and Figure 4, the second wafer 50
With the structure similar with the first wafer 40, the first alignment of the second alignment mark 503 and the first wafer 40 of the second wafer 50
Label 403 is correspondingly arranged.Second wafer 50 is divided into several exposing units 501,503 period of the second alignment mark point
The edge of cloth, each exposing unit 501 is equipped with the second alignment mark 503.In the present embodiment, adjacent exposing unit
Cutting Road 502 is equipped between 501, first alignment mark 503 is formed on the Cutting Road 502.
It may not for the distance between adjacent two alignment mark of wafer of the bonding to be aligned of different model
It is identical, need to adjust the distance between the low power lens group and high power lens group accordingly, specifically, in conjunction with Fig. 2, the height
Times lens group 20 is fixed on the lens barrel frame 30 of the aligned units B, to guarantee the accurate of high power lens group 20, usually as far as possible
Motionless high power lens group 20 adjusts the low power lens group 10 in the position of the lens barrel frame 30, makes the low power lens group
10 with the distance between the high power lens group 20 be two adjacent alignments on the first wafer and the second wafer to be aligned
(such as N times, N is integer to the integral multiple of distance, and 10) N is less than or equal to, when N is 1, when two adjacent alignment marks between label
Between distance be 1 shot (exposure field) apart from when, between the low power lens group 10 and the high power lens group 20 away from
From to be also with a distance from 1 shot (exposure field).Adapt to the distance between low power lens group 10 and the high power lens group 20
The wafer of the bonding to be aligned of different model.The lens barrel frame is, for example, guide rail.By the low power lens group 10 after adjusting
It is fixed on the lens barrel frame 30.Between the low power lens group 10 and high power lens group 20 of each aligned units B is adjusted
Gauge is both secured on lens barrel frame 30 from after, the low power lens group 10 synchronous fortune in moving process with high power lens group 20
Dynamic (opposing stationary).
Fig. 5-a and 5-b is the schematic diagram of the step S2 of the embodiment of the present invention；As shown in Fig. 3, Fig. 5-a and Fig. 5-b, step
In S2, specifically, the first wafer 40 of locking, the first wafer 40 are fixed on the first wafer chuck 40 '.The mobile lens barrel frame
30 drive upper low power lens 102 mobile and search the first alignment mark (such as 403a) of the first wafer 40, upper low after searching
Times camera lens 102 is moved to right above the first alignment mark and locks the lens barrel frame 30, and upper high power lens 202 is located at week at this time
Right above another first alignment mark (such as 403b) of phase distribution, the upper high power lens 202 shoots described another first pair
Fiducial mark remembers the picture of (such as 403b), the figure observed in upper low power lens 102 and upper high power lens 202 as shown in Fig. 5-b,
The first wafer chuck 40 ' is controlled later and carries 40 transverse shifting of the first wafer, removes the first wafer 40, so that up and down between camera lens
Have no occluder.
Fig. 6-a and 6-b is the schematic diagram of the step S3 of the embodiment of the present invention；As shown in Fig. 4, Fig. 6-a and Fig. 6-b, step
In S3, specifically, the second alignment mark (such as 503a) of the second wafer 50 is searched in lower low power lens 101, mobile second
Wafer 50 locks the until the second alignment mark (such as 503a) of the second wafer 50 is located at the surface of lower low power lens 101
Two wafers 50, high power lens 201 is located at immediately below another second alignment mark of period profile (such as 503b) at present for this, described
Lower high power lens 201 shoots the picture of another second alignment mark (such as 503b).Lower low power lens 101 and lower high power lens
The figure observed in first 201 is as shown in Fig. 6-b.
The upper high power lens 202 shoots the picture of another first alignment mark and the lower high power lens 201 is clapped
The picture transfer of another second alignment mark is taken the photograph to computer, for realizing alignment.
It describes an aligned units B in Fig. 2~Fig. 7 in detail and alignment mark is searched and shot near an alignment position
Process, the first wafer 40 and the corresponding alignment mark of the second wafer 50 can be described as alignment mark to (such as 403b and
503b), by being directed at two alignment marks pair, the first wafer 40 and the second wafer 50 can be aligned with each other.Two wafers are opposite
The alignment mark answered is to being distributed around an aligned units B.One aligned units B realize an alignment mark to (such as
403b and 503b) alignment during, the alignment of another alignment mark pair can be achieved at the same time in another aligned units B, another
A alignment mark to can with alignment mark to (such as 403b and 503b) on wafer mirror image be distributed.The height of two alignment marks pair
Times lens group shooting picture is transferred to computer, and computer carries out image procossing, calculate that the first wafer to be moved it is accurate away from
From, control the first wafer where the first wafer chuck 40 ', the first wafer is moved to the position precisely aligned with the second wafer
It sets, realizes the alignment of first wafer and the second wafer.When first wafer 40 and the second wafer 50 are aligned, described the
One alignment mark 403 and second alignment mark 503 at least have a common symmetry axis.
The amplification factor of the upper high power lens and lower high power lens is greater than 5 times.
The amplification factor of the upper low power lens and lower low power lens is less than 5 times.
In conclusion providing aligning equipment the present invention provides a kind of wafer alignment method, the aligning equipment is at least wrapped
Two aligned units are included, each aligned units include the low power lens group and high power lens that interval is arranged and moves synchronously
Group, the distance between the low power lens group and high power lens group are adjacent on the first wafer and the second wafer to be aligned
The integral multiple of distance between two alignment marks；Pass through reasonable disposition low power lens group and high power lens group, low power lens group view
Wild range greatly can fast searching alignment mark, high power lens group and another alignment mark face, high power lens group are clapped at the same time
Clarity height is taken the photograph, the recognition efficiency of wafer alignment mark is improved, improves wafer alignment while improving wafer alignment efficiency
Precision, to promote wafer bonding quality.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other
The difference of embodiment, the same or similar parts in each embodiment may refer to each other.For device disclosed in embodiment
For, due to corresponding to the methods disclosed in the examples, so being described relatively simple, related place is referring to method part illustration
?.
Foregoing description is only the description to present pre-ferred embodiments, not to any restriction of the scope of the invention, this hair
Any change, the modification that the those of ordinary skill in bright field does according to the disclosure above content, belong to the protection of claims
Range.
Claims (10)
1. a kind of wafer alignment method characterized by comprising
Aligning equipment is provided, the aligning equipment includes at least two aligned units, and each aligned units include that interval is set
The low power lens group and high power lens group set and moved synchronously, the distance between the low power lens group and high power lens group be to
The integral multiple of distance between adjacent two alignment mark on the first wafer and the second wafer of alignment；
An alignment mark in the low power lens group search to the first wafer of face, while the high power lens group and described the
Another alignment mark face on one wafer, the high power lens group shoot the figure of another alignment mark on first wafer
Piece；
An alignment mark in the low power lens group search to the second wafer of face, while the high power lens group and described the
Another alignment mark face on two wafers, the high power lens group shoot the figure of another alignment mark on second wafer
Piece；
Using high power lens group shooting picture as foundation, the relative position of first wafer and the second wafer is adjusted, with reality
Now it is aligned.
2. wafer alignment method as described in claim 1, which is characterized in that the low power lens group includes the upper of face setting
Low power lens and lower low power lens, the high power lens group include the upper high power lens and lower high power lens of face setting.
3. wafer alignment method as claimed in claim 2, which is characterized in that upper low power lens and lower low power lens are aligned up and down
After lock, upper high power lens and lower high power lens lock after being aligned up and down.
4. wafer alignment method as claimed in claim 3, which is characterized in that it is single that the high power lens group is fixed on the alignment
On the lens barrel frame of member, adjust the low power lens group in the position of the lens barrel frame, make the low power lens group with it is described
The distance between high power lens group is the spacing of adjacent two alignment mark on the first wafer and the second wafer to be aligned
From integral multiple, the low power lens group is fixed on the lens barrel frame after adjustment.
5. wafer alignment method as claimed in claim 4, which is characterized in that the low power lens group search is brilliant to face first
An alignment mark on circle, while another alignment mark face on the high power lens group and first wafer, the height
The picture that times lens group shoots another alignment mark on first wafer specifically includes: the mobile lens barrel frame drives institute
It states low power lens movement and searches to the alignment mark on the first wafer of face and lock the lens barrel frame, while upper high power
Camera lens is located at right above another alignment mark on the first wafer, and the upper high power lens shoots another on first wafer
The picture of alignment mark removes the first wafer later.
6. wafer alignment method as claimed in claim 5, which is characterized in that the low power lens group search is brilliant to face second
An alignment mark on circle, while another alignment mark face on the high power lens group and second wafer, the height
The picture that times lens group shoots another alignment mark on second wafer specifically includes: searching in the lower low power lens
The alignment mark of second wafer, mobile second wafer is until lower low power lens described in an alignment mark face on second wafer
Head locks the second wafer, is located at immediately below another alignment mark on the second wafer with high power lens at present, the lower high power lens
Head shoots the picture of another alignment mark on second wafer.
7. wafer alignment method as claimed in claim 6, which is characterized in that with the high power lens group shooting picture be according to
According to, adjust the relative position of first wafer and the second wafer, to realize that alignment specifically includes: with the upper high power lens and
Lower high power lens shooting picture is foundation, adjusts the position of first wafer, to realize the alignment with second wafer.
8. wafer alignment method as claimed in any one of claims 1 to 7, which is characterized in that the low power lens group and height
The spacing distance of times lens group is the distance of an exposure field of first wafer and the second wafer.
9. the wafer alignment method as described in claim 2 to 7 any one, which is characterized in that the upper high power lens is under
The amplification factor of high power lens is greater than 5 times.
10. the wafer alignment method as described in claim 2 to 7 any one, which is characterized in that the upper low power lens is under
The amplification factor of low power lens is less than 5 times.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112151444A (en) * | 2020-09-28 | 2020-12-29 | 武汉新芯集成电路制造有限公司 | Matching design method of wafer, wafer bonding structure and chip bonding structure |
| CN115628685A (en) * | 2022-08-15 | 2023-01-20 | 魅杰光电科技(上海)有限公司 | Method and equipment for measuring critical dimension and method for positioning critical dimension in grading manner |
| CN117129029A (en) * | 2023-10-26 | 2023-11-28 | 昂坤视觉(北京)科技有限公司 | Chip detection method and system |
| CN117428351A (en) * | 2023-12-21 | 2024-01-23 | 珠海市申科谱工业科技有限公司 | Wafer cutting method and device, electronic equipment and medium |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6952262B2 (en) * | 2003-01-29 | 2005-10-04 | Canon Kabushiki Kaisha | Exposure apparatus and aligning method |
| CN101359188A (en) * | 2007-08-02 | 2009-02-04 | 优志旺电机株式会社 | Exposure apparatus of belt type workpiece and focusing regulation method thereof |
| CN101738881A (en) * | 2008-11-13 | 2010-06-16 | 财团法人金属工业研究发展中心 | Two-stage image precise contraposition method for upper plate and lower plate and device thereof |
| CN102929108A (en) * | 2012-12-04 | 2013-02-13 | 苏州微影光电科技有限公司 | Method for aligning by combining lenses with multiple magnifications in direct-writing photoetching machine |
| CN105549320A (en) * | 2016-01-05 | 2016-05-04 | 京东方科技集团股份有限公司 | Alignment marking structure, mask plate, substrate and alignment method |
| CN109285803A (en) * | 2018-09-20 | 2019-01-29 | 武汉新芯集成电路制造有限公司 | Wafer bonding method and device |
| CN109451763A (en) * | 2018-05-16 | 2019-03-08 | 长江存储科技有限责任公司 | Method and system for wafer bonding alignment compensation |
-
2019
- 2019-07-01 CN CN201910585997.4A patent/CN110299318A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
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