CN110264929B - Display panel, display device and detection method - Google Patents
Display panel, display device and detection method Download PDFInfo
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- CN110264929B CN110264929B CN201910562385.3A CN201910562385A CN110264929B CN 110264929 B CN110264929 B CN 110264929B CN 201910562385 A CN201910562385 A CN 201910562385A CN 110264929 B CN110264929 B CN 110264929B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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Abstract
The invention discloses a display panel, a display device and a detection method, which are used for solving the problems that the area where a grid driving circuit is located can be used for detecting faults in a display area in the prior art along with the improvement of the resolution of the display panel, so that the faults in the display area cannot be detected. The display panel includes: a plurality of scanning lines extending along the same direction, and antistatic lines electrically connected with each scanning line through a corresponding control unit respectively, wherein one end of each antistatic line is electrically connected with a test pad, and the test pad is positioned in other areas except the area where the grid driving circuit of the non-display area is positioned; the control unit is configured to conduct the anti-static wire with each of the scanning lines when the display area is detected poorly, the anti-static wire being configured to transmit an electric signal applied by the detection device through the test pad to each of the scanning lines through the control unit.
Description
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to a display panel, a display device, and a detection method.
Background
Flat Panel Displays (FPD) such as Liquid crystal 1Disp1ay, LCD, organic light emitting diode (Organic Light Emitted Diode, OLED) display, plasma Display Panel (PDP) and field emission display (Field Emission Display, FED) have become mainstream products in the market.
In the high-resolution display panel in the prior art, functional units arranged in the gate driving circuit are increased, and the space for placing components for carrying out bad detection on the display area is smaller, so that bad detection on the display area is affected.
Disclosure of Invention
The invention provides a display panel, a display device and a detection method, which are used for solving the problems that the area where a grid driving circuit is located can be used for detecting the defects of a display area in less space along with the improvement of the resolution of the display panel in the prior art, and the defects of the display area are affected.
An embodiment of the present invention provides a display panel including a display area and a non-display area surrounding the display area, the non-display area having a gate driving circuit, the display panel including: a plurality of scanning lines extending along the same direction, and antistatic lines electrically connected with each scanning line through a corresponding control unit respectively, wherein one end of each antistatic line is electrically connected with a test pad, and the test pad is positioned in other areas except the area where the grid driving circuit of the non-display area is positioned;
the control unit is configured to conduct the anti-static wire with each of the scanning lines when the display area is detected poorly, the anti-static wire being configured to transmit an electric signal applied by the detection device through the test pad to each of the scanning lines through the control unit.
In one possible embodiment, the control unit comprises: a control transistor, a first control capacitor and a second control capacitor;
the first end of the first control capacitor is electrically connected with the antistatic wire and the first electrode of the control transistor, and the second end of the first control capacitor is electrically connected with the grid electrode of the control transistor and the first end of the second control capacitor;
the second pole of the control transistor is electrically connected with the second end of the second control capacitor and the scanning line.
In a possible implementation manner, an antistatic unit is further electrically connected between the antistatic wire and the test pad;
the antistatic unit is configured to delay discharge of static electricity of the inspection apparatus to the entire display panel when the display area is poorly detected by the inspection apparatus.
In one possible embodiment, the antistatic unit includes: a protective transistor, a first protective capacitor and a second protective capacitor;
the first end of the first protective capacitor is electrically connected with the test pad and the first electrode of the protective transistor, and the second end of the first protective capacitor is electrically connected with the grid electrode of the protective transistor and the first end of the second protective capacitor;
the second pole of the protective transistor is electrically connected with the second end of the second protective capacitor and the antistatic wire.
In one possible embodiment, the display panel includes: a plurality of pixel circuits;
the scan line includes: a first type scanning line driving a first switching transistor in each of the pixel circuits, and a second type scanning line driving a second switching transistor in each of the pixel circuits;
the antistatic wire includes: a first antistatic line electrically connected to the first type of scanning line, and a second antistatic line electrically connected to the second type of scanning line;
the first antistatic wire and the second antistatic wire are respectively positioned at different sides of the non-display area.
In one possible implementation, each of the pixel circuits includes: the first switching transistor, the second switching transistor, the driving transistor, the storage capacitor and the light emitting device;
the grid electrode of the first switch transistor is electrically connected with the first type scanning line, the first pole of the first switch transistor is electrically connected with the data line, and the second pole of the first switch transistor is electrically connected with the grid electrode of the driving transistor and the first end of the storage capacitor;
the first electrode of the driving transistor is electrically connected with the power line, and the second electrode of the driving transistor is electrically connected with the anode of the light emitting device, the second end of the storage capacitor and the first electrode of the second switching transistor;
the grid electrode of the second switching transistor is electrically connected with the second type of scanning line, and the second electrode of the second switching transistor is electrically connected with the sensing signal line.
In one possible embodiment, the display panel further includes: a plurality of data lines perpendicular to the scan lines; the antistatic wire and the data wire are positioned on the same layer.
In one possible embodiment, the gate driving circuit includes a charging unit, a bootstrap unit, a discharging unit, a sustain unit, a random sensing unit, and a progressive sensing unit.
The embodiment of the invention also provides a display device comprising the display panel provided by the embodiment of the invention.
The embodiment of the invention also provides a detection method of the display panel, which comprises the following steps:
contacting a test needle of the test device with the test pad;
loading a first signal to the antistatic line through the test pad so as to be transmitted to each scanning line through the control unit, and loading a second signal to each data line so that the anode of the light emitting device at each pixel position has a preset voltage;
and a modulation device comprising a liquid crystal layer and an electrode layer is arranged above the display panel, and the electric connectivity of each pixel position point is detected according to the deflection and the light transmission degree of an electric field formed by the liquid crystal layer at the anode and the electrode layer.
The embodiment of the invention has the following beneficial effects: when the display panel provided by the embodiment of the invention is used for carrying out bad detection on a display area, test voltage can be loaded on the test pads through the detection equipment, the test voltage loaded on the test pads is loaded on each scanning line through the antistatic line, when the test pads corresponding to the data lines are also loaded with the voltage, the anode of each pixel circuit can be provided with the voltage, further, the position where Short circuit (Short) or Open circuit (Open) occurs can enable the voltage of the anode at the corresponding position to be different, the voltage is applied through the electrode layer of the modulation device (Modulator device) comprising the electrode layer and the liquid crystal layer, the voltage difference is formed between the electrode layer of the modulation device and the anode of the display panel, the voltage of the anode of different pixel circuits is different, the liquid crystal deflection degree of the modulation device is different, at the moment, after the lighting equipment is turned on, the light is reflected to the modulation device, the liquid crystal deflection degree is different, the intensity of reflected light is further different, different capture is carried out on different positions through the charge couplers with a plurality of photodiodes arranged, the light signals are converted into electric signals again, the electric signals are amplified through the external sampling, the analog signals are converted into the digital signals, and the bad detection is completed, and the bad detection is finished. The arrangement mode of the test pad and the mode of applying voltage to the anode provided by the embodiment of the invention can avoid that when the resolution of the display panel in the prior art is gradually increased, for example, the resolution of an 8K OLED display panel (that is, the display panel has higher resolution and includes 4320 scan lines and 7680 data lines), compared with the LCD, the gate driving circuit of the 8K OLED display panel comprises a random sensing (Sense) unit and a progressive sensing (Sense) unit, the arrangement of the units can lead to more wiring of the area where the gate driving circuit is located and lead to no placement space for arranging components for carrying out bad detection on the display area, while the display panel of the embodiment of the invention places the test pad outside the area where the gate driving circuit is located and reuses the antistatic wire of the display panel, so that the antistatic function of the display panel and the components for carrying out bad detection on the display area can be integrated, and further the space where the gate driving circuit of the 8K display panel is not provided with the improvement of the prior art, and the display panel with the improvement of the resolution of the display panel can carry out bad detection on the display area.
Drawings
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a control unit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a display panel provided with an antistatic unit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of an antistatic unit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a specific display panel according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a first switching transistor according to an embodiment of the present invention;
fig. 7 is a schematic diagram of a second switching transistor according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a gate driving circuit according to an embodiment of the present invention;
fig. 9 is a schematic diagram of a driving flow of a display panel according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments, which can be made by one of ordinary skill in the art without the need for inventive faculty, are within the scope of the present disclosure, based on the described embodiments of the present disclosure.
Unless defined otherwise, technical or scientific terms used in this disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed description of known functions and known components.
Referring to fig. 1, an embodiment of the present invention provides a display panel including a display area S1 and a non-display area S2 surrounding the display area S1, the non-display area S2 having a gate driving circuit GOA, the display panel including: a plurality of scan lines Gate extending in the same direction (fig. 1 is only a schematic illustration of two scan lines, but the invention is not limited thereto), and an antistatic line F electrically connected to each scan line Gate through a corresponding control unit Q, i.e. a control unit Q is correspondingly disposed between the antistatic line F and each scan line Gate, one end of the antistatic line F is electrically connected to a test pad ESD, and the test pad ESD is located in a region other than the region where the Gate driving circuit GOA of the non-display region S2 is located;
in the case of performing the defect detection on the display area S1, the control unit Q is configured to conduct the antistatic line F with each of the scan lines Gate, and the antistatic line F is configured to transmit an electric signal applied by the detection device through the test pad ESD to each of the scan lines Gate through the control unit Q.
Specifically, referring to fig. 1, in the embodiment of the present invention, a plurality of scan lines Gate may specifically extend along a first direction, the first direction may specifically be a row direction, the display panel may specifically further include a plurality of data lines Date, the data lines Date may specifically extend along a second direction, the second direction may specifically be perpendicular to the first direction, and the second direction may specifically be a column direction. The antistatic line F may be perpendicular to the scan line, that is, the antistatic line F extends along the second direction, but the antistatic line F and the scan line Gate are located in different layers, and an insulating layer may be further disposed in the middle of the antistatic line F, and the antistatic line F may be located in the non-display area S2.
In the display panel provided by the embodiment of the invention, when the defect detection is carried out on the display area, test voltage can be loaded on the test pad ESD through the detection equipment, the test voltage loaded on the test pad ESD is loaded on each scanning line Gate through the antistatic wire F by the control unit Q, and when the voltage is also loaded on the test pad corresponding to the data line Gate, the anode of each pixel circuit can be provided with the voltage, and further, the voltage of the anode at the corresponding position can be different at the position where the Short circuit (Short) or the Open circuit (Open) occurs, the voltage is applied through the electrode layer of the modulating device (Modulator device) comprising the electrode layer and the liquid crystal layer, the voltage difference is formed between the electrode layer of the modulation device and the anode of the display panel, the voltage difference of the anodes of different pixel circuits can lead to different deflection degrees of liquid crystals of the modulation device, at the moment, after the lighting equipment is turned on, when light rays reach the modulation device through reflection, the deflection degrees of the liquid crystals are different, the intensity of reflected light can be different, further, the light signals are converted into electric signals through capturing different light intensities through charge couplers with a plurality of photodiodes which are orderly arranged, and the electric signals are converted into digital image signals through external sampling, amplifying and analog conversion or circuit conversion, so that defect capturing at bad positions is completed, and bad detection is completed. The arrangement mode of the test pad and the mode of applying voltage to the anode provided by the embodiment of the invention can avoid that when the resolution of the display panel in the prior art is gradually increased, such as an 8K OLED display panel (namely, the resolution of the display panel is higher, including 4320 scanning lines and 7680 data lines), compared with an LCD, a grid driving circuit of the 8K OLED display panel comprises a random sensing (Sense) unit and a progressive sensing (Sense) unit, the arrangement of the units can lead to more wiring of the area where the grid driving circuit is located, so that the test pad for carrying out bad detection on the display area is arranged, and then bad detection on the display area cannot be carried out.
In a specific implementation, for the control unit Q in the embodiment of the present invention, the control unit Q is configured to load the voltage of the antistatic line F to each scan line Gate when the display area S1 of the display panel is detected to be defective, and when the display panel performs normal display subsequently, it may control the antistatic line F to be non-conductive with each scan line Gate, so that the display panel cannot display when the antistatic line F conducts each scan line Gate. In the specific implementation, when the display area S1 is detected poorly, the voltage applied to the antistatic line F is greater than the voltage applied to the scan lines Gate during normal display, so that the control unit Q can only turn on the antistatic line F and each scan line Gate when the display area S1 is detected poorly, and turn off the antistatic line F and each scan line Gate during normal display.
Specifically, as shown in fig. 1 and fig. 2, fig. 2 is an enlarged schematic structural diagram of the control unit Q of fig. 1, where the control unit Q may specifically include: a control transistor QT, a first control capacitor QC1 and a second control capacitor QC2;
the first end of the first control capacitor QC1 is electrically connected with the antistatic line F and the first electrode of the control transistor QT, and the second end of the first control capacitor QC1 is electrically connected with the grid electrode of the control transistor QT and the first end of the second control capacitor QC2;
the second pole of the control transistor QT is electrically connected to the second end of the second control capacitor QC2 and the scan line Gate.
In the embodiment of the invention, the control unit Q specifically includes a control transistor QT, a first control capacitor QC1 and a second control capacitor QC2, when a voltage is applied to the antistatic line F, the first control capacitor QC1 can be charged into the control transistor QT, and when the on voltage of the first control transistor QC1 is reached, the first control transistor QT can be turned on, so that the antistatic line F is turned on with the scan line Gate. In addition, when the display panel is subjected to static electricity, the control unit Q and the antistatic line F in the embodiment of the invention can release static electricity to the display panel with larger whole, so as to play a role in preventing static electricity of the display panel, that is, the control unit Q and the antistatic line F in the embodiment of the invention can be used for detecting the defect of the display area S1 and also can be used for protecting the static electricity of the display panel, so that the wiring arrangement of the display panel is reduced, and the manufacturing of the high-resolution display panel is facilitated.
In the specific implementation, referring to fig. 3, an antistatic unit G is further electrically connected between the antistatic wire F and the test pad ESD; the antistatic unit G is configured to delay discharge of static electricity of the inspection apparatus to the entire display panel when the display area S1 is poorly detected by the inspection apparatus.
In the embodiment of the invention, the antistatic unit G is electrically connected between the antistatic line F and the test pad ESD, so that when the defect detection is performed, if the test needle of the electrostatic device contains a large amount of electrostatic charges, the test pad and the display panel are damaged by the large amount of electrostatic charges when the defect detection is performed, and the antistatic unit G can play a role of buffering the electrostatic charges, that is, the charges generated by the static electricity can be delayed to be released to the whole display panel by testing the test of the test pad ESD, so that the possibility of burning the test pad ESD when the defect detection is performed is avoided when the antistatic line F is directly connected with the test pad ESD.
Specifically, referring to fig. 4, fig. 4 is an enlarged schematic structural diagram of fig. 3 at a position of an antistatic unit G, where the antistatic unit G includes: a protection transistor GT, a first protection capacitor GC1 and a second protection capacitor GC2;
the first end of the first protection capacitor GC1 is electrically connected with the test pad ESD and the first electrode of the protection transistor GT, and the second end of the first protection capacitor GC1 is electrically connected with the grid electrode of the protection transistor GT and the first end of the second protection capacitor GC2;
the second pole of the protection transistor GT is electrically connected to the second end of the second protection capacitor GC1 and the antistatic line F.
In the embodiment of the invention, the structure of the antistatic unit G is basically consistent with that of the control unit Q, which is beneficial to the manufacture of the antistatic unit G and the control unit Q of the display panel, namely, the manufacture of the antistatic unit G is completed while the control unit Q is manufactured.
In a specific implementation, a display panel includes: a plurality of pixel circuits;
referring to fig. 5, the scan line Gate includes: a first type scan line driving the first switching transistor T1 in each pixel circuit, and a second type scan line driving the second switching transistor T2 in each pixel circuit, the first type scan line may include a plurality of first scan lines Gate1, and the second type scan line may include a plurality of second scan lines Gate2;
the antistatic wire F includes: a first antistatic line F1 electrically connected to the first type of scanning line, and a second antistatic line F2 electrically connected to the second type of scanning line;
the first antistatic line F1 and the second antistatic line F2 are respectively located at different sides of the non-display area S2.
In the embodiment of the present invention, each pixel circuit includes a first switching transistor T1 and a second switching transistor T2, and the scan lines include a first type of scan line driving the first switching transistor T1 and a second type of scan line driving the second switching transistor T2, that is, taking a row of pixel units as an example, the row of pixel units corresponds to one first scan line Gate1 and one second scan line Gate2, where the first scan line Gate1 drives the first switching transistor T1 in each pixel circuit of the row of pixel units, and the second scan line Gate2 drives the second switching transistor T2 in each pixel circuit of the row of pixel units. In order to realize the respective control and detection of the first scan line Gate1 and the second scan line Gate2, two electrostatic protection lines (a first electrostatic protection line F1 and a second electrostatic protection line F2 respectively), two test pads (a first test pad ESD1 and a second test pad ESD2 respectively), two electrostatic protection units (a first electrostatic protection unit G1 and a second electrostatic protection unit G2 respectively), and two types of control units (a first type control unit and a second type control unit respectively), wherein the first type control unit specifically comprises a plurality of first control units Q1, the second type control unit specifically comprises a plurality of second control units Q2), the first electrostatic protection line F1 is located on the left side of the display panel, the second electrostatic protection line F2 is located on the right side of the display panel, the first electrostatic protection unit G1 is located on the upper left side of the display panel, the second electrostatic protection unit G2 is located on the upper right side of the display panel, the upper end of the first electrostatic protection line F1 is connected with the first electrostatic protection unit G1 and the first electrostatic protection pad F2 through the first electrostatic protection unit G1 and the second electrostatic protection unit F2. Each first scanning line Gate1 is electrically connected with a first antistatic line F1 on the left side of the display panel through a corresponding first control unit Q1, and each second scanning line Gate2 is electrically connected with a second antistatic line F2 on the right side of the display panel through a corresponding second control unit Q2. Specifically, the display panel may be provided with a power line VDD, and a third control unit Q3 for preventing static electricity may be further disposed between the data line Date and the data bus (bus), for example, in fig. 5, a third control unit Q3 is electrically connected between one end (upper end) of each data line Date and the first data bus (data bus above the display area), a third control unit Q3 is electrically connected between the other end (lower end) of each data line Date and the second data bus (data bus below the display area), and the data bus is finally electrically connected to the Source COF. The data line Date may be a data line Date-R, date-G, date-B, date-W, a compensation line (sense), or a vertical power line.
Of course, the above is only exemplified by the pixel driving circuit of the display panel including two switching transistors, and the scan line includes the first scan line Gate1 and the second scan line Gate2, and when the pixel circuit of the display panel has other structures, for example, the pixel circuit includes only one switching transistor, the scan line may also include only one type of scan line, which is not limited by the present invention.
In particular implementations, as shown in connection with fig. 6 and 7, each pixel circuit includes: a first switching transistor T1, a second switching transistor T2, a driving transistor T3, a storage capacitor CST, and a light emitting device OLED;
the Gate of the first switching transistor T1 is electrically connected to the first scan line Gate1, the first pole of the first switching transistor T1 is electrically connected to the data line Date, the data line Date can specifically input a data signal Vdate to the first switching transistor T1, and the second pole of the first switching transistor T1 is electrically connected to the Gate of the driving transistor T3 and the first end of the storage capacitor CST;
a first electrode of the driving transistor T3 is electrically connected to the power line VDD, and a second electrode of the driving transistor T3 is electrically connected to the anode of the light emitting device OLED, the second end of the storage capacitor CST, and the first electrode of the second switching transistor T2;
the gate of the second switching transistor T2 is electrically connected to the second type scan line, and the second pole of the second switching transistor T2 is electrically connected to the sensing signal line Sense.
As shown in fig. 6, a detecting device (Array Test device) is connected to the first Test pad ESD1 by a needle insertion manner, so that the detecting device adds a high voltage to the first Test pad ESD1, the anti-static unit G is composed of two capacitors and one TFT, the high voltage is located at one electrode of the capacitors, the other electrode is also a high voltage by bootstrap, and then the upper Gate of the TFT is opened, and the input high voltage flows into the pixel circuit through the first scan line Gate 1. Similarly, as shown in fig. 7, the detection device (Array Test device) is connected to the second Test pad ESD2 by a needle insertion method, so that the detection device adds a high voltage to the second Test pad ESD2, the antistatic unit G is composed of two capacitors and one TFT, the high voltage is located at one electrode of the capacitors, the other electrode is also high voltage by bootstrap, and then the Gate on the TFT is opened, and the input high voltage flows into the pixel circuit through the second scan line Gate 2.
In a specific implementation, the display panel further includes: a plurality of data lines Date perpendicular to the scan lines; the antistatic wire and the data wire are positioned on the same layer. In the embodiment of the invention, the anti-static wire and the data wire are positioned on the same layer, so that the anti-static wire can be formed while the data wire is manufactured, and the process simplification of the display panel is facilitated.
In specific implementation, referring to fig. 8, the gate driving circuit GOA may specifically include a charging unit, a bootstrap unit, a discharging unit, a sustain unit, a random sensing unit, and a progressive sensing unit.
Based on the same inventive concept, the embodiment of the invention also provides a display device, including the display panel provided by the embodiment of the invention.
The embodiment of the invention also provides a detection method of the display panel, as shown in fig. 9, the detection method includes:
step S101, a test needle of the detection device is contacted with a test pad.
Step S102, a first signal is loaded to the antistatic wire through the test pad so as to be transmitted to each scanning wire through the control unit, and a second signal is loaded to each data wire so that the anode of the light emitting device at each pixel position has a preset voltage.
Step S103, a modulation device comprising a liquid crystal layer and an electrode layer is arranged above the display panel, and the electrical connectivity at each pixel position point is detected according to the deflection and the light transmission degree of an electric field formed by the liquid crystal layer at the anode and the electrode layer.
The embodiment of the invention has the following beneficial effects: when the display panel provided by the embodiment of the invention is used for carrying out bad detection on a display area, test voltage can be loaded on the test pads through the detection equipment, the test voltage loaded on the test pads is loaded on each scanning line through the antistatic line, when the test pads corresponding to the data lines are also loaded with the voltage, the anode of each pixel circuit can be provided with the voltage, further, the position where Short circuit (Short) or Open circuit (Open) occurs can enable the voltage of the anode at the corresponding position to be different, the voltage is applied through the electrode layer of the modulation device (Modulator device) comprising the electrode layer and the liquid crystal layer, the voltage difference is formed between the electrode layer of the modulation device and the anode of the display panel, the voltage of the anode of different pixel circuits is different, the liquid crystal deflection degree of the modulation device is different, at the moment, after the lighting equipment is turned on, the light is reflected to the modulation device, the liquid crystal deflection degree is different, the intensity of reflected light is further different, different capture is carried out on different positions through the charge couplers with a plurality of photodiodes arranged, the light signals are converted into electric signals again, the electric signals are amplified through the external sampling, the analog signals are converted into the digital signals, and the bad detection is completed, and the bad detection is finished. The arrangement mode of the test pad and the mode of applying voltage to the anode provided by the embodiment of the invention can avoid that when the resolution of the display panel in the prior art is gradually increased, for example, the resolution of an 8K OLED display panel (that is, the display panel has higher resolution and includes 4320 scan lines and 7680 data lines), compared with the LCD, the gate driving circuit of the 8K OLED display panel comprises a random sensing (Sense) unit and a progressive sensing (Sense) unit, the arrangement of the units can lead to more wiring of the area where the gate driving circuit is located and lead to no placement space for arranging components for carrying out bad detection on the display area, while the display panel of the embodiment of the invention places the test pad outside the area where the gate driving circuit is located and reuses the antistatic wire of the display panel, so that the antistatic function of the display panel and the components for carrying out bad detection on the display area can be integrated, and further the space where the gate driving circuit of the 8K display panel is not provided with the improvement of the prior art, and the display panel with the improvement of the resolution of the display panel can carry out bad detection on the display area.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (8)
1. A display panel comprising a display region and a non-display region surrounding the display region, the non-display region having a gate driving circuit, the display panel comprising: a plurality of scan lines extending along the same direction, and antistatic lines electrically connected with each scan line through a corresponding control unit, wherein one end of each antistatic line is electrically connected with a test pad, and the test pad is positioned in other areas except the area where the grid driving circuit of the non-display area is positioned, wherein the same direction is a first direction;
when the display area is detected poorly, the control unit is configured to conduct the anti-static wire with each scanning wire, and the anti-static wire is configured to transmit an electric signal applied by a detection device through the test pad to each scanning wire through the control unit;
the other end of the antistatic wire extends along a second direction, wherein the second direction is perpendicular to the first direction;
an antistatic unit is also electrically connected between the antistatic wire and the test pad;
the antistatic unit is configured to delay the discharge of static electricity of the detection device to the whole display panel when the detection device detects the defect of the display area;
the display panel further includes: a plurality of data lines perpendicular to the scanning lines, wherein the antistatic lines and the data lines are positioned on the same layer, and the antistatic lines and the scanning lines are positioned on different layers;
the display panel further includes: a power line and a data bus;
one end of each data line is electrically connected with the control unit between the data bus above the display area, and the other end of each data line is electrically connected with the control unit between the data bus below the display area.
2. The display panel of claim 1, wherein the control unit includes: a control transistor, a first control capacitor and a second control capacitor;
the first end of the first control capacitor is electrically connected with the antistatic wire and the first electrode of the control transistor, and the second end of the first control capacitor is electrically connected with the grid electrode of the control transistor and the first end of the second control capacitor;
the second pole of the control transistor is electrically connected with the second end of the second control capacitor and the scanning line.
3. The display panel of claim 1, wherein the antistatic unit comprises: a protective transistor, a first protective capacitor and a second protective capacitor;
the first end of the first protective capacitor is electrically connected with the test pad and the first electrode of the protective transistor, and the second end of the first protective capacitor is electrically connected with the grid electrode of the protective transistor and the first end of the second protective capacitor;
the second pole of the protective transistor is electrically connected with the second end of the second protective capacitor and the antistatic wire.
4. The display panel of claim 3, wherein the display panel comprises: a plurality of pixel circuits;
the scan line includes: a first type scanning line driving a first switching transistor in each of the pixel circuits, and a second type scanning line driving a second switching transistor in each of the pixel circuits;
the antistatic wire includes: a first antistatic line electrically connected to the first type of scanning line, and a second antistatic line electrically connected to the second type of scanning line;
the first antistatic wire and the second antistatic wire are respectively positioned at different sides of the non-display area.
5. The display panel of claim 4, wherein each of the pixel circuits comprises: the first switching transistor, the second switching transistor, the driving transistor, the storage capacitor and the light emitting device;
the grid electrode of the first switch transistor is electrically connected with the first type scanning line, the first pole of the first switch transistor is electrically connected with the data line, and the second pole of the first switch transistor is electrically connected with the grid electrode of the driving transistor and the first end of the storage capacitor;
the first electrode of the driving transistor is electrically connected with the power line, and the second electrode of the driving transistor is electrically connected with the anode of the light emitting device, the second end of the storage capacitor and the first electrode of the second switching transistor;
the grid electrode of the second switching transistor is electrically connected with the second type of scanning line, and the second electrode of the second switching transistor is electrically connected with the sensing signal line.
6. The display panel of claim 1, wherein the gate driving circuit includes a charging unit, a bootstrap unit, a discharging unit, a sustain unit, a random sensing unit, and a progressive sensing unit.
7. A display device comprising the display panel according to any one of claims 1-6.
8. A method of inspecting a display panel according to any one of claims 1 to 6, comprising:
contacting a test needle of the test device with the test pad;
loading a first signal to the antistatic line through the test pad so as to be transmitted to each scanning line through the control unit, and loading a second signal to each data line so that the anode of the light emitting device at each pixel position has a preset voltage;
and a modulation device comprising a liquid crystal layer and an electrode layer is arranged above the display panel, and the electric connectivity of each pixel position point is detected according to the deflection and the light transmission degree of an electric field formed by the liquid crystal layer at the anode and the electrode layer.
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| CN110941125B (en) * | 2019-12-16 | 2022-11-04 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
| CN114355683A (en) * | 2020-10-12 | 2022-04-15 | 深超光电（深圳）有限公司 | Thin film transistor substrate and liquid crystal display panel |
| WO2024021021A1 (en) * | 2022-07-29 | 2024-02-01 | 京东方科技集团股份有限公司 | Display substrate and manufacturing method therefor, and display device |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101004490A (en) * | 2006-01-18 | 2007-07-25 | 中华映管股份有限公司 | Base plate of driving part array, liquid crystal display faceplate, and detection method |
| CN101059948A (en) * | 2007-05-16 | 2007-10-24 | 友达光电股份有限公司 | Active component array baseplate |
| TW200822048A (en) * | 2006-11-08 | 2008-05-16 | Chunghwa Picture Tubes Ltd | Active device array substrate having electrostatic discharge protection capability |
| CN104112426A (en) * | 2014-06-30 | 2014-10-22 | 上海天马有机发光显示技术有限公司 | OLED pixel drive circuit, electrostatic discharge protection circuit and detection method |
| CN105070239A (en) * | 2015-08-27 | 2015-11-18 | 武汉华星光电技术有限公司 | Liquid crystal display panel |
| CN107731171A (en) * | 2017-11-29 | 2018-02-23 | 合肥京东方光电科技有限公司 | Image element circuit and its control method, display base plate, display device |
| WO2018223739A1 (en) * | 2017-06-05 | 2018-12-13 | 京东方科技集团股份有限公司 | Display drive circuit and control method therefor, and display device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102409881B1 (en) * | 2016-03-21 | 2022-06-17 | 삼성디스플레이 주식회사 | Display device and short test method |
-
2019
- 2019-06-26 CN CN201910562385.3A patent/CN110264929B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101004490A (en) * | 2006-01-18 | 2007-07-25 | 中华映管股份有限公司 | Base plate of driving part array, liquid crystal display faceplate, and detection method |
| TW200822048A (en) * | 2006-11-08 | 2008-05-16 | Chunghwa Picture Tubes Ltd | Active device array substrate having electrostatic discharge protection capability |
| CN101059948A (en) * | 2007-05-16 | 2007-10-24 | 友达光电股份有限公司 | Active component array baseplate |
| CN104112426A (en) * | 2014-06-30 | 2014-10-22 | 上海天马有机发光显示技术有限公司 | OLED pixel drive circuit, electrostatic discharge protection circuit and detection method |
| CN105070239A (en) * | 2015-08-27 | 2015-11-18 | 武汉华星光电技术有限公司 | Liquid crystal display panel |
| WO2018223739A1 (en) * | 2017-06-05 | 2018-12-13 | 京东方科技集团股份有限公司 | Display drive circuit and control method therefor, and display device |
| CN107731171A (en) * | 2017-11-29 | 2018-02-23 | 合肥京东方光电科技有限公司 | Image element circuit and its control method, display base plate, display device |
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|---|---|
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