CN110246837A - A kind of double diode esd protection circuit - Google Patents
A kind of double diode esd protection circuit Download PDFInfo
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- CN110246837A CN110246837A CN201910500481.5A CN201910500481A CN110246837A CN 110246837 A CN110246837 A CN 110246837A CN 201910500481 A CN201910500481 A CN 201910500481A CN 110246837 A CN110246837 A CN 110246837A
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- pnp triode
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- 230000003071 parasitic effect Effects 0.000 claims abstract description 37
- 239000000758 substrate Substances 0.000 claims description 25
- 239000004065 semiconductor Substances 0.000 claims description 15
- 230000015556 catabolic process Effects 0.000 claims description 12
- 230000024241 parasitism Effects 0.000 claims description 12
- 238000007599 discharging Methods 0.000 claims description 9
- 230000003321 amplification Effects 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 7
- 238000004364 calculation method Methods 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 4
- 230000005684 electric field Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- BRVSNRNVRFLFLL-HQSVLGJOSA-N pcbo Chemical compound CCCCCCCCOC(=O)CCCC1([C@]23C4=C5C=CC6=C7C=CC8=C9C=CC%10=C%11C=CC%12=C(C=C4)[C@]31C1=C3C4=C2C5=C6C=2C7=C8C5=C9C%10=C(C3=C5C4=2)C%11=C%121)C1=CC=CC=C1 BRVSNRNVRFLFLL-HQSVLGJOSA-N 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
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Abstract
The invention proposes a kind of double diode esd protection circuits, including high-end diode, low side diode, ESD primary path and parasitic PNP triode.The high-end diode anode, low side diode cathode and parasitic PNP triode emitter are connected with circuit I O to be protected; the high-end diode cathode, ESD primary path anode and parasitic PNP triode base stage are connected with circuit VDD to be protected, and the low side diode anode, ESD primary path cathode and parasitic PNP triode collector are connected with circuit GND to be protected.The present invention passes through parasitic PNP triode and discharges IO to the ESD electric current of GND, that is, increases an IO to the ESD electric current release way of GND, compare double diode esd protection circuit of the same area, effectively improve the failure electric current of circuit.
Description
Technical field
The invention belongs to integrated circuits and technical field of semiconductors, are related to a kind of double diode esd protection circuit, can be used for
Chip-scale and system-level ESD protection in integrated circuit.
Technical background
With the continuous propulsion of scientific and technological revolution, semiconductor technology and integrated circuit technique equally achieve huge progress,
So that chip area constantly reduces, arithmetic speed is continuously improved.However, high integration and high arithmetic speed make integrated circuit
The damage by ESD is easier with electronic device.Therefore, ESD is the important component of IC reliability.Integrated circuit
ESD protection mainly using esd protection circuit realize.In industry, failure electric current is the important indicator of esd protection circuit.
Esd protection circuit is divided into two kinds, under circuit computing speed to be protected or the lower situation of frequency, generally in circuit I O to be protected
ESD protective module is mounted between GND, discharges ESD electric current.The circuit design is simple, however due to ESD protective module size compared with
Greatly, occupy a large amount of chip area, and there is very big parasitic capacitance and leakage current, be not suitable for speed or frequency compared with
The ESD of high circuit is protected.High frequency or high speed integrated circuit require its esd protection circuit to have lesser circuit area and lower
Parasitic capacitance and leakage current.For double diode esd protection circuit since its area occupied is small, parasitic capacitance and leakage current are low
The features such as be equally widely used in industry.Double diode esd protection circuit basic structure is as shown in Figure 1, include height
Hold diode, low side diode and ESD primary path.Wherein, high-end diode is for discharging circuit I O to be protected to the ESD of VDD
Electric current, low side diode is for discharging circuit GND to be protected to the ESD electric current of IO, and ESD primary path is for discharging circuit to be protected
To the ESD electric current of GND, the ESD electric current of circuit I O to GND to be protected is discharged from IO to VDD VDD by high-end diode, then is led to
ESD primary path is crossed to discharge from VDD to GND.The forward conduction of double diode esd protection circuit application diode discharges ESD electric current,
Therefore there is lesser circuit area, parasitic capacitance and leakage current, be widely used in radio frequency, high speed and digital circuit
ESD protection in.
Double diode esd protection circuit with the features such as its low current leakage and low parasitic capacitance by researchers at home and abroad
Concern.For the failure electric current for improving double diode esd protection circuit, designer, which generally increases circuit area or design, to be had
The ESD primary path of higher failure electric current.In addition, also constantly there is scholar to propose other methods, such as Chun- in 2018 in recent years
Yu Lin et al. delivers entitled at " IEEE Transactions on Device and Materials Reliability "
“Low-C ESD Protection Design with Dual Resistor-Triggered SCRs in CMOS
In the paper of Technology ", a kind of double diode protection circuit of low parasitic capacitance is proposed, structure was as shown in Fig. 2, should
The series connection of circuit application resistance and two high-end diodes is protected to replace the high-end diode of basic circuit, using resistance and two
The series connection of low side diode replaces the low side diode of basic circuit, further reduced the parasitic capacitance of circuit.However, for
The failure electric current of identical circuit area, circuit is not effectively improved.Simultaneously as increasing high-end two pole
Pipe, a low side diode and two resistance, improve the cut-in voltage of circuit, are not suitable for the ESD protection of low-voltage circuit.
Summary of the invention
It is an object of the invention in view of the deficiency of the prior art, propose a kind of double diode ESD protection
Circuit, for solving the lower technical problem of failure electric current existing in the prior art.
To achieve the above object, the technical scheme adopted by the invention is as follows:
A kind of double diode esd protection circuit, including high-end diode, low side diode and ESD primary path, it is described high-end
Diode anode and low side diode cathode are connected with circuit I O to be protected, and the high-end diode cathode and ESD primary path are just
Pole is connected with circuit VDD to be protected, and the low side diode anode and ESD primary path cathode are connected with circuit GND to be protected, institute
High-end diode is stated for discharging circuit I O to be protected to the ESD electric current of VDD, the low side diode is for discharging electricity to be protected
ESD electric current of the road GND to IO；The ESD primary path is for discharging circuit VDD to be protected to the ESD electric current of GND；It further include posting
The emitter of raw PNP triode, the parasitism PNP triode is connected with circuit I O to be protected, base stage and circuit VDD phase to be protected
Even, collector is connected with circuit GND to be protected.
A kind of above-mentioned double diode esd protection circuit, the high-end diode are N trap P+ diode.
A kind of above-mentioned double diode esd protection circuit, the parasitism PNP triode, emitter use P+ structure, base stage
Using N well structure, collector uses substrate P structure, the cut-in voltage BV of the parasitism PNP triodeCEOBy the anti-of N trap and substrate P
It is determined to the current amplification factor of breakdown voltage and the parasitism PNP triode, calculation formula are as follows:
Wherein, BVCBOIt is for parasitic PNP triode collector-base breakdown reverse voltage, i.e., reversed between N trap and substrate P
Breakdown voltage, β are parasitic PNP triode current amplification factor, and n is the constant for manufacturing the semiconductor material of circuit and determining, BVCBO
It is respectively as follows: with the calculation formula of β
Wherein, EcritFor avalanche breakdown critical electric field, NDFor doping content of semiconductor, i.e. N trap and substrate P concentration, WEAnd NE
Respectively indicate the width and concentration of emitter, the i.e. width of P+ and concentration, WBAnd NBRespectively indicate the width and concentration of base stage, i.e. P
+ to the distance of substrate P and the concentration of N trap, ni is intrinsic semiconductor concentration.
A kind of above-mentioned double diode esd protection circuit, the parasitism PNP triode, conducting resistance is by its Current amplifier times
The distance of number β and collector width, that is, N trap to substrate P electrode determines.
Compared with the prior art, the invention has the following advantages:
1. the parasitic PNP triode that the present invention uses, emitter is connected with circuit I O to be protected, base stage and electricity to be protected
Road VDD is connected, and collector is connected with circuit GND to be protected, and ESD electric current can be via the parasitism PNP triode between IO and GND
Emitter, base stage to collector discharge, that is, increase the ESD electric current release way of IO a to GND, double compared to of the same area
Diode esd protection circuit effectively improves the failure electric current of circuit.
2. the present invention is by adjusting the emitter of parasitic PNP triode, base stage and collector width and N trap and substrate P
Concentration can effectively reduce its cut-in voltage and conducting resistance, and compared with prior art, the present invention is applicable not only to high-tension circuit
ESD protection applies also for the ESD protection of low-voltage circuit.
3. the present invention increases parasitic PNP triode in the structure of basic double diode esd protection circuit, guaranteeing to protect
Under the premise of protection circuit leakage current is low and area occupied is small, increase compared with prior art high-end diode, low side diode and
Resistance, structure are simpler.
Detailed description of the invention
Fig. 1 is the basic structure schematic diagram of existing double diode esd protection circuit；
Fig. 2 is the structural schematic diagram of the prior art；
Fig. 3 is structural schematic diagram of the invention；
Fig. 4 is the structural schematic diagram for the parasitic PNP triode that the present invention uses.
Specific embodiment
Below in conjunction with the drawings and specific embodiments, invention is further described in detail.
Referring to Fig. 3, the present invention includes high-end diode, low side diode, ESD primary path and parasitic PNP triode.It is described
High-end diode anode, low side diode cathode and parasitic PNP triode emitter are connected with circuit I O to be protected, described high-end
Diode cathode, ESD primary path anode and parasitic PNP triode base stage are connected with circuit VDD to be protected, the low side diode
Anode, ESD primary path cathode and parasitic PNP triode collector are connected with circuit GND to be protected.
Deep N-well P+ diode, N-type isolating diode and N trap diode etc. can be used in high-end diode, due to two pole of N trap
Pipe is simple to manufacture and most commonly seen in semiconductor fabrication process, originally applies example using N trap P+ diode.
Substrate P diode, N-type isolating diode and p-well N+ diode can be used in low side diode, originally applies example and is served as a contrast using P
Bottom diode.
The structures such as GGNMOS, RGNMOS or SCR can be used in ESD primary path, originally apply example using SCR structure.
Emitter, which can be used, in parasitic PNP triode can be used P+, and deep N-well, N buried layer or N trap etc., collector can be used in base stage
P-well or substrate P etc. can be used, used N trap P+ diode due to originally applying example, to reduce circuit area, parasitic PNP triode hair
Emitter-base bandgap grading can directly adopt the P+ of N trap P+ diode, and base stage can directly adopt the N trap of N trap P+ diode, and collector can directly adopt
Substrate P in semiconductor fabrication process.In conclusion the parasitic PNP triode for originally applying example uses transmitting extremely P+ referring to Fig. 4,
Base stage is N trap, the structure of current collection extremely substrate P.Since parasitic PNP triode can directly adopt the N trap and P+ of high-end diode
As base stage and emitter, circuit does not increase other semiconductor layers.And the prior art increase a high-end diode, one it is low
Diode and two resistance are held, at least need to increase a N trap and manufacture the semiconductor layer of resistance.Therefore, existing skill is compared
Art, structure of the invention are more simple.
Parasitic PNP triode cut-in voltage BVCEOBy tri- pole of breakdown reverse voltage and parasitism PNP of N trap and substrate P
The current amplification factor decision of pipe, calculation formula are as follows:
Wherein, BVCBOIt is for parasitic PNP triode collector-base breakdown reverse voltage, i.e., reversed between N trap and substrate P
Breakdown voltage, β are parasitic PNP triode current amplification factor, and n is the constant for manufacturing the semiconductor material of circuit and determining.Therefore,
It can be by reducing BVCBOReduce BV with β is increasedCEO。BVCBOIt is respectively as follows: with the calculation formula of β
Wherein, EcritFor avalanche breakdown critical electric field, NDFor doping content of semiconductor, i.e. N trap and substrate P concentration, WEAnd NE
Respectively indicate the width and concentration of emitter, WBAnd NBThe width and concentration of base stage are respectively indicated, ni is intrinsic semiconductor concentration；
The emitter width and concentration is the width and concentration of P+；The base width and concentration is respectively P+ to substrate P
Distance and N trap concentration.Therefore, BV can be reduced by increasing the concentration of N trap or substrate PCBO, BV is reduced with thisCEO；It can also lead to
Cross reduction WBOr increase WEIncrease β, BV is reduced with thisCEO.It to sum up, can be by adjusting the concentration and parasitism PNP of N trap and substrate P
The emitter and base width of triode adjust the cut-in voltage of parasitic PNP triode, it is enabled to can be applied to high-tension circuit
ESD protection can also be applied to the ESD protection of low-voltage circuit.In addition, the conducting resistance of parasitic PNP triode is by its Current amplifier
The distance of multiple β and collector width, that is, N trap to substrate P electrode determines.It can be by increasing β or reducing N trap to substrate P electrode
Distance reduce the conducting resistance of parasitic PNP triode.
Protection philosophy of the invention are as follows: when an esd event occurs, circuit I O to be protected passes through the ESD electric current of VDD high-end
Diode release, circuit VDD to be protected discharge the ESD electric current of GND by ESD primary path, and circuit GND to be protected is to IO's
ESD electric current is discharged by low side diode, and circuit I O to be protected releases the electric current of GND by high-end diode and ESD primary path
It puts.Further, the voltage that esd event generates makes the voltage between IO and GND reach the cut-in voltage of parasitic PNP triode
BVCEO, therefore IO can also discharge the ESD electric current of GND via the emitter of parasitic PNP triode, base stage to collector, that is, increase
Add an IO to the ESD electric current release way of GND, has compared double diode esd protection circuit of the same area, effectively improve
The failure electric current of circuit.
Above description is only the preferred embodiment of the present invention, is not limited the invention, for the general of this field
For logical technical staff, the several modifications and improvements that can be made under the premise of not departing from innovation thinking of the present invention, but this
A little change all belongs to the scope of protection of the present invention.
Claims (4)
1. a kind of double diode esd protection circuit, including high-end diode, low side diode and ESD primary path, described high-end two
Pole pipe anode and low side diode cathode are connected with circuit I O to be protected, the high-end diode cathode and ESD primary path anode
It is connected with circuit VDD to be protected, the low side diode anode and ESD primary path cathode are connected with circuit GND to be protected, described
High-end diode is for discharging circuit I O to be protected to the ESD electric current of VDD, and the low side diode is for discharging circuit to be protected
ESD electric current of the GND to IO；The ESD primary path is for discharging circuit VDD to be protected to the ESD electric current of GND；It is characterized by:
Further include parasitic PNP triode, it is described parasitism PNP triode emitter be connected with circuit I O to be protected, base stage with it is to be protected
Circuit VDD is connected, and collector is connected with circuit GND to be protected.
2. a kind of double diode esd protection circuit according to claim 1, which is characterized in that the high-end diode is adopted
With N trap P+ diode.
3. a kind of double diode esd protection circuit according to claim 1, which is characterized in that tri- pole the parasitism PNP
Pipe, emitter use P+ structure, and base stage uses N well structure, and collector uses substrate P structure, which opens
Open voltage BVCEOIt is determined, is counted by the current amplification factor of the breakdown reverse voltage and the parasitism PNP triode of N trap and substrate P
Calculate formula are as follows:
Wherein, BVCBOFor parasitic PNP triode collector-base breakdown reverse voltage, i.e. reverse breakdown between N trap and substrate P
Voltage, β are parasitic PNP triode current amplification factor, and n is the constant for manufacturing the semiconductor material of circuit and determining, BVCBOWith β's
Calculation formula is respectively as follows:
Wherein, EcritFor avalanche breakdown critical electric field, NDFor doping content of semiconductor, i.e. N trap and substrate P concentration, WEAnd NERespectively
Indicate the width and concentration of emitter, the i.e. width of P+ and concentration, WBAnd NBRespectively indicate the width and concentration of base stage, i.e. P+ to P
The distance of substrate and the concentration of N trap, ni are intrinsic semiconductor concentration.
4. a kind of double diode esd protection circuit according to claim 3, which is characterized in that tri- pole the parasitism PNP
Pipe, conducting resistance are determined by its current amplification factor β and collector width, that is, N trap to substrate P electrode distance.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910500481.5A CN110246837B (en) | 2019-06-11 | 2019-06-11 | Double-diode ESD protection circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910500481.5A CN110246837B (en) | 2019-06-11 | 2019-06-11 | Double-diode ESD protection circuit |
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| CN110246837A true CN110246837A (en) | 2019-09-17 |
| CN110246837B CN110246837B (en) | 2021-04-27 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111696982A (en) * | 2020-06-09 | 2020-09-22 | 深圳能芯半导体有限公司 | Substrate-separated N-type power tube ESD circuit and setting method |
| CN116864503A (en) * | 2023-07-19 | 2023-10-10 | 上海帝迪集成电路设计有限公司 | ESD self-protection high-voltage isolation ring |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100085672A1 (en) * | 2007-02-12 | 2010-04-08 | Nxp, B.V. | Esd-protection device, a semiconductor device and integrated system in a package comprising such a device |
| CN103022030A (en) * | 2011-09-27 | 2013-04-03 | 半导体元件工业有限责任公司 | Semiconductor device |
| CN103427407A (en) * | 2012-05-21 | 2013-12-04 | 南亚科技股份有限公司 | Electrostatic discharge protection circuit |
| JP2015103605A (en) * | 2013-11-22 | 2015-06-04 | 株式会社メガチップス | ESD protection circuit |
-
2019
- 2019-06-11 CN CN201910500481.5A patent/CN110246837B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100085672A1 (en) * | 2007-02-12 | 2010-04-08 | Nxp, B.V. | Esd-protection device, a semiconductor device and integrated system in a package comprising such a device |
| CN103022030A (en) * | 2011-09-27 | 2013-04-03 | 半导体元件工业有限责任公司 | Semiconductor device |
| CN103427407A (en) * | 2012-05-21 | 2013-12-04 | 南亚科技股份有限公司 | Electrostatic discharge protection circuit |
| JP2015103605A (en) * | 2013-11-22 | 2015-06-04 | 株式会社メガチップス | ESD protection circuit |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111696982A (en) * | 2020-06-09 | 2020-09-22 | 深圳能芯半导体有限公司 | Substrate-separated N-type power tube ESD circuit and setting method |
| CN111696982B (en) * | 2020-06-09 | 2023-10-03 | 深圳能芯半导体有限公司 | Substrate separation N-type power tube ESD circuit and setting method |
| CN116864503A (en) * | 2023-07-19 | 2023-10-10 | 上海帝迪集成电路设计有限公司 | ESD self-protection high-voltage isolation ring |
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| CN110246837B (en) | 2021-04-27 |
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