CN110211927B

CN110211927B - Chip cutting method

Info

Publication number: CN110211927B
Application number: CN201910512143.3A
Authority: CN
Inventors: 刘剑; 侯华
Original assignee: Chengdu Advanced Power Semiconductor Co Ltd
Current assignee: Chengdu Advanced Power Semiconductor Co Ltd
Priority date: 2019-06-13
Filing date: 2019-06-13
Publication date: 2021-08-24
Anticipated expiration: 2039-06-13
Also published as: CN110211927A

Abstract

The invention discloses a chip cutting method in the field of cutter cutting. According to the chip, the virtual first auxiliary line and the second auxiliary line parallel to the first auxiliary line are arranged on the plane where the upper surface of the chip is located, the auxiliary line divides the chip into a first area, a second area and a third area, and the third area is located between the two auxiliary lines; cutting the third area, wherein the cutting line is parallel to the auxiliary line; and then cutting the first area and the second area, wherein the cutting line is parallel to the auxiliary line. The chip is prevented from generating cracks under the action of stress in the cutting process, and the qualification rate of chip products is improved.

Description

Chip cutting method

Technical Field

The invention relates to a chip cutting method, in particular to a chip cutting method in the field of cutter cutting.

Background

In the manufacture of semiconductor chips, it is necessary to separate the die from the chip. The separation method generally comprises two modes of laser cutting and cutter cutting. The cost of laser cutting is high. Therefore, cutting with a knife is an important technical development.

In the field of cutter cutting, a traditional chip cutting method is to use a diamond cutter to aim at a cutting path one by one to perform one-time transverse cutting and one-time longitudinal cutting. As known to those skilled in the art, the conversion between transverse and longitudinal dicing is achieved by rotating the chip 90 ° counterclockwise or clockwise.

When cutting with a knife, a biaxial dicing apparatus is generally used for the purpose of improving efficiency. I.e. cutting with two blades simultaneously. The two blades cut a circular wafer from opposite directions. Namely, two blades are opposite to each other, and the wafer is cut from two sides of the wafer to the middle of the wafer.

Because the two shafts of the cutter are oppositely arranged, when the two shafts reach the minimum limit, the blades of the two shafts are at a certain distance. Therefore, when the part with a certain width in the middle of the chip is cut, one knife jumps for a certain distance and then cuts reversely, and the other knife blade continues to cut in the original direction.

The prior method has the following problems: at the final stage of the first transverse cutting, when the middle area of the chip is cut, the chip is easy to Crack (called Crack die in the industry), and the yield of the chip product is reduced. Increasing the cost of the chip product.

Disclosure of Invention

The invention aims to overcome the defects in the prior art, and provides a method for cutting chips by using a double knife, which solves the problem that the chips are easy to crack when the middle area is cut in the final stage during the first transverse cutting while maintaining the cutting efficiency, and improves the yield of chip products.

In order to achieve the above purpose, the invention provides the following technical scheme:

a chip cutting method comprises the following steps:

s1, arranging a virtual first auxiliary line and a second auxiliary line parallel to the first auxiliary line on the plane of the upper surface of the chip, wherein the auxiliary line divides the chip into a first area, a second area and a third area, and the third area is located between the two auxiliary lines; the first auxiliary line is positioned between the first area and the third area; the second auxiliary line is positioned between the second area and the third area;

s2, cutting the third area, wherein the cutting line is parallel to the auxiliary line;

and S3, cutting the first area and the second area, wherein the cutting line is parallel to the auxiliary line.

The inventor of the invention obtains the method of the invention through long-term production experience accumulation and a large amount of experimental research. The inventor finds that in the prior art cutting method, when the chip is transversely cut for the first time, the cutter gradually cuts from two sides of the chip to the middle, and the finally cut area is a slender strip, so that the chip is easy to shake during cutting, stress is concentrated, and the chip is easy to crack, thereby affecting the product quality. The invention adopts the mode of cutting the middle area at first and then cutting the rest areas at the two sides, thereby reducing the stress of the chip in the cutting process and improving the qualification rate of the chip product.

The middle area can divide the chip by arranging a first virtual straight line and a second virtual straight line which are parallel to each other on a plane where the surface of the chip is located. When the chip is circular, the circle center of the circle is positioned between the two straight lines of the parallel line. The distance from the center of the circle to any straight line is smaller than the radius of the chip. In this way, the auxiliary lines divide the chip into three regions, i.e., a third region between the first auxiliary lines and the second auxiliary lines. And a first area outside the first auxiliary line and a second area outside the second auxiliary line. The virtual auxiliary line is not actually present, but merely serves as a mark of a relative position for dividing the chip into three regions. In an actual production process, the virtual auxiliary line is preferably set to coincide with a cutting line formed in a preset subsequent cutting process.

Preferably, the cutting of the first region and the cutting of the second region are performed simultaneously.

Preferably, when the first region is cut, the first region is sequentially cut from the position of the first auxiliary line to a direction away from the third region; when the second region is cut, the second region is cut in order from the position of the second auxiliary line to a direction away from the third region.

The length-width ratio of the obtained cutting area is gradually reduced, the stress action is gradually reduced, and the yield is improved. The closer to the edge, the shorter the dicing die, and the smaller the stress, and the edge die is an ineffective area, and the yield is not affected even if there is a crack.

Preferably, when the third region is cut, the cutting is performed in order from any auxiliary line in parallel with the auxiliary line.

The cutting mode is adopted, so that the cutter moves in the same direction in a moving mode perpendicular to the cutting line direction, the reciprocating invalid displacement is reduced, and the efficiency is improved.

Preferably, the cutting of the third region and the cutting of the first region are performed by a first cutter; the cutting of the second area is done by a second cutter.

Preferably, the length of the chip cut by the first cutter is smaller than the length of the chip cut by the second cutter.

Because the two-axis blades are replaced simultaneously, if one of the blades reaches its end of life, the other blade will be replaced simultaneously. When the length of the first cutter for cutting the chip is smaller than that of the second cutter for cutting the chip, the first cutter is less worn, more cutting tasks in the current cutting are completed by the first cutter with less wear, and the consistency of the wear degrees of the first cutter and the second cutter is favorably maintained. The uniformity of the cutting force of the two cutters is kept.

Preferably, the cutting of the third region is started from the second auxiliary line side.

Therefore, the first cutter moves in the same direction in the direction perpendicular to the cutting line, so that the occurrence of reciprocating invalid movement is avoided, and two areas can be continuously cut. The service life of the two cutters can be prolonged. In order to maintain a substantially consistent cutting force, etc., the blades of the two shafts are replaced simultaneously, and if one of the blades reaches its end of life, the other blade is replaced simultaneously.

Preferably, the first auxiliary lines and the second auxiliary lines have a pitch larger than a minimum pitch between the first cutter and the second cutter.

The area between the two auxiliary lines is cut firstly, mainly a safe distance between the two knife distances is reserved, and the two shafts can be cut simultaneously after the safe distance is enough.

Usually the chip is circular or approximately circular and the length of the chip in the direction of the auxiliary lines is the diameter or approximately the diameter of the chip.

Because the two cutters are axially oppositely arranged and fixed on the cutter shaft through the fixing nuts, a bulge for fixing is arranged on one side of the cutter far away from the cutter shaft, and the bulge influences the distance between the two cutters. The distance between the two tools must be greater than a fixed value. This fixed value is the minimum spacing between the first tool and the second tool. Therefore, after the first cutter finishes cutting the third area with larger stress influence, the second cutter can start to cut the second area while the first cutter cuts the first area.

The distance between the two auxiliary lines is larger than and close to the minimum distance between the cutters, so that the time for simultaneously cutting by the two cutters is maximized. The cutting efficiency is maintained while avoiding the influence of stress.

Preferably, adjacent cutting lines are cut at intervals of N rows of crystal grains, N is an integer, and N is more than or equal to 1.

Preferably, N =1, 2, 3, 4 or 5.

The distance between adjacent cutting lines may or may not be equidistant. But adjacent scribe lines are separated by at least 1 column of die.

Compared with the prior art, the invention has the beneficial effects that:

1. the invention adopts the mode of cutting the middle area firstly and then cutting the rest areas at the two sides, thereby reducing the stress of the chip in the cutting process, avoiding the chip from being cracked due to the stress action in the cutting process and improving the qualification rate of the chip product.

2. Effectively reduces the production cost, saves 5 percent of chips,

description of the drawings:

FIG. 1 is a schematic diagram of a first stage of dicing a comparative example chip;

in the figure, 1 is a first cutter, 2 is a second cutter, and 3 is a chip;

8 is a cutter shaft of the first cutter, and 9 is a cutter shaft of the second cutter;

11 is a cutting line of a first cutter, and 21 is a cutting line of a second cutter;

101 is an arrow indicating the sequence of the cutting lines 11, and 201 is an arrow indicating the sequence of the cutting lines 21;

FIG. 2 is a schematic diagram of a second stage of dicing a comparative example chip;

12 is the cutting line of the first cutter, and 22 is the cutting line of the second cutter;

102 is an arrow indicating the sequence of the cutting lines 12, 202 is an arrow indicating the sequence of the cutting lines 22;

FIG. 3 is a schematic diagram illustrating the division of chip areas in one embodiment;

41 is a first auxiliary line, 42 is a second auxiliary line; 5 is the center of the chip;

31 is a first region, 31 is a second region, and 33 is a third region;

FIG. 4 is a schematic diagram of a first stage of dicing of a chip according to an embodiment;

61 is the cutting line of the first cutter, 601 is an arrow indicating the sequence of the cutting lines 61;

FIG. 5 is a diagram illustrating a second stage of the chip dicing in the embodiment;

62 is the cut line of the first cutter, 602 is an arrow indicating the sequence of the cut lines 62;

72 is the cutting line of the second cutter, 702 is an arrow indicating the sequence of the cutting lines 72.

Detailed Description

The present invention will be described in further detail with reference to test examples and specific embodiments. It should be understood that the scope of the above-described subject matter is not limited to the following examples, and any techniques implemented based on the disclosure of the present invention are within the scope of the present invention.

Comparative example

The comparative example illustrates the double-blade cutting method of the chip adopted in the prior art.

As shown in fig. 1, the first cutter 1 and the second cutter 2 are relatively moved from both sides of the chip 3 to the middle. In the first stage the first cutter 1 cuts the chip 3 to form the cutting lines 11 and the second cutter 2 cuts the chip 3 to form the cutting lines 21. The cutting lines 11 are generated sequentially in the direction of the arrow 101. The cutting lines 21 are generated sequentially in the direction of the arrow 102.

Since the first cutter 1 and the second cutter 2 are respectively arranged on the first cutter shaft 8 and the second cutter shaft 9, when the first cutter and the second cutter are relatively moved to the middle part of the chip, the distance between the first cutter 1 and the second cutter 2 has a minimum value due to the influence of the cutter shafts. Cutting enters a second stage.

As shown in fig. 2, the first blade 1 cuts the chip to form a cutting line 12, and the cutting lines 12 are sequentially generated in the direction of an arrow 102; the second blade 2 cuts the chip to form a cut line 22, and the cut lines 22 are sequentially generated in the direction of an arrow 202.

In this comparative example, adjacent scribe lines were cut one row of die cuts apart.

Examples

This example illustrates one implementation of the double-knife cutting method of the present invention.

As shown in fig. 3, virtual first auxiliary lines 41 and second auxiliary lines 42 are arranged on the plane of the upper surface of the circular chip, two straight lines are arranged on two sides of the center 5 of the chip, and the first auxiliary lines 41 and the second auxiliary lines 42 divide the chip into a first area 31 and a second area 32 and a third area 33 between the auxiliary lines.

In the first stage of cutting, the third area 33 is cut first, and in this embodiment, as shown in fig. 4, the chip is cut in the direction of the first auxiliary line 41 in sequence from the position of the second auxiliary line 42, the first cutter 1 cuts the chip to form a cut line 61, and the cut lines 61 are sequentially generated in the direction indicated by the arrow 601.

A second stage of cutting, in which the first cutter 1 cuts the first region 31 to form a cutting line 62, and the cutting lines 62 are sequentially generated in the direction of an arrow 602; at the same time, the second blade 2 cuts the second sector 32 to form the cut lines 72, the cut lines 72 being generated sequentially in the direction of the arrow 702.

Test examples

The method in the comparative example and the cutting method in the example are respectively adopted to carry out tests, and the qualification rate of the cutting method in the prior art and the cutting method in the invention are compared. And taking 20 groups of chips for comparison. The test results are shown in Table 1

TABLE 1 comparison of percent of pass for the prior art and the cutting method of the present invention

As can be seen from table 1, the yield of the product was 95% by the method in the comparative example, and 99% by the cutting method in the example. The qualification rate is obviously improved.

Claims

1. A chip cutting method is characterized in that,

s1, arranging a virtual first auxiliary line and a second auxiliary line parallel to the first auxiliary line on the plane of the upper surface of the chip, wherein the first auxiliary line and the second auxiliary line divide the chip into a first area, a second area and a third area, and the third area is located between the two auxiliary lines; the first auxiliary line is positioned between the first area and the third area; the second auxiliary line is positioned between the second area and the third area;

s3, cutting the first area and the second area, wherein the cutting line is parallel to the auxiliary line;

the cutting of the third area and the cutting of the first area are completed by the first cutter;

cutting the third area from one side of the second auxiliary line; cutting in sequence parallel to the auxiliary line; when the first area is cut, sequentially cutting from the position of the first auxiliary line to the direction far away from the third area;

the cutting of the second area is completed by a second cutter; when the second region is cut, the second region is cut in order from the position of the second auxiliary line to a direction away from the third region.

2. The chip dicing method according to claim 1, wherein the dicing of the first region and the dicing of the second region are performed simultaneously.

3. The method of cutting a chip as set forth in claim 1, wherein the length of the chip cut by the first cutter is shorter than the length of the chip cut by the second cutter.

4. The method of dicing a chip according to claim 1, wherein the two auxiliary lines are spaced apart by a distance greater than a minimum distance between the first cutter and the second cutter.

5. The method for cutting chips as claimed in any one of claims 1 to 4, wherein adjacent cutting lines are cut at intervals of N rows of crystal grains, N is an integer, and N is not less than 1.

6. The chip dicing method according to claim 5, wherein N =1, 2, 3, 4, or 5.