Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention rather than limiting the invention.It also should be noted that in order to just
Only the parts related to the present invention are shown in description, attached drawing rather than entire infrastructure.
Fig. 1 is a kind of structural schematic diagram of display panel provided in an embodiment of the present invention.Referring to Fig. 1, the display panel packet
It includes: N scan line 10, the N number of scan drive circuit 20 being correspondingly arranged with N scan line 10, resolution ratio control module 30, first
Resolution-control signal line 40 and the first electric potential signal line 50.
N number of 20 cascade connection of scan drive circuit, scan drive circuit 20 include higher level's shift signal input terminal, junior's shifting
Position signal output end and scanning signal output end, scanning signal output end are electrically connected with scan line 10.
Resolution ratio control module 30 (schematically illustrates 4 input terminals including M input terminal, M output end in Fig. 1
With 4 output ends), control signal end and the first electric potential signal input terminal;Control signal end and first resolution control signal wire
40 electrical connections, the first electric potential signal input terminal is electrically connected with the first electric potential signal line 50, M input terminal respectively with corresponding scanning
Junior's shift signal output end of driving circuit 20 is electrically connected, and M output end is upper with corresponding scan drive circuit 20 respectively
Grade shift signal input terminal electrical connection;Resolution ratio control module 30 is used for the signal according to first resolution control signal wire 40,
Corresponding input terminal and output end, or the first electric potential signal input terminal of conducting and output end is connected;Wherein, N >=M, N, M are
Positive integer.
Wherein, the M input terminal and M output end of resolution ratio control module 30 are correspondingly arranged.When first resolution controls
When the corresponding input terminal and output end of the signal control resolution ratio control module 30 of signal wire 40 are connected, the scanning of upper level is driven
Higher level's shift signal input terminal conducting of the scan drive circuit 20 of junior's shift signal output end and next stage of dynamic circuit 20,
The scan drive circuit 20 being electrically connected with resolution ratio control module 30 may be implemented normally to export scanning signal.Work as first resolution
When the first electric potential signal input terminal and output end of the signal control resolution ratio control module 30 of control signal wire 40 are connected, first
The conducting of higher level's shift signal input terminal of electric potential signal input terminal and scan drive circuit 20, is electrically connected with resolution ratio control module 30
The scan drive circuit 20 connect exports the signal of fixed current potential because receiving the fixation current potential of the first electric potential signal line 50, that is, scans
Driving circuit 20 stops output scanning signal.When scan drive circuit 20 exports the signal of fixed current potential, corresponding scanning
The pixel of line driving electrical connection does not shine, to realize the picture of display different resolution.
Illustratively, the driving method of the display panel includes: to send resolution ratio to first resolution control signal wire 40
Signal is controlled, sends the first electric potential signal to the first electric potential signal line 50;
According to the signal of first resolution control signal wire 40, controls resolution ratio control module 30 and corresponding input terminal is connected
And output end, drive corresponding scan drive circuit 20 successively to shift output scanning signal, display panel is shown as the first display
Resolution ratio;
Alternatively, according to the signal of first resolution control signal wire 40, control resolution ratio control module 30 the first electricity of conducting
Position signal input part and output end, drive corresponding scan drive circuit 20 to stop working, display panel is shown as the second display
Resolution ratio.Wherein, the second display resolution is lower than the first display resolution.
The embodiment of the present invention passes through setting resolution ratio control module 30, higher level's displacement of control section scan drive circuit 20
Signal input part is electrically connected with junior's shift signal output end of upper level scan drive circuit 20, alternatively, control section is scanned
Higher level's shift signal input terminal of driving circuit 20 is electrically connected with the first electric potential signal line 50, to realize driving whole or portion
The function of dividing scan drive circuit 20 to export scanning signal.Therefore, the embodiment of the present invention can be compatible with a variety of display resolutions.With
And the embodiment of the present invention can according to need the position of the scan drive circuit 20 of the electrical connection of flexible setting resolution ratio control module 30
It sets, is equivalent to and joined tap function in display panel.In addition, the embodiment of the present invention by the first electric potential signal input terminal and
When higher level's shift signal input terminal conducting of scan drive circuit 20, it is equivalent to scan drive circuit 20 and has input a fixation
Electric potential signal, the internal components of scan drive circuit 20 do not work.Therefore, the embodiment of the present invention is reducing display resolution
When, the power consumption of pixel can be not only reduced, the power consumption of scan drive circuit 20 can also be reduced.
On the basis of the various embodiments described above, optionally, the scanning signal output end of scan drive circuit 20 passes through scanning
Line 10 is electrically connected with pixel.Fig. 2 is a kind of structural schematic diagram of pixel circuit provided in an embodiment of the present invention.Referring to fig. 2, optional
Ground, the pixel circuit include data signal input VDATA, the first scanning signal input terminal WS_1, the input of the second scanning signal
Hold WS_2, the first reference signal end NCP, the second reference signal end VFB, the first power end ELVDD, second source end ELVSS, hair
Optical control signal end EMIT, driving transistor MD, input module MS1, reseting module MS2, light emitting control module MS3 and capacitor
C1.The control terminal of input module MS1 is electrically connected with the first scanning signal input terminal WS_1, the first end and number of input module MS1
It is electrically connected according to signal input part VDATA, the second end of input module MS1 is electrically connected with the control terminal of driving transistor MD.Capacitor
The first end of C1 is electrically connected with the first reference signal end NCP, and the second end of capacitor C1 and the control terminal of driving transistor MD are electrically connected
It connects.The first end of driving transistor MD is electrically connected with the first power end ELVDD.The control terminal of reseting module MS2 and the second scanning
Signal input part WS_2 electrical connection, the first end of reseting module MS2 are electrically connected with the second reference signal end VFB, reseting module MS2
Second end with driving transistor MD second end be electrically connected.The control terminal of light emitting control module MS3 and LED control signal end
The first end of EMIT electrical connection, light emitting control module MS3 is electrically connected with the second end of driving transistor MD, light emitting control module
The second end of MS3 is electrically connected with the anode of luminescent device OLED.The cathode of luminescent device OLED is electrically connected with second source end ELVSS
It connects.
Illustratively, which is emission control circuit, and scanning signal output end and pixel circuit shine
Control terminal EMIT electrical connection.Under typical clock signal output mode, in the first high level pulse stage of higher level's shift signal,
Pixel circuit is in reseting stage, and each node and luminescent device anode do and reset inside pixel circuit.In higher level's shift signal
When the second high level pulse stage, scanning signal output end exports high level, and pixel circuit and luminescent device OLED are disconnected, shone
Device OLED does not shine, and pixel circuit is in data write phase, by data-signal write driver transistor.It can be seen that
Under typical clock signal output mode, in a frame, only at the second high level pulse stage of higher level's shift signal, scanning
Signal output end exports high level, and pixel circuit and luminescent device OLED are disconnected, and luminescent device OLED does not shine.
Fig. 3 is a kind of structural schematic diagram of scan drive circuit cascade connection provided in an embodiment of the present invention.Referring to Fig. 3,
On the basis of the various embodiments described above, optionally, resolution ratio control module 30 includes: M the first data selecting modules 31, and M is a
First data selecting module 31 is connected respectively between the M input terminal and M output end of resolution ratio control module 30.
Wherein, the first data selecting module 31 for example can be data selector, the control of the first data selecting module 31
End be electrically connected with the control signal end CTRL of resolution ratio control module 30, the first input end of the first data selecting module 31 and divide
The input terminal of resolution control module 30 is electrically connected, the second input terminal and resolution ratio control module 30 of the first data selecting module 31
The electrical connection of the first electric potential signal input terminal, the output of the output end of the first data selecting module 31 and resolution ratio control module 30
End electrical connection.
It is illustrated for M=5 shown in Fig. 3 below, which is emission control circuit.First
The first input end of the first data selecting module 31 of grade is electrically connected with enabling signal line STV, the first data selecting module of the first order
31 the second input terminal is electrically connected with the first electric potential signal input terminal VGH;The first of the first data selecting module of the second level 31 is defeated
Enter input terminal (i.e. junior's shift signal output end of the first order scan drive circuit 20) electricity of end and resolution ratio control module 30
Connection, the second input terminal of the first data selecting module of the second level 31 are electrically connected with the first electric potential signal input terminal VGH;The third level
The first input end of first data selecting module 31 and input terminal (i.e. the 2nd grade of scan drive circuit of resolution ratio control module 30
20 junior's shift signal output end) electrical connection, the second input terminal and enabling signal of the first data selecting module of the third level 31
Line STV electrical connection;The first input end of the first data selecting module of the fourth stage 31 and the input terminal of resolution ratio control module 30 are (i.e.
Junior's shift signal output end of N-2 grades of scan drive circuits 20) electrical connection, the of the first data selecting module of the fourth stage 31
Two input terminals are electrically connected with the first electric potential signal input terminal VGH;The first input end of the first data selecting module of level V 31 with
The input terminal (junior's shift signal output end of i.e. N-1 grades scan drive circuits 20) of resolution ratio control module 30 is electrically connected,
Second input terminal of the first data selecting module of level V 31 is electrically connected with the first electric potential signal input terminal VGH.
When control signal end CTRL is low level (0), higher level's shift signal input of first order scan drive circuit 20
End input enabling signal, higher level's shift signal input terminal of the second level to N grades of scan drive circuits 20 input upper level
Junior's shift signal, scan drive circuit 20 export scanning signal step by step, and each row pixel of display panel is shown, are shown as
One display resolution.
When control signal end CTRL is high level (1), the first order, the second level, N-1 grades and N grades of turntable driving electricity
Higher level's shift signal input terminal on road 20 inputs the first electric potential signal, and higher level's shift signal of third level scan drive circuit 20 is defeated
Enter end input enabling signal, higher level's shift signal input terminal of the fourth stage to N grades of scan drive circuits 20 inputs upper level
Junior's shift signal, the fourth stage to N grades of scan drive circuits 20 exports scanning signal, the first order, the second level, N- step by step
1 grade and N grades of scan drive circuits 20 export high level, and the first row, the second row, N-1 row and nth row of pixels do not shine, the
Four rows to nth row of pixels shine, and are shown as the second display resolution.
It includes M the first data selecting modules 31 that resolution ratio control module 30, which is arranged, in the embodiment of the present invention, realizes two kinds
The switching of display resolution.
Fig. 4 is the structural schematic diagram of another scan drive circuit cascade connection provided in an embodiment of the present invention.Referring to figure
4, on the basis of the various embodiments described above, optionally, and resolution ratio control module 30 further include: the second data selecting module 32, the
Two data selecting modules 32 are connected to the P grades of input terminals and the first data selecting module of P grade 31 of resolution ratio control module 30
Between.
The control signal end of resolution ratio control module 30 includes first control signal end CTRL1 and second control signal end
CTRL2;The control terminal of the first data selecting module of preceding P-1 grade 31 is electrically connected with first control signal end CTRL1;P~(Q-1)
The control terminal of the first data selecting module 31 of grade is electrically connected with second control signal end CTRL2;Second data selecting module 32
Control terminal is electrically connected with first control signal end CTRL1.Wherein, 1 < P < Q≤M, P, Q is positive integer.
Illustratively, the whole resolution that display panel is shown in Fig. 4 is 1200 × 1920RGB, specifically, N=
1200, M=480, P=61, Q=89.The control terminal and first control signal end CTRL1 of 1st grade of first data selecting module 31
Electrical connection, first input end are electrically connected with enabling signal line, and the second input terminal is electrically connected with the first electric potential signal input terminal.2nd
The control terminal of~60 grade of first data selecting module 31 is electrically connected with first control signal end CTRL1, first input end and upper one
Junior's shift signal output end electrical connection of grade scan drive circuit 20, the second input terminal are electrically connected with the first electric potential signal input terminal
It connects.The control terminal of 61st grade of first data selecting module 31 is electrically connected with second control signal end CTRL2, the second input terminal and
The electrical connection of one electric potential signal input terminal.The control terminal of 62nd~88 grade of first data selecting module 31 and second control signal end
CTRL2 electrical connection, first input end are electrically connected with junior's shift signal output end of upper level scan drive circuit 20, and second is defeated
Enter end to be electrically connected with the first electric potential signal input terminal.The control terminal of second data selecting module 32 and first control signal end
CTRL1 electrical connection, first input end are electrically connected with junior's shift signal output end of the 60th grade of scan drive circuit 20, and second is defeated
Enter end to be electrically connected with the first electric potential signal input terminal, the first input end electricity of output end and the 61st grade of first data selecting module 31
Connection.
It includes that the first data selecting module 31 and the second data select that resolution ratio control module 30, which is arranged, in the embodiment of the present invention
Module 32, the control signal end of resolution ratio control module 30 include first control signal end CTRL1 and second control signal end
CTRL2 realizes the switching of three kinds of display resolutions.
With continued reference to Fig. 4, on the basis of the various embodiments described above, optionally, (M-Q+1)~(M-P) the first data of grade
The control terminal of selecting module 31 is electrically connected with second control signal end CTRL2;(M-P+1)~M the first data selecting module of grade
31 control terminal is electrically connected with first control signal end CTRL1.The embodiment of the present invention in this way, can make display panel with
When low display resolution is shown, central region of the display picture in entire display panel.
With continued reference to Fig. 4, on the basis of the various embodiments described above, optionally, resolution ratio control module 30 further includes third
Data selecting module 33, third data selecting module 33 are connected to the Q grades of input terminals and Q grade of resolution ratio control module 30
Between one data selecting module 31.
The control signal end of resolution ratio control module 30 further includes third control signal end CTRL3;The number of Q~X grade first
It is electrically connected according to the control terminal of selecting module 31 with third control signal end CTRL3;The control terminal of third data selecting module 33 with
Second control signal end CTRL2 electrical connection.Wherein, Q < X≤M, X are positive integer.
In Fig. 4 illustratively, X=216.The control terminal and third control signal end of 89th grade of first data selecting module 31
CTRL3 electrical connection, the second input terminal are electrically connected with the first electric potential signal input terminal.90th~216 grade of the first data selecting module
31 control terminal is electrically connected with third control signal end CTRL3, the junior of first input end and upper level scan drive circuit 20
The electrical connection of shift signal output end, the second input terminal are electrically connected with the first electric potential signal input terminal VGH.Third data selecting module
33 control terminal is electrically connected with second control signal end CTRL2, the junior of first input end and the 88th grade of scan drive circuit 20
The electrical connection of shift signal output end, the second input terminal is electrically connected with the first electric potential signal input terminal, output end and the 89th grade first
The first input end of data selecting module 31 is electrically connected.
It includes the first data selecting module 31, the second data selection mould that resolution ratio control module 30, which is arranged, in the embodiment of the present invention
Block 32 and third data selecting module 33, the control signal end of resolution ratio control module 30 include first control signal end CTRL1,
Second control signal end CTRL2 and third control signal end CTRL3, realizes the switching of four kinds of display resolutions.
It should be noted that schematically illustrating resolution ratio control module 30 in the above-described embodiments includes three kinds of data
The control signal end of selecting module, resolution ratio control module 30 includes three kinds of control signal ends, can be realized and shows resolution in four
The switching of rate, not limitation of the invention.In other embodiments, greater number of data choosing can also be set as needed
Module and control signal end are selected, realizes the switching of more display resolutions.
With continued reference to Fig. 4, on the basis of the various embodiments described above, optionally, resolution ratio control module 30 further includes the 4th
Data selecting module 34, the control signal end of resolution ratio control module 30 further include the 4th control signal end CTRL4.217th grade
The control terminal of first data selecting module 31 is electrically connected with the 4th control signal end CTRL4, and the second input terminal and the first current potential are believed
The electrical connection of number input terminal.The control terminal of 218th~241 grade of first data selecting module 31 and the 4th control signal end CTRL4 electricity
Connection, first input end is electrically connected with junior's shift signal output end of upper level scan drive circuit 20, the second input terminal and
First electric potential signal input terminal VGH electrical connection.Control terminal and third control signal end the CTRL3 electricity of 4th data selecting module 34
Connection, first input end is electrically connected with junior's shift signal output end of the 216th grade of scan drive circuit 20, the second input terminal and
The electrical connection of first electric potential signal input terminal, output end are electrically connected with the first input end of the 217th grade of first data selecting module 31.
It includes the first data selecting module 31, the second data selection mould that resolution ratio control module 30, which is arranged, in the embodiment of the present invention
Block 32, third data selecting module 33 and the 4th data selecting module 34, the control signal end of resolution ratio control module 30 include
First control signal end CTRL1, second control signal end CTRL2, third control signal end CTRL3 and the 4th control signal end
CTRL4 realizes the switching of five kinds of display resolutions.
With continued reference to Fig. 4, on the basis of the various embodiments described above, optionally, the 961st~984 grade of the first data select mould
The control terminal of block 31 is electrically connected with the 4th control signal end CTRL4, under first input end and upper level scan drive circuit 20
Grade shift signal output end electrical connection, the second input terminal are electrically connected with the first electric potential signal input terminal VGH.985th~1112 grade
The control terminal of first data selecting module 31 is electrically connected with third control signal end CTRL3, and first input end and upper level scan
Junior's shift signal output end of driving circuit 20 is electrically connected, and the second input terminal is electrically connected with the first electric potential signal input terminal VGH.
The control terminal of 1113rd~1140 grade of first data selecting module 31 is electrically connected with second control signal end CTRL2, the first input
End is electrically connected with junior's shift signal output end of upper level scan drive circuit 20, and the second input terminal and the first electric potential signal are defeated
Enter VGH is held to be electrically connected.Control terminal and first control signal end the CTRL1 electricity of 1141st~1200 grade of first data selecting module 31
Connection, first input end is electrically connected with junior's shift signal output end of upper level scan drive circuit 20, the second input terminal and
First electric potential signal input terminal VGH electrical connection.
The embodiment of the present invention is in this way, realize the switching of five kinds of display resolutions, including a kind of height integrally shown
The low display resolution of display resolution and four kinds of part displays, and the image that four kinds of low resolution are shown is respectively positioned on display panel
Central region.
The driving method for the five kinds of display resolutions realized below with regard to the embodiment of the present invention is illustrated.
Illustratively, the driving method of the display panel is, when first control signal end CTRL1 is low level (0), second
Control signal end CTRL2 is low level (0), third control signal end CTRL3 is low level (0), the 4th control signal end CTRL4
When for low level (0), scan drive circuits 20 at different levels export scanning signal step by step, and each row pixel of display panel is shown, show
It is shown as the first display resolution (1200 × 1920RGB).
When first control signal end, CTRL1 is high level (1), second control signal end CTRL2 is low level (0), third
When control signal end CTRL3 is low level (0), the 4th control signal end CTRL4 is low level (0), the 61st~1140 grade of scanning
Driving circuit 20 exports scanning signal step by step, the 61st~1140 row pixel light emission, be shown as the second display resolution (1080 ×
1920RGB)。
When first control signal end, CTRL1 is high level (1), second control signal end CTRL2 is high level (1), third
When control signal end CTRL3 is low level (0), the 4th control signal end CTRL4 is low level (0), the 89th~1113 grade of scanning
Driving circuit 20 exports scanning signal step by step, the 89th~1113 row pixel light emission, be shown as third display resolution (1024 ×
1920RGB)。
When first control signal end, CTRL1 is high level (1), second control signal end CTRL2 is high level (1), third
When control signal end CTRL3 is high level (1), the 4th control signal end CTRL4 is low level (0), the 217th~986 grade of scanning
Driving circuit 20 exports scanning signal step by step, the 217th~986 row pixel light emission, be shown as the 4th display resolution (768 ×
1920RGB)。
When first control signal end, CTRL1 is high level (1), second control signal end CTRL2 is high level (1), third
When control signal end CTRL3 is high level (1), the 4th control signal end CTRL4 is high level (1), the 241st~961 grade of scanning
Driving circuit 20 exports scanning signal step by step, the 241st~961 row pixel light emission, be shown as the 5th display resolution (720 ×
1920RGB)。
The switching of five kinds of display resolutions may be implemented in the embodiment of the present invention so as a result,.And the embodiment of the present invention exists
When by the conducting of higher level's shift signal input terminal of the first electric potential signal input terminal and scan drive circuit 20, it is equivalent to scanning and drives
Dynamic circuit 20 has input a fixed electric potential signal, and the internal components of scan drive circuit 20 do not work.Therefore, the present invention is real
Example is applied when reducing display resolution, the power consumption of pixel can be not only reduced, the power consumption of scan drive circuit 20 can also be reduced.
It should be noted that the embodiment of the present invention, which schematically illustrates display panel, may be implemented cutting for five kinds of resolution ratio
It changes, not limitation of the invention, can according to need flexible setting resolution ratio control module 30 in other embodiments and be electrically connected
The position of the scan drive circuit 20 connect is equivalent to and joined tap function in display panel, to realize more displays
Mode.
Fig. 5 is the structural schematic diagram of another scan drive circuit cascade connection provided in an embodiment of the present invention.Referring to figure
5, on the basis of the various embodiments described above, optionally, display panel further includes that data controlling signal line (illustratively shows in Fig. 5
Three data control signal wires, respectively data controlling signal line S<0>, data controlling signal line S<1>and data control are gone out
Signal wire S<2>) and decoder 60, the input terminal of decoder 60 be electrically connected with data controlling signal line, the output end of decoder 60
It is electrically connected with the control signal end of resolution ratio control module and (schematically illustrates control signal end in Fig. 5 and include the first control
Signal end CTRL1, second control signal end CTRL2, third control signal end CTRL3 and the 4th control signal end CTRL4).
Setting decoder 60 of the embodiment of the present invention may be implemented to be realized with the quantity of less control line and export compared with multi signal
Function, be advantageously implemented more control functions.Illustratively, 4 control signal ends can be realized with 3 control signals
Data-transformation facility, realize five kinds of display resolutions.Specifically, data controlling signal line S<0>, data controlling signal line S<1
>display resolution corresponding with the signal on data control signal wire S<2>is as shown in table 1.
Table 1
Resolution ratio |
S<2> |
S<1> |
S<0> |
1200x1920RGB |
0 |
0 |
0 |
1080x1920RGB |
1 |
0 |
0 |
1024x1920RGB |
1 |
0 |
1 |
768x1920RGB |
1 |
1 |
0 |
720x1920RGB |
1 |
1 |
1 |
On the basis of the various embodiments described above, optionally, resolution ratio control module 30 is electric with preceding M/2 grades of turntable driving respectively
Road 20 and the electrical connection of rear M/2 grades of scan drive circuit 20.The embodiment of the present invention is in this way, can make display panel with low aobvious
When showing resolution ratio display, non-luminous region shows picture in the central region of entire display panel at the edge of display panel.
It should be noted that the whole display resolution for schematically illustrating display panel in the above-described embodiments is
1200 × 1920, not limitation of the invention.In other embodiments, the resolution ratio that display panel can also be arranged is higher,
Or the resolution ratio of setting display panel is lower, can according to need be configured in practical applications.
Fig. 6 is the structural schematic diagram of another display panel provided in an embodiment of the present invention, and Fig. 7 mentions for the embodiment of the present invention
A kind of structural schematic diagram of the scan drive circuit supplied.Referring to Fig. 6 and Fig. 7, on the basis of the various embodiments described above, optionally,
Display panel further include: the first clock cable 10 and second clock signal wire 11.Odd level scan drive circuit first when
Clock signal input part CLK is electrically connected with the first clock cable 10, the second clock signal input of odd level scan drive circuit
End XCLK is electrically connected with second clock signal wire 11.First clock signal input terminal CLK of even level scan drive circuit and
The electrical connection of two clock cables 11, the second clock signal input part XCLK and the first clock signal of even level scan drive circuit
Line 10 is electrically connected.
The scan drive circuit includes: the first clock signal input terminal CLK, second clock signal input part XCLK, display
Switching signal input terminal ENI, higher level's shift signal input terminal STV, junior shift signal output end NEXT, scanning signal output end
OUT, latch module 110, the first display control module 210, the second display control module 220 and display switching module 310.
Latch module 110 is moved with the first clock signal input terminal CLK, higher level shift signal input terminal STV and junior respectively
Position signal output end NEXT electrical connection, latch module 110 are used to respond the first clock of the first clock signal input terminal CLK input
Signal latches higher level's shift signal of higher level's shift signal input terminal STV input, and passes through junior's shift signal output end NEXT
Output.
First display control module 210 respectively with second clock signal input part XCLK and junior's shift signal output end
NEXT electrical connection;First display control module 210 is used to respond junior's displacement letter of junior shift signal output end NEXT output
Number, the second clock signal of second clock signal input part XCLK input is exported.
Second display control module 220 is electrically connected with junior shift signal output end NEXT;Second display control module 220
For responding and exporting junior's shift signal of junior shift signal output end NEXT output.
Show that switching module 310 is aobvious with display switching signal input terminal ENI, the first display control module 210, second respectively
Show control module 220 and scanning signal output end OUT electrical connection;Show that switching module 310 is defeated for responding display switching signal
The first display control module 210 and scanning signal output end OUT is connected, alternatively, leading in the display switching signal for entering to hold ENI to input
Logical second display control module 220 and scanning signal output end OUT.
Wherein, the first clock signal input terminal CLK inputs the first clock signal, second clock signal input part XCLK input
Second clock signal, display switching signal input terminal ENI input display switching signal, higher level shift signal input terminal STV input
Higher level's shift signal, junior shift signal output end NEXT export junior's shift signal, scanning signal output end OUT output scanning
Signal.
Latch module 110 latches higher level's shift signal and refers to, when the first clock signal closes the latch module 110,
Latch module 110 can keep level state on last stage.First display control module 210 responds the output of junior's shift signal
The junior's shift signal for holding NEXT output, the second clock signal of second clock signal input part XCLK input, which is exported, is
Refer to, junior's shift signal be useful signal when, the first display control module 210 output signal by second clock signal control
System.The signal of first display control module 210 output can be former second clock signal, be also possible to negated second clock
Signal.Second display control module 220 responds and exports junior's shift signal that junior shift signal output end NEXT is exported
Refer to, the second display control module 220 is controlled by junior's shift signal, and the signal of the second display control module 220 output can be
Former junior's shift signal is also possible to negated junior's shift signal.
The embodiment of the present invention by setting the first display control module 210 and the second display control module 220 with display
Switching module 310 is electrically connected, and display switching module 310 is for being connected the first display control module 210 and scanning signal output end
OUT realizes the first display pattern;Alternatively, the second display control module of conducting 220 and scanning signal output end OUT, realizes second
Display pattern.Compared with prior art, the embodiment of the present invention can be compatible with more display patterns, and realize and switchably show
Show plurality of display modes, to enrich the scanning mode of scan drive circuit.
Illustratively, the scanning signal output end OUT of the first display control module 210 control scan drive circuit exports allusion quotation
The clock signal (normal timing) of type, the second display control module 220 control the scanning signal output of scan drive circuit
When the whole clock signal (global timing) of end OUT output, rolling clock signal (Rolling timing), rolling are blacked
Sequential signal, bright one of clock signal (dimming timing) or aging clock signal (aging timing) or more
Kind.
If showing the display switching signal of the response display switching signal input terminal ENI input of switching module 310, conducting first
Display control module 210 and scanning signal output end OUT, then the scanning signal output end OUT of scan drive circuit exports typical
Clock signal.Fig. 8 is that a kind of driver' s timing schematic diagram of scan drive circuit provided in an embodiment of the present invention shows referring to Fig. 8
Example property, the driver' s timing of the scan drive circuit includes first stage T1, second stage T2, phase III T3, fourth stage
T4 and the 5th stage T5.
T1 in the first stage, higher level's shift signal are high level (the first high level pulse stage), and second clock signal is
Low level.When the first clock signal is low level, latch module 110 latches higher level's shift signal of previous stage, in junior
Shift signal output end NEXT continues to output low level.When the first clock signal is high level, the response of latch module 110 first
The high level of clock signal exports higher level's shift signal to junior shift signal output end NEXT, i.e., in junior's shift signal
Junior's shift signal of output end NEXT output is also high level.First display control module 210 responds junior's shift signal
High level, by the low level output of second clock signal, i.e., when junior's shift signal is high level, the first display control module
The signal of 210 outputs is consistent with the level of second clock signal, is low level (Low).
In second stage T2, higher level's shift signal is high level (the second high level pulse stage), and the first clock signal is
Low level.Latch module 110 latches higher level's shift signal of first stage T1, continues in junior shift signal output end NEXT defeated
High level out.When second clock signal is low level, the first display control module 210 responds the height electricity of junior's shift signal
It is flat, by the low level output of second clock signal.When second clock signal is high level, 210 sound of the first display control module
The high level for answering junior's shift signal, by the high level output of second clock signal, i.e., when junior's shift signal is high level,
The signal of first display control module 210 output is consistent with the level of second clock signal, is high level (High).
In phase III T3, higher level's shift signal is low level, and the first clock signal is low level, and second clock signal is
Low level.Latch module 110 latches higher level's shift signal of second stage T2, continues in junior shift signal output end NEXT defeated
High level out.First display control module 210 responds the high level of junior's shift signal, and the low level of second clock signal is defeated
Out, i.e., when junior's shift signal is high level, the signal of the first display control module 210 output and the electricity of second clock signal
It is flat consistent, be low level (Low).
In fourth stage T4, higher level's shift signal is low level, and the first clock signal is high level, and second clock signal is
Low level.Latch module 110 responds the high level of the first clock signal, higher level's shift signal is exported, in junior's shift signal
Junior's shift signal of output end NEXT output is also low level.First display control module 210 responds junior's shift signal
Low level and export low level, i.e., junior's shift signal be low level when, the first display control module 210 output signal with
Second clock signal is unrelated, exports low level (Low) always.
In the 5th stage T5, higher level's shift signal is low level, and the first clock signal is low level.Latch module 110 is locked
The higher level's shift signal for depositing fourth stage T4 continues to output low level in junior shift signal output end NEXT.First display control
Molding block 210 in response to junior's shift signal low level and export low level, i.e., junior's shift signal be low level when, first
The signal that display control module 210 exports is unrelated with second clock signal, exports low level (Low) always.
And so on, after the 5th stage T5, higher level's shift signal remains low level, scanning signal output end OUT
Export low level.
Higher level's shift signal is shifted and is exported by the scan drive circuit as a result, and in the second high electricity of higher level's shift signal
The flat pulse stage exports the high level pulse of second clock signal to scanning signal output end OUT, realizes typical timing letter
Number output.The scanning signal is transmitted step by step in the scanning signal output end OUT of scan drive circuits at different levels, and driving display panel is real
Existing typical case's display pattern.
If showing the display switching signal of the response display switching signal input terminal ENI input of switching module 310, conducting second
Display control module 220 and scanning signal output end OUT, then the scanning signal output end OUT of scan drive circuit can be exported
Whole clock signal.Fig. 9 is the driver' s timing schematic diagram of another scan drive circuit provided in an embodiment of the present invention.Referring to figure
9, illustratively, the driver' s timing of the scan drive circuit includes the 6th stage T6, the 7th stage T7, the 8th stage T8, the 9th
Stage T9, the tenth stage T10 and the 11st stage T11.
In the 6th stage T6, enabling signal is low level.When the first clock signal is low level, latch module 110 is locked
The enabling signal for depositing previous stage continues to output low level in junior shift signal output end NEXT.When the first clock signal is
When high level, latch module 110 responds the high level of the first clock signal, and enabling signal is exported to junior's shift signal and is exported
NEXT is held, i.e., is also high level in first junior's signal of junior shift signal output end NEXT output.Second display control mould
Block 220 responds the low level of first junior's signal, and by the low level output, i.e. the second display control module 220 is by the first junior
Signal directly exports, and the second display control module 220 exports low level, to export low level in scanning signal output end.
In the 7th stage T7, enabling signal is low level, and the first clock signal is low level.Latch module 110 latches the
The enabling signal of six stage T6 continues to output low level in junior shift signal output end NEXT.Second display control module 220
The low level for responding first junior's signal, by the low level output, i.e. the second display control module 220 is straight by first junior's signal
Output is connect, the second display control module 220 exports low level, to export low level in scanning signal output end.
In the 8th stage T8, enabling signal is low level, and the first clock signal is high level.Latch module 110 and second
The working condition and output signal of display control module 220 are identical as the 6th stage T6, the output of the second display control module 220
Low level, to export low level in scanning signal output end.
In the 9th stage T9, the first clock signal is low level.Latch module 110 latches the starting letter of the 8th stage T8
Number, low level is continued to output in junior shift signal output end NEXT.Second display control module 220 responds first junior's signal
Low level, by the low level output, i.e. the second display control module 220 directly exports first junior's signal, second display
Control module 220 exports low level, to export low level in scanning signal output end.
In the tenth stage T10, enabling signal is high level, and the first clock signal is high level.The response of latch module 110 the
The high level of one clock signal exports enabling signal to junior shift signal output end NEXT, i.e., in junior, shift signal is defeated
First junior's signal of outlet NEXT output is also high level.Second display control module 220 responds the height of first junior's signal
Level, by the high level output, i.e. the second display control module 220 directly exports first junior's signal, the second display control
Module 220 exports high level, to export high level in scanning signal output end.
In the 11st stage T11, enabling signal is high level, and the first clock signal is low level.Latch module 110 latches
The enabling signal of tenth stage T10 continues to output high level in junior shift signal output end NEXT.Second display control module
The high level of 220 first junior's signals of response, by the high level output, i.e. the second display control module 220 believes the first junior
It number directly exports, the second display control module 220 exports high level, to export high level in scanning signal output end.
And so on, after the 11st stage T11, enabling signal remains high level, the second display control module 220
High level is exported, exports high level in scanning signal output end.
The scan drive circuit exports enabling signal as a result, realizes whole clock signal output, and whole clock signal
It is identical as the pulse width of enabling signal, the influence of pulse width not subject clock signal.The scanning signal is driven in scannings at different levels
The scanning signal output end of dynamic circuit exports simultaneously, and driving display panel realizes whole display pattern.Under whole display pattern,
The pixel of all rows opens simultaneously, and simultaneously closes off, to realize that each frame has complete independent picture to show, to avoid
The problem of hangover.
Figure 10 is the driver' s timing schematic diagram of another scan drive circuit provided in an embodiment of the present invention.Referring to Figure 10,
Illustratively, the driver' s timing of the scan drive circuit includes the tenth two-stage T12, the 13rd stage T13, the 14th stage
T14, the 15th stage T15, the 16th stage T16 and the 17th stage T17.
In the tenth two-stage T12, enabling signal is low level, and second clock signal is high level.Latch module 110 responds
The high level of second clock signal, enabling signal is exported, and shifts letter in the junior of junior shift signal output end NEXT output
It number is also low level.Second display control module 220 responds the low level of junior's shift signal, by the low level output, i.e., the
Two display control modules 220 directly export junior's shift signal, to export low level in scanning signal output end.
In the 13rd stage T13, enabling signal is low level, and the first clock signal is low level.Latch module 110 latches
The enabling signal of tenth two-stage T12 continues to output low level in junior shift signal output end NEXT.Second display control mould
Block 220 responds the low level of junior's shift signal, and by the low level output, i.e. the second display control module 220 shifts junior
Signal directly exports, to export low level in scanning signal output end.
In the 14th stage T14, enabling signal is low level, and the first clock signal is high level.Latch module 110 and
The working condition and output signal of two display control modules 220 are identical as the tenth two-stage T12, defeated in scanning signal output end
Low level out.
In the 15th stage T15, enabling signal is low level, and the first clock signal is low level.Latch module 110 and
The working condition and output signal of two display control modules 220 are identical as the 13rd stage T13, defeated in scanning signal output end
Low level out.
In the 16th stage T16, enabling signal is high level, and the first clock signal is high level.Latch module 110 responds
The high level of first clock signal exports enabling signal to junior shift signal output end NEXT, i.e., in junior's shift signal
Junior's shift signal of output end NEXT output is also high level.Second display control module 220 responds junior's shift signal
High level, by the high level output, i.e. the second display control module 220 directly exports junior's shift signal, thus scanning
Signal output end exports high level.
In the 17th stage T17, enabling signal is high level, and the first clock signal is low level.Latch module 110 latches
The enabling signal of 16th stage T16 continues to output high level in junior shift signal output end NEXT.Second display control mould
Block 220 responds the high level of junior's shift signal, and by the high level output, i.e. the second display control module 220 shifts junior
Signal directly exports, to export high level in scanning signal output end.
And so on, after the 17th stage T17, enabling signal remains high level, defeated in scanning signal output end
High level out.
Enabling signal is shifted and is exported by the scan drive circuit as a result, is realized and is rolled clock signal output, and rolls timing
Signal is identical as the pulse width of enabling signal, the influence of pulse width not subject clock signal.The scanning signal is swept at different levels
The scanning signal output end for retouching driving circuit transmits step by step, and driving display panel realizes scroll display mode.When exporting rolling
Under the display pattern of sequential signal, the output pulse of odd level scan drive circuit is corresponding with the first clock signal, even level scanning
It is corresponding with the first clock signal that driving circuit exports pulse.Each scanning drive signal hands on step by step.
Figure 11 is the driver' s timing schematic diagram of another scan drive circuit provided in an embodiment of the present invention.Referring to Figure 11,
Illustratively, the driver' s timing of the scan drive circuit includes the 18th stage T18, the 19th stage T19, the 20th stage
T20, the 21st stage T21 and the 20th two-stage T22.
In the 18th stage T18, enabling signal is low level, and the first clock signal is low level.Latch module 110 latches
Enabling signal on last stage continues to output high level in junior shift signal output end NEXT.Second display control module 220
The high level of junior's shift signal is responded, by the high level output, i.e. the second display control module 220 is straight by junior's shift signal
Output is connect, to export high level in scanning signal output end.
In the 19th stage T19, enabling signal is low level, and the first clock signal is high level.Latch module 110 responds
The high level of first clock signal, enabling signal is exported, and shifts letter in the junior of junior shift signal output end NEXT output
It number is also high level.Second display control module 220 responds the high level of junior's shift signal, by the high level output, i.e., the
Two display control modules 220 directly export junior's shift signal, to export high level in scanning signal output end.
In the 20th stage T20, enabling signal is low level.If the first clock signal is low level, latch module 110 is locked
Enabling signal on last stage is deposited, continues to output low level in junior shift signal output end NEXT.Second display control module
The low level of 220 response junior's shift signals, by the low level output, i.e. the second display control module 220, which shifts junior, to be believed
It number directly exports, to export low level in scanning signal output end.If the first clock signal is high level, latch module 110
The high level for responding the first clock signal, enabling signal is exported, and is moved in the junior of junior shift signal output end NEXT output
Position signal is also low level.Second display control module 220 responds the low level of junior's shift signal, by the low level output,
I.e. the second display control module 220 directly exports junior's shift signal, to export low level in scanning signal output end.
In the 21st stage T21, enabling signal is high level, and the first clock signal is high level.110 sound of latch module
Enabling signal is exported to junior shift signal output end NEXT, i.e., shifts and believe in junior by the high level for answering the first clock signal
Junior's shift signal of number output end NEXT output is also high level.Second display control module 220 responds junior's shift signal
High level, by the high level output, i.e. the second display control module 220 directly exports junior's shift signal, thus sweeping
Retouch signal output end output high level.
In the 20th two-stage T22, enabling signal is high level, and the first clock signal is low level.Latch module 110 is locked
The enabling signal for depositing the 21st stage T21 continues to output high level in junior shift signal output end NEXT.Second display control
Molding block 220 responds the high level of junior's shift signal, and by the high level output, i.e. the second display control module 220 is by junior
Shift signal directly exports, to export high level in scanning signal output end.
And so on, after the 20th two-stage T22, enabling signal remains high level, in scanning signal output end
Export high level.
Enabling signal is shifted and is exported by the scan drive circuit as a result, is realized and is rolled clock signal output of blacking, and rolls
Clock signal of blacking is identical as the pulse width of enabling signal, the influence of pulse width not subject clock signal.The scanning signal
It is transmitted step by step in the scanning signal output end of scan drive circuits at different levels, driving display panel, which is realized, rolls display pattern of blacking.
Unlike rolling mode, control of the clock signal by the first clock signal for mode output of blacking, and the first clock are rolled
The frequency of signal is higher than the frequency of the first clock signal.Under the display pattern that output rolls clock signal of blacking, odd level is swept
The output pulse for retouching driving circuit is corresponding with the first clock signal, and even level scan drive circuit exports pulse and the first clock is believed
Number correspondence.Each scanning drive signal hands on step by step.Since the clock frequency of the first clock signal is greater than the first clock signal
Clock frequency, therefore, the interval of adjacent two-stage scan driving signal output is smaller, and the time of entire display panel is completed in scanning
It is shorter.
On the basis of the various embodiments described above, optionally, rolling blacks display pattern in a frame, picture in 80% time
Plain circuit write data signal, completes the display of all row pixels in 20% time, i.e. each image is all complete independent aobvious
Show, without overlapping between picture and picture, makes to be displayed without ghost.
Figure 12 is the driver' s timing schematic diagram of another scan drive circuit provided in an embodiment of the present invention.Referring to Figure 12,
Illustratively, the driver' s timing of the scan drive circuit includes the 23rd stage T23, the 24th stage T24 and the 20th
Five stage T25.
In the 23rd stage T23, enabling signal is low level, and the first clock signal is high level.110 sound of latch module
The high level for answering the first clock signal, enabling signal is exported, in junior's displacement of junior shift signal output end NEXT output
Signal is also low level.Second display control module 220 responds the low level of junior's shift signal, by the low level output, i.e.,
Second display control module 220 directly exports junior's shift signal, to export low level in scanning signal output end.
In the 24th stage T24, the first clock signal is low level.Latch module 110 latches starting on last stage
Signal continues to output low level in junior shift signal output end NEXT.Second display control module 220 responds junior's displacement letter
Number low level, by the low level output, i.e. the second display control module 220 directly exports junior's shift signal, thus
Scanning signal output end exports low level.
In the 25th stage T25, enabling signal is high level.If the first clock signal is high level, latch module 110
The high level for responding the first clock signal, enabling signal is exported, and is moved in the junior of junior shift signal output end NEXT output
Position signal is also high level.Second display control module 220 responds the high level of junior's shift signal, by the high level output,
I.e. the second display control module 220 directly exports junior's shift signal, to export high level in scanning signal output end.If
First clock signal is low level, and latch module 110 latches enabling signal on last stage, in junior's shift signal output end
NEXT continues to output high level.Second display control module 220 responds the high level of junior's shift signal, and the high level is defeated
Out, i.e., the second display control module 220 directly exports junior's shift signal, to export high electricity in scanning signal output end
It is flat.
And so on, after the 25th stage T25, enabling signal repeats output low level pulse, the turntable driving
Circuit repeats the working condition of the 23rd stage T25 of stage T23~the 25th.
Enabling signal is shifted and is exported by the scan drive circuit as a result, realizes bright clock signal output, and bright timing
The influence of the pulse width of signal not subject clock signal.If the scanning signal is each by the scan drive circuit cascade connection
The scanning signal output end of grade scan drive circuit transmits step by step, and driving display panel realizes bright display pattern.With rolling mould
Formula and rolling are blacked unlike mode, and the clock signal of bright mode output has multiple low level pulses to export in a frame.
Under the display pattern for exporting bright clock signal, the output pulse and the first clock signal pair of odd level scan drive circuit
It answers, it is corresponding with the first clock signal that even level scan drive circuit exports pulse.Each scanning drive signal hands on step by step.It is bright
Bright mode can be displayed contrast effectively in adjusting display brightness, increase.
Figure 13 is the driver' s timing schematic diagram of another scan drive circuit provided in an embodiment of the present invention.Referring to Figure 13,
Illustratively, first higher level's signal input part STV and second higher level's signal input part STVR is low level always, therefore when first
The second latch and control module 200 can be written in the low level of second higher level's signal input part STVR by clock signal input part CLKR,
So that the output of scanning signal output end is in low level state, and this state can be always maintained at down.The scanning is driven as a result,
Enabling signal is shifted and is exported by dynamic circuit, realizes the output of aging clock signal, and the pulse width of aging clock signal not by when
The influence of clock signal.If by the scan drive circuit cascade connection, scanning of the scanning signal in scan drive circuits at different levels
Signal output end transmits step by step, and driving display panel realizes aging display pattern.
The embodiment of the present invention also achieves typical display pattern, whole display mould on the basis of switching resolution ratio display
Formula, scroll display mode, rolling are blacked the collection of display pattern, bright this six kinds of display patterns of display pattern and aging display pattern
At to be conducive to be promoted the display quality of display panel.
With continued reference to Fig. 6, on the basis of the various embodiments described above, optionally, which further includes forward scan control
Signal wire 61 and reverse scan control signal wire 62 processed.Scan drive circuit include forward scan control signal input U2D and
Reverse scan control signal input D2U, forward scan control signal input U2D are electrically connected with forward scan control signal wire 61
It connects, reverse scan control signal input D2U is electrically connected with reverse scan control signal wire 62.The embodiment of the present invention is arranged in this way
The forward scan and reverse scan for realizing display panel, further enrich the display pattern of display panel.
Figure 14 is the structural schematic diagram of another scan drive circuit provided in an embodiment of the present invention.Referring to Figure 14, upper
On the basis of stating each embodiment, optionally, scan drive circuit 20 further includes voltage domain expansion module 410.Voltage domain expanded mode
Block 410 is connected between display switching module 310 and scanning signal output end OUT, and voltage domain expansion module 410 is aobvious for responding
The output for showing switching module 310, the current potential that display switching module 310 is exported is by between the first current potential V1 and the second current potential V2
Switching, is extended to and switches between third current potential V3 and the 4th current potential V4;Wherein, | V2-V1 | < | V4-V3 |.
Illustratively, the device in latch module 110, the first display control module 210 and the second display control module 220
Using 8V device, the first clock signal input terminal CLK, second clock signal input part XCLK and higher level's shift signal input terminal
The voltage domain of the signal of STV input is 0~5V.Show that the first current potential that switching module 310 exports is 0V, the second current potential is 5V.
I.e. when the signal for showing that switching module 310 exports is low level, current potential 0V;When the letter that display switching module 310 exports
Number be high level when, current potential 5V.The third current potential that voltage domain expansion module 410 exports is -5V, and the 4th current potential is 5V.I.e.
When the signal that voltage domain expansion module 410 exports is low level, current potential is -5V;When the letter that voltage domain expansion module 410 exports
Number be high potential when, current potential 5V.Voltage domain expansion module 410 is expanded the voltage domain of scanning signal output end OUT by 0~5V
Exhibition is -5V~5V.
Voltage domain expanded mode is arranged in the embodiment of the present invention between display switching module 310 and scanning signal output end OUT
Block 410 realizes the voltage domain extension of scanning signal output end OUT in the case where applied signal voltage domain is constant.Wherein,
The voltage domain of input signal is constant to be conducive to maintain lower circuit power consumption.The extension of output voltage domain is conducive to lower current potential
Pixel circuit is resetted, better reduction, to be conducive to promote display effect.
With continued reference to Figure 14, on the basis of the various embodiments described above, optionally, voltage domain expansion module 410 includes current potential
Conversion module 411 and current potential selecting module 412.Current potential conversion module 411 is electrically connected with display switching module 310, current potential conversion
Module 411 is used to respond the current potential of the output of display switching module 310, will show that the current potential of the output of switching module 310 carries out
Translation, and export;The current potential that current potential conversion module 411 exports switches between the first current potential V1 and third current potential V3.Current potential choosing
It selects module 412 to be electrically connected with display switching module 310, current potential conversion module 411 and scanning signal output end OUT respectively, current potential
The current potential that selecting module 412 is used to respond display switching module 310 and current potential conversion module 411 exports, will show switching module
Second current potential of 310 outputs is exported to scanning signal output end OUT, or the third current potential that current potential conversion module 411 is exported
It exports to scanning signal output end OUT.
Illustratively, the voltage domain that display switching module 310 exports is 0~5V, the voltage that current potential conversion module 411 exports
Domain is -5~0V.In the display output 0V, 411 output -5V of current potential conversion module of switching module 310, current potential selecting module 412
By -5V voltage output;5V is exported in display switching module 310, when current potential conversion module 411 exports 0V, current potential selecting module 412
By 5V voltage output, it is thus achieved that voltage domain is -5V~5V.
With continued reference to Figure 14, on the basis of the various embodiments described above, optionally, current potential conversion module 411 includes second anti-
The input terminal of phase device 411A and level translator 411B, the second phase inverter 411A are electrically connected with display switching module 310, and second is anti-
The input terminal electrical connection of the output end and level translator 411B of phase device 411A.The output end and current potential of level translator 411B selects
Select the electrical connection of module 412.Wherein, the second phase inverter 411A is used to show that the current potential that switching module 310 exports to carry out reverse phase, electricity
The signal that flat turn parallel operation 411B is used to export the second phase inverter carries out the translation of current potential.
With continued reference to Figure 14, on the basis of the various embodiments described above, optionally, current potential selecting module 412 includes buffer,
First power input of buffer is electrically connected with the first current potential output module, and the second source input terminal and current potential of buffer turn
It changes the mold block 411 to be electrically connected, the output end of the input end grounding of buffer, buffer is electrically connected with scanning signal output end OUT.?
Show that switching module 310 exports 0V, when 411 output -5V of current potential conversion module, buffer is by -5V voltage output;Switch in display
Module 310 exports 5V, when current potential conversion module 411 exports 0V, buffer by 5V voltage output, it is thus achieved that voltage domain be-
5V~5V.
With continued reference to Figure 14, on the basis of the various embodiments described above, optionally, scan drive circuit 20 further includes aging control
Signal input part XAG, the second electric potential signal input terminal VGH1, third transistor M3 and the 4th transistor M4 processed.
The control terminal of third transistor M3 and the control terminal of the 4th transistor M4 are electric with Aging control signal input part XAG
Connection, third transistor M3 are connected between the input terminal of buffer and ground;The first end and the second current potential of 4th transistor M4
Signal input part VGH1 electrical connection, the second end of the 4th transistor M4 are electrically connected with the input terminal of buffer.
Wherein, when the signal of third transistor M4 and the 4th transistor M4 response Aging control signal input part XAG, conducting
Second electric potential signal input terminal VGH1 and when current potential selecting module 640, the output current potential of current potential selecting module 412 drags down, and realizes
The output of aging clock signal.
With continued reference to Figure 14, on the basis of the various embodiments described above, optionally, display panel further includes second resolution control
Signal wire processed.Scan drive circuit 20 further include: first resolution control signal input XENBV, the input of the first electric potential signal
Hold GND and resolution ratio control module 510;First resolution control signal input XENBV and second resolution control signal wire
Electrical connection.
Resolution ratio control module 510 respectively with first resolution control signal input XENBV, GND and scanning signal
Output end GND electrical connection, resolution ratio control module 510 are used to respond first resolution control signal input XENBV input
Resolution-control signal, by the signal conduction of ground GND to scanning signal output end OUT.
Illustratively, which is emission control circuit (EMIT circuit), emission control circuit control
The turn-on and turn-off of pixel circuit and luminescent device.For example, when emission control circuit export high level when, pixel circuit and shine
Device disconnects.When first resolution controls signal for the conducting of resolution ratio control module 510, by the high level of reversed earth signal
It is transmitted to scanning signal output end OUT, the pixel circuit being electrically connected with the scan drive circuit and luminescent device disconnect, photophore
Part does not shine.In a frame, first resolution control signal can convert between high level and low level, in first resolution
When controlling the signal control conducting of resolution ratio control module 510, corresponding pixel does not show picture;Signal is controlled in first resolution
When controlling the shutdown of resolution ratio control module 510, corresponding pixel shows picture.I.e. the embodiment of the present invention, which can choose, starts to show
Position and terminate the position of display and enable to display panel output different to realize the function of display area control
The picture of resolution ratio.The embodiment of the present invention is unlike the resolution ratio handover scheme with tap function, in practical applications,
The position for starting display cannot be accurately controlled to first resolution control signal input XENBV input signal and terminates display
Position, but the control signal of fine tuning display position may be implemented in the embodiment.
With continued reference to Figure 14, on the basis of the various embodiments described above, optionally, scan drive circuit 20 further includes second point
Resolution control signal input ENBV;The second resolution of second resolution control signal input ENBV controls signal and first
The first resolution control signal of resolution-control signal input terminal XENBV is opposite.
Resolution ratio control module 510 includes: the first transistor M1 and the first phase inverter 511.The control of the first transistor M1
End is electrically connected with first resolution control signal input XENBV, and the first end of the first transistor M1 and the first electric potential signal are defeated
Enter end electrical connection, the second end of the first transistor M1 is electrically connected with scanning signal output end.First power supply of the first phase inverter 511
Input terminal is electrically connected with first resolution control signal input XENBV, the second source input terminal of the first phase inverter 511 and
The input terminal of two resolution-control signal input terminal ENBV electrical connection, the first phase inverter 511 is electrically connected with display switching module, the
The output end of one phase inverter 511 is electrically connected with scanning signal output end.
Illustratively, when first resolution control signal is low level, and second resolution control signal is high level, the
One phase inverter 511 disconnects, so that output par, c and earlier logic circuit disconnect, output is pulled to high electricity by the first transistor M1
It is flat.
With continued reference to Figure 14, on the basis of the various embodiments described above, optionally, the first transistor M1 can also realize reset
Function.
It should be noted that the embodiment of the present invention, which schematically illustrates the first transistor M1, can also realize reset function
Can, not limitation of the invention.In other embodiments, the transistor with reset function can also be set as needed,
It can according to need and set in practical applications.Two of them is illustrated below, but not as to limit of the invention
It is fixed.
Figure 15 is the structural schematic diagram of another scan drive circuit provided in an embodiment of the present invention.Referring to Figure 15, upper
On the basis of stating each embodiment, optionally, scan drive circuit 20 further includes reseting controling signal input terminal RST, the second current potential
Signal input part VGH1 and second transistor M2.The control terminal of second transistor M2 is electrically connected with reseting controling signal input terminal RST
Connect, the first end of second transistor M2 is electrically connected with the second electric potential signal input terminal VGH1, the second end of second transistor M2 with
The electrical connection of scanning signal output end.The embodiment of the present invention is in this way, may be implemented to answer scanning signal output end OUT signal
Position.
Figure 16 is the structural schematic diagram of another scan drive circuit provided in an embodiment of the present invention.Referring to Figure 16, upper
On the basis of stating each embodiment, optionally, scan drive circuit 20 further includes reseting controling signal input terminal RST and the second crystal
Pipe M2.The control terminal of second transistor M2 is electrically connected with reseting controling signal input terminal RST;The first end of second transistor M2 with
The first end of the first transistor M1 is electrically connected, and the second end of second transistor M2 is electrically connected with the second end of the first transistor M1.
Setting of embodiment of the present invention second transistor M2 and the first transistor M1 is connected in parallel, and avoids second transistor M2
It is connect with the second electric potential signal input terminal VGH1, thus the problem for needing the area that second transistor M2 is arranged larger, this hair
The size of bright embodiment transistor greatly reduces, and can reduce the area of LAYOUT, and reduces the quantity of signal wire.
With continued reference to Figure 16, on the basis of the various embodiments described above, optionally, latch module 110 includes: the 4th phase inverter
111, the 5th phase inverter 112, hex inverter 113 and the 7th phase inverter 114.The input terminal of 4th phase inverter 111 and when first
The electrical connection of clock signal input part.The output end of the first power input and the 4th phase inverter 111 of 5th phase inverter 112 is electrically connected
Connect, the second source input terminal of the 5th phase inverter 112 is electrically connected with the first clock signal input terminal, the 5th phase inverter 112 it is defeated
Enter end to be electrically connected with higher level's shift signal input terminal.The first power input and higher level's shift signal of hex inverter 113 are defeated
Enter end electrical connection, the output end electrical connection of the 4th phase inverter 111 of second source input terminal of hex inverter 113, the 6th reverse phase
The input terminal of device 113 is electrically connected with junior's shift signal output end, the output end of hex inverter 113 and the 5th phase inverter 112
Output end electrical connection.The input terminal of 7th phase inverter 114 is electrically connected with the output end of hex inverter 113, the 7th phase inverter 114
Output end be electrically connected with junior shift signal output end.
It should be noted that can according to need the quantity of setting phase inverter and buffer, in practical applications to be promoted
The load capacity of scan drive circuit.
The embodiment of the invention also provides a kind of driving methods of display panel.The driving method of the display panel can fit
For display panel provided by any embodiment of the invention.Figure 17 is a kind of drive of display panel provided in an embodiment of the present invention
The flow diagram of dynamic method.Referring to Figure 17, the driving method of the display panel the following steps are included:
S110, resolution-control signal is sent to resolution-control signal line, sends the first electricity to the first electric potential signal line
Position signal;
S120, according to the signal of resolution-control signal line, control resolution ratio control module be connected corresponding input terminal and
Output end, drives corresponding scan drive circuit successively to shift output scanning signal, and display panel is shown as the first display resolution
Rate;
Alternatively, it is defeated that the first electric potential signal is connected in control resolution ratio control module according to the signal of resolution-control signal line
Enter end and output end, corresponding scan drive circuit is driven to stop working, display panel is shown as the second display resolution.
The embodiment of the present invention is realized by control resolution ratio control module drives all or part of scan drive circuit defeated
The function of scanning signal out.Therefore, the embodiment of the present invention can be compatible with a variety of display resolutions.And the embodiment of the present invention can
With the position of the scan drive circuit of flexible setting resolution ratio control module as needed electrical connection, it is equivalent in display panel
It joined tap function.In addition, the embodiment of the present invention is moved by the higher level of the first electric potential signal input terminal and scan drive circuit
When the signal input part conducting of position, it is equivalent to scan drive circuit and has input a fixed electric potential signal, scan drive circuit
Internal components do not work.Therefore, the embodiment of the present invention can not only reduce the power consumption of pixel when reducing display resolution,
The power consumption of scan drive circuit can also be reduced.
Note that the above is only a better embodiment of the present invention and the applied technical principle.It will be appreciated by those skilled in the art that
The invention is not limited to the specific embodiments described herein, be able to carry out for a person skilled in the art it is various it is apparent variation,
It readjusts and substitutes without departing from protection scope of the present invention.Therefore, although being carried out by above embodiments to the present invention
It is described in further detail, but the present invention is not limited to the above embodiments only, without departing from the inventive concept, also
It may include more other equivalent embodiments, and the scope of the invention is determined by the scope of the appended claims.