CN110196705B - Method, device and equipment for screening output resolution of splicing processor - Google Patents

Method, device and equipment for screening output resolution of splicing processor Download PDF

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CN110196705B
CN110196705B CN201910477535.0A CN201910477535A CN110196705B CN 110196705 B CN110196705 B CN 110196705B CN 201910477535 A CN201910477535 A CN 201910477535A CN 110196705 B CN110196705 B CN 110196705B
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resolution
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screening
processor
splicing
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CN110196705A (en
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黄早珊
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Vtron Group Co Ltd
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    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • G06F3/1446Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display display composed of modules, e.g. video walls

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Abstract

The application discloses a method for screening output resolution of a splicing processor, which comprises the following steps: s1, acquiring the transverse resolution M and the longitudinal resolution N of the LED display unit, the maximum bandwidth S of an output head, the maximum transverse resolution M and the maximum longitudinal resolution N which can be output by the splicing processor, which are set by a user; s2, initializing i to 1; s3, if N x i is less than or equal to N, entering S4, otherwise, ending; s4, calculating the maximum column number j of the spliced wall supportable by the splicing processor corresponding to the row number i of the spliced wall supported by the splicing processor according to a preset formula; s5, if the calculated j is not equal to 0, entering S6, otherwise, ending; s6, screening from the resolution ratio corresponding to the splicing wall of the i row and the j column and outputting the output resolution ratio corresponding to the current i of the splicing processor according to the preset screening condition; s7, i ═ i +1, return to said S3; the method solves the technical problems that the existing method for selecting one from one depends on personal experience of technicians and has high uncertainty.

Description

Method, device and equipment for screening output resolution of splicing processor
Technical Field
The application relates to the technical field of splicing walls, in particular to a method, a device and equipment for screening output resolution of a splicing processor.
Background
The spliced wall is an ultra-large screen formed by splicing a plurality of LED display units, and the signal processing of the spliced wall generally comprises the following processes: the splicing processor outputs signals to the LED splicing wall controller through the output head, and the LED splicing wall controller processes the signals and outputs the processed signals to each LED display unit of the splicing wall.
For development and maintenance, the output resolution of each output head is usually set to be the same as the output resolution of the stitching processor. The output resolution of the output header needs to be limited by the bandwidth, that is, the output header needs to limit the amount of data transmitted by the output header below the maximum bandwidth when outputting a certain resolution, and accordingly, the splicing processor needs to consider the maximum bandwidth of the output header when selecting the output resolution. In addition, since the tiled wall is formed by tiling an integer number of LED display units, the output resolution of the tiled processor needs to be an integer multiple of the resolution of the LED display units during the setting.
In the existing method, when selecting the output resolution of the splicing processor, a technician often needs to select an output resolution that is considered suitable by the technician, calculate the transmission data volume under the output resolution, and determine whether the transmission data volume exceeds the maximum bandwidth. If the transmission data volume corresponding to the selected output resolution exceeds the maximum bandwidth, one output resolution needs to be selected again, and whether the transmission data volume meets the limit of the maximum bandwidth is judged again through calculation. The method for selecting one from the above methods depends on personal experience of technicians, and has high uncertainty, so that the selection efficiency of the output resolution of the splicing processor is low.
Disclosure of Invention
The application provides a method, a device and equipment for screening output resolution of a splicing processor, and solves the technical problem that the selection efficiency of the output resolution of the splicing processor is low due to the fact that the existing method for selecting one from one to calculate one depends on personal experience of technicians and is high in uncertainty.
In view of the above, a first aspect of the present application provides a method for output resolution screening of a stitching processor, including:
s1, acquiring the transverse resolution M and the longitudinal resolution N of the LED display unit, the maximum bandwidth S of an output head, the maximum transverse resolution M and the maximum longitudinal resolution N which can be output by the splicing processor, which are set by a user;
s2, initializing i to 1;
s3, if N x i is less than or equal to N, entering S4, otherwise, ending;
s4, calculating the maximum column number j of the spliced wall supportable by the splicing processor corresponding to the row number i of the spliced wall supported by the splicing processor according to a preset formula;
the preset formula is as follows:
Figure GDA0003113190450000021
wherein S is the maximum bandwidth of the output head, m is the transverse resolution of the LED display unit, and n is the longitudinal resolution of the LED display unit;
s5, if the calculated j is not equal to 0, entering S6, otherwise, ending;
s6, screening from the resolution ratio corresponding to the splicing wall of the i row and the j column and outputting the output resolution ratio corresponding to the current i of the splicing processor according to the preset screening condition;
and S7, i is i +1, and the step returns to the S3.
Preferably, the S6 specifically includes:
selecting minimum value M between M and M x j0
Screening and outputting the output resolution of the splicing processor corresponding to the current i from the first resolution and the second resolution; wherein the transverse resolution of the first resolution is j, and the longitudinal resolution is n x i; the second resolution has a lateral resolution of M0The longitudinal resolution is n x i.
Preferably, the filtering and outputting the output resolution of the stitching processor corresponding to the current i from the first resolution to the second resolution specifically includes:
screening out the resolution with the transverse resolution being integral multiple of the m from the first resolution and the second resolution as the output resolution corresponding to the current i of the splicing processor;
and outputting the screened output resolution.
Preferably, the output header is embodied as a DVI output header.
Preferably, the resolution corresponds to a screen refresh rate of 60 hz.
The second aspect of the present application provides a device for screening output resolution of a splicing processor, comprising:
the acquisition unit is used for acquiring the transverse resolution M and the longitudinal resolution N of the LED display unit, the maximum bandwidth S of the output head, the maximum transverse resolution M and the maximum longitudinal resolution N which can be output by the splicing processor, which are set by a user;
an initialization unit for initializing i ═ 1;
a first judging unit, which is used for starting the calculating unit if N x i is less than or equal to N, otherwise, ending;
the calculation unit is used for calculating the maximum column number j of the spliced wall which can be supported by the splicing processor and corresponds to the row number i of the spliced wall supported by the splicing processor according to a preset formula;
the preset formula is as follows:
Figure GDA0003113190450000031
wherein S is the maximum bandwidth of the output head, m is the transverse resolution of the LED display unit, and n is the longitudinal resolution of the LED display unit;
a second judgment unit, configured to start the screening unit if the calculated j is not equal to 0, and otherwise, end;
the screening unit is used for screening and outputting the output resolution ratio of the splicing processor corresponding to the current i from the resolution ratio below the resolution ratio corresponding to the splicing wall of the i row and the j column according to the preset screening condition;
and the traversing unit is used for returning to start the first judging unit when i is i + 1.
Preferably, the screening unit specifically includes:
a selecting subunit for selecting a minimum value M between M and M x j0
The screening output subunit is used for screening the first resolution and the second resolution and outputting the output resolution corresponding to the current i of the splicing processor; wherein the transverse resolution of the first resolution is j, and the longitudinal resolution is n x i; the second resolution has a lateral resolution of M0The longitudinal resolution is n x i.
Preferably, the screening output subunit is specifically for
Screening out the resolution with the transverse resolution being integral multiple of the m from the first resolution and the second resolution as the output resolution corresponding to the current i of the splicing processor;
and outputting the screened output resolution.
A third aspect of the present application provides a stitching processor output resolution screening apparatus, the apparatus comprising a processor and a memory:
the memory is used for storing program codes and transmitting the program codes to the processor;
the processor is configured to execute any one of the stitching processor output resolution screening methods provided in the first aspect according to instructions in the program code.
A fourth aspect of the present application provides a computer-readable storage medium for storing a program code for executing the stitching processor output resolution screening method according to any one of the first aspect.
According to the technical scheme, the method has the following advantages:
according to the method, the column number of the splicing walls corresponding to different line numbers and the splicing walls which can be supported by the splicing processor under the condition that the transmission data volume does not exceed the maximum bandwidth S of an output head can be calculated through a preset formula, namely the maximum column number of the splicing walls with the fixed line number which can be supported by the splicing processor is calculated through the line number of the fixed splicing walls under the condition that the bandwidth is met. For example, for a spliced wall with 1 line number, the maximum column number allowed by the spliced wall can be calculated by a preset formula under the condition that the splicing processor can support if the line number of the spliced wall is limited to 1 line, so that the maximum size of the spliced wall with 1 line that the splicing processor can support is determined, and thus the maximum output resolution of the spliced wall with 1 line that the splicing processor can support can be determined, and the transmission data amount corresponding to the maximum output resolution does not exceed the maximum bandwidth of the output header. Similarly, if the number of lines of the mosaic wall is limited to 2 lines, the maximum output resolution of the 2 lines of the mosaic wall that can be supported by the mosaic processor can also be determined. By executing the method for multiple times, the spliced walls corresponding to different line numbers can be determined, the maximum output resolution which can be output by the splicing processor can be determined, at the moment, the screened output resolution does not exceed the maximum bandwidth corresponding to the transmission data volume as long as screening is carried out under the maximum resolution, and therefore the efficiency is greatly improved in the mode of directly selecting from available output resolutions compared with the mode of selecting one for one.
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FIG. 1 is a flow chart of a stitching processor output resolution screening method in a first embodiment provided herein;
FIG. 2 is a flow chart of a stitching processor output resolution screening method in a second embodiment provided herein;
fig. 3 is a schematic structural diagram of an output resolution screening apparatus of a stitching processor according to the present application.
Detailed Description
In order to make the technical solutions of the present application better understood, the technical solutions of the present application will be clearly and completely described below with reference to the drawings in the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The signal control system of the spliced wall generally comprises a spliced processor, an LED spliced wall controller and the spliced wall formed by combining various LED display units. When signal processing is carried out, the splicing processor outputs signals to the LED splicing wall controller through the output head, and the LED splicing wall controller processes the signals and outputs the processed signals to each LED display unit of the splicing wall.
For development and maintenance, the output resolution of each output head is usually set to be the same as the output resolution of the stitching processor. Each output head is responsible for a part (can be a block) of LED display units. For example, if the resolution of one LED display unit is 640 × 360, and if the output resolution of the stitching processor is also 640 × 360, for a 2-row 2-column or 2 × 2 stitching wall, a total of 4 output heads need to be provided, and one output head is output to one LED display unit, because the output resolution of each output head is the same as that of the stitching processor, and is 640 × 360; however, if the output resolution of the stitching processor is selected to be 640 × 720, similarly, for the 2 × 2 stitching wall, the number of output heads can be reduced by half, and only 2 output heads need to be provided, and 1 output head corresponds to two LED display units in one row.
Therefore, the output resolution of the stitching processor affects the required number of output heads to a certain extent, and thus the equipment cost.
The output resolution of the output header needs to be limited by the bandwidth, that is, the output header needs to limit the amount of data transmitted by the output header below the maximum bandwidth when outputting a certain resolution, and accordingly, the splicing processor needs to consider the maximum bandwidth of the output header when selecting the output resolution. In addition, since the tiled wall is formed by tiling an integer number of LED display units, the output resolution of the tiled processor needs to be an integer multiple of the resolution of the LED display units during the setting.
The application provides a method for screening output resolution of a splicing processor, and solves the technical problem that the selection efficiency of the output resolution of the splicing processor is low due to the fact that the existing method for selecting one from one to calculate depends on personal experience of technicians and is high in uncertainty.
Referring to fig. 1, fig. 1 is a flowchart of a stitching processor output resolution screening method in a first embodiment provided in the present application, where the method includes:
step 101, acquiring a transverse resolution M and a longitudinal resolution N of an LED display unit, a maximum bandwidth S of an output head, a maximum transverse resolution M and a maximum longitudinal resolution N which can be output by a splicing processor, wherein the transverse resolution M and the longitudinal resolution N are set by a user.
The user can set the values of M and N according to the resolution of the actual LED display unit, including the transverse resolution and the longitudinal resolution, and similarly, set the maximum bandwidth S G/bit of the output head, and set the maximum transverse resolution M and the maximum longitudinal resolution N which can be output by the splicing processor.
Since the output capability of the output head corresponding to the DVI is approximately at a level of 1080P, M may be 1920 and N may be 1080. However, the values of M and N are not set to exceed 1920, because the resolution in one direction is too large when the maximum bandwidth is fixed, which results in a very small resolution in the other direction, and the resolution of the output is not significant.
Step 102, initializing i to 1.
And 103, if N x i is less than or equal to N, entering a step 104, and otherwise, ending.
If the calculation N x i is greater than N, the limit of the set maximum longitudinal resolution N that can be output by the splicing processor is exceeded, and at this time, the splicing processor may be considered not to support the spliced wall with the number of rows i.
And 104, calculating the maximum column number j of the spliced wall supportable by the splicing processor corresponding to the row number i of the spliced wall supported by the splicing processor according to a preset formula.
The preset formula is as follows:
Figure GDA0003113190450000061
wherein, S is the maximum bandwidth of the output head, m is the lateral resolution in the resolution of the LED display unit, n is the longitudinal resolution in the resolution of the LED display unit, [ ] is the rounding symbol.
It should be noted that the preset formula is derived by considering both the maximum bandwidth limit of the output head and the condition that the output resolution is an integral multiple of the resolution of the LED display unit. By using the preset formula, the maximum resolution ratio which can be supported by the splicing processor and corresponds to the i-row splicing wall under the maximum bandwidth limit can be determined. For example, corresponding to i ═ 1, the maximum column number j of the mosaic wall supportable by the mosaic processor can be calculated by a preset formula, and then it can be determined that the resolution corresponding to the mosaic wall in i rows and j columns is the maximum resolution supportable by the mosaic processor under the maximum bandwidth limit, that is, the output resolution less than or equal to (i × n) × (j × m) all satisfy the maximum bandwidth limit.
And 105, if the calculated j is not equal to 0, entering the step 106, and if not, ending.
If the calculated j is not equal to 0, further screening can be performed; otherwise, i.e. calculated j is 0, the splicing processor may be considered not to support the splicing wall with the current i number of lines.
And 106, screening and outputting the output resolution ratio corresponding to the current i of the splicing processor from the resolution ratio corresponding to the splicing wall of the i row and the j column according to the preset screening condition.
The resolutions corresponding to the spliced walls in the i rows and the j columns, namely, (i × n) × (j × m), and the output resolutions screened below the output resolution of (i × n) × (j × m) all meet the maximum bandwidth limit. When the screening condition is set, the screening condition can be flexibly set according to actual requirements, and the screening condition is not specifically limited in the application.
Step 107, i is i +1, and the process returns to step 103.
In this embodiment, a method for screening output resolution of a splicing processor is provided, where columns of splicing walls corresponding to different numbers of lines and splicing walls that can be supported by the splicing processor can be calculated by using a preset formula under the condition that the transmission data size does not exceed the maximum bandwidth S of an output header, that is, the maximum columns of splicing walls with the fixed number of lines that can be supported by the splicing processor can be calculated by fixing the number of lines of the splicing walls under the condition that the bandwidth is satisfied. For example, for a spliced wall with 1 line number, the maximum column number allowed by the spliced wall can be calculated by a preset formula under the condition that the splicing processor can support if the line number of the spliced wall is limited to 1 line, so that the maximum size of the spliced wall with 1 line that the splicing processor can support is determined, and thus the maximum output resolution of the spliced wall with 1 line that the splicing processor can support can be determined, and the transmission data amount corresponding to the maximum output resolution does not exceed the maximum bandwidth of the output header. Similarly, if the number of lines of the mosaic wall is limited to 2 lines, the maximum output resolution of the 2 lines of the mosaic wall that can be supported by the mosaic processor can also be determined. By executing the method for multiple times, the spliced walls corresponding to different line numbers can be determined, the maximum output resolution which can be output by the splicing processor can be determined, at the moment, the screened output resolution does not exceed the maximum bandwidth corresponding to the transmission data volume as long as screening is carried out under the maximum resolution, and therefore the efficiency is greatly improved in the mode of directly selecting from available output resolutions compared with the mode of selecting one for one.
Referring now to fig. 2, fig. 2 is a flow chart of a stitching processor output resolution screening method according to a second embodiment of the present application, the method including:
step 201, acquiring a transverse resolution M and a longitudinal resolution N of the LED display unit, a maximum bandwidth S of the output head, a maximum transverse resolution M and a maximum longitudinal resolution N that can be output by the stitching processor, which are set by a user.
Step 202, initialize i equal to 1.
And step 203, if N x i is less than or equal to N, entering step 204, otherwise, ending.
And 204, calculating the maximum column number j of the spliced wall supportable by the splicing processor corresponding to the row number i of the spliced wall supported by the splicing processor according to a preset formula.
The preset formula is as follows:
Figure GDA0003113190450000081
wherein S is the maximum bandwidth of the output head, m is the transverse resolution of the LED display unit, and n is the longitudinal resolution of the LED display unit.
Step 205, if the calculated j is not equal to 0, go to step 206, otherwise, end.
The above steps can be referred to the description of the first embodiment provided in this application.
Step 206, selecting the minimum value M between M and M x j0
And step 207, screening out the resolution with the transverse resolution being the integral multiple of m from the first resolution and the second resolution as the output resolution corresponding to the current i of the splicing processor.
Wherein the transverse resolution of the first resolution is j, the longitudinal resolution is n × i, i.e. j (n × i), and the transverse resolution of the second resolution is M0With a longitudinal resolution of n x i, i.e. M0(n) i. At j (n) i @60Hz to M0Screening between (n x i) @60Hz and screening out transverse directionAnd taking the resolution ratio with the integral multiple of m as the output resolution ratio corresponding to the current i of the splicing processor. Wherein 60Hz is the screen refresh rate.
Step 206 and step 207 are specific methods for screening from the resolution below the resolution corresponding to the splicing wall in i rows and j columns provided in this embodiment, and by using the screening method, not only feasible but also more practical output resolution can be screened.
For convenience of understanding, reference may be made to a specific example of an application provided in the present embodiment.
In this application example, the resolution of the LED display unit may be set to 640 × 360@60Hz, that is, the horizontal resolution M of the LED display unit is 640, the vertical resolution N is 360, the maximum bandwidth S of the output head is set to 3.8G/bit, and the maximum horizontal resolution M that can be output by the stitching processor is set to 1920 and the maximum vertical resolution N is set to 1920.
Through the preset formula, the method has the advantages that,
Figure GDA0003113190450000082
j corresponding to each i can be calculated.
1, i: calculating to obtain j 10, and selecting minimum value M between M1920 and M64000I.e. M01920, filtering between 10 × 360@60Hz and 1920 × 360@60Hz, and screening out resolutions having a lateral resolution that is an integer multiple of m comprises: 640X 360@60Hz, 1280X 360@60Hz, 1920X 360@60 Hz.
i is 2: calculating to obtain j-5, and selecting minimum value M between M1920 and M-j-5-6400I.e. M01920, filtering between 5 × 720@60Hz and 1920 × 720@60Hz, and screening out resolutions having a lateral resolution that is an integer multiple of m comprises: 640 × 720@60Hz, 1280 × 720@60Hz, 1920 × 720@60 Hz.
i is 3: calculating to obtain j-3, and selecting minimum value M between M1920 and M-j-3-6400I.e. M01920, filtering between 3 × 1080@60Hz and 1920 × 1080@60Hz, and screening out resolutions with a lateral resolution that is an integer multiple of m comprises: 640×1080@60Hz,1280×1080@60Hz,1920×1080@60Hz。
i is 4: calculating to obtain j-2, and selecting minimum value M between M1920 and M-j-2-6400I.e. M0-1280, wherein the screening is performed between 2 x 1440@60Hz and 1280 x 1440@60Hz, and wherein screening for resolutions with a lateral resolution that is an integer multiple of m comprises: 640X 1440@60Hz, 1280X 1440@60 Hz.
i is 5: calculating to obtain j-1, and selecting minimum value M between M1920 and M-j-1-6400I.e. M0Screening between 1 x 1800@60Hz to 640 x 1800@60Hz to screen out resolutions with lateral resolutions that are integer multiples of m comprises: 640X 1800@60 Hz.
i is 6: the calculation results in j being 1, but 360 x 6 is greater than 1920, i.e., N x i is greater than N, so the tiled processor is considered not to support tiled walls with 6 rows.
And step 208, outputting the screened output resolution.
The output can be performed in the form of a table, such as the output result of the above application example, which can be seen in table 1 below.
TABLE 1
Figure GDA0003113190450000091
Figure GDA0003113190450000101
Step 209, i is i +1, and the process returns to step 203.
In this embodiment, a method for screening output resolution of a splicing processor is provided, where columns of splicing walls corresponding to different numbers of lines and splicing walls that can be supported by the splicing processor can be calculated by using a preset formula under the condition that the transmission data size does not exceed the maximum bandwidth S of an output header, that is, the maximum columns of splicing walls with the fixed number of lines that can be supported by the splicing processor can be calculated by fixing the number of lines of the splicing walls under the condition that the bandwidth is satisfied. For example, for a spliced wall with 1 line number, the maximum column number allowed by the spliced wall can be calculated by a preset formula under the condition that the splicing processor can support if the line number of the spliced wall is limited to 1 line, so that the maximum size of the spliced wall with 1 line that the splicing processor can support is determined, and thus the maximum output resolution of the spliced wall with 1 line that the splicing processor can support can be determined, and the transmission data amount corresponding to the maximum output resolution does not exceed the maximum bandwidth of the output header. Similarly, if the number of lines of the mosaic wall is limited to 2 lines, the maximum output resolution of the 2 lines of the mosaic wall that can be supported by the mosaic processor can also be determined. By executing the method for multiple times, the spliced walls corresponding to different line numbers can be determined, the maximum output resolution which can be output by the splicing processor can be determined, at the moment, the screened output resolution does not exceed the maximum bandwidth corresponding to the transmission data volume as long as screening is carried out under the maximum resolution, and therefore the efficiency is greatly improved in the mode of directly selecting from available output resolutions compared with the mode of selecting one for one.
The present application further provides a splicing processor output resolution screening apparatus, which can refer to fig. 3, and the splicing processor output resolution screening apparatus provided in the present application has a schematic structural diagram, and fig. 3 includes:
an obtaining unit 301, configured to obtain a lateral resolution M and a longitudinal resolution N of the LED display unit, a maximum bandwidth S of the output head, a maximum lateral resolution M that can be output by the stitching processor, and a maximum longitudinal resolution N that are set by a user;
an initialization unit 302 for initializing i ═ 1;
a first determining unit 303, configured to start the calculating unit if N × i is less than or equal to N, or end if N × i is not greater than N;
a calculating unit 304, configured to calculate, according to a preset formula, a maximum column number j of the mosaic wall supportable by the mosaic processor, corresponding to the row number i of the mosaic wall supported by the mosaic processor;
the preset formula is as follows:
Figure GDA0003113190450000111
wherein S is the maximum bandwidth of the output head, m is the transverse resolution of the LED display unit, and n is the longitudinal resolution of the LED display unit;
a second determining unit 305, configured to start the screening unit if the calculated j is not equal to 0, otherwise, end;
the screening unit 306 is configured to screen and output an output resolution corresponding to the current i of the splicing processor from a resolution lower than a resolution corresponding to the splicing wall in the i row and the j column according to a preset screening condition;
and a traversing unit 307, configured to return to start the first determining unit when i is equal to i + 1.
Further, the screening unit specifically includes:
a selecting subunit 3061 for selecting the minimum value M between M and M x j0
A filtering output subunit 3062, configured to filter and output the output resolution corresponding to the current i of the stitching processor from between the first resolution and the second resolution; wherein the transverse resolution of the first resolution is j, and the longitudinal resolution is n x i; the second resolution has a lateral resolution of M0The longitudinal resolution is n x i.
Further, a screening output subunit 3062, particularly useful for
Screening out the resolution with the transverse resolution being integral multiple of the m from the first resolution and the second resolution as the output resolution corresponding to the current i of the splicing processor;
and outputting the screened output resolution.
The application provides a concatenation treater output resolution ratio sieving mechanism, through presetting the formula, can calculate satisfying under the maximum bandwidth S' S that the transmission data volume is no longer than the output head the condition, correspond the concatenation wall of different numbers of lines, the column number of the concatenation wall that the concatenation treater can support, through the number of lines of fixed concatenation wall promptly, calculate the biggest column number of the concatenation wall of this fixed number of lines that the concatenation treater can support satisfying the bandwidth condition. For example, for a spliced wall with 1 line number, the maximum column number allowed by the spliced wall can be calculated by a preset formula under the condition that the splicing processor can support if the line number of the spliced wall is limited to 1 line, so that the maximum size of the spliced wall with 1 line that the splicing processor can support is determined, and thus the maximum output resolution of the spliced wall with 1 line that the splicing processor can support can be determined, and the transmission data amount corresponding to the maximum output resolution does not exceed the maximum bandwidth of the output header. Similarly, if the number of lines of the mosaic wall is limited to 2 lines, the maximum output resolution of the 2 lines of the mosaic wall that can be supported by the mosaic processor can also be determined. By executing the method for multiple times, the spliced walls corresponding to different line numbers can be determined, the maximum output resolution which can be output by the splicing processor can be determined, at the moment, the screened output resolution does not exceed the maximum bandwidth corresponding to the transmission data volume as long as screening is carried out under the maximum resolution, and therefore the efficiency is greatly improved in the mode of directly selecting from available output resolutions compared with the mode of selecting one for one.
The application also provides a tiled processor output resolution screening apparatus, the apparatus comprising a processor and a memory:
the memory is used for storing program codes and transmitting the program codes to the processor;
the processor is configured to execute any one of the stitching processor output resolution screening methods provided herein according to instructions in the program code.
The present application further provides a computer-readable storage medium for storing a program code for executing any one of the embodiments of the stitching processor output resolution screening method described in the foregoing embodiments.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
The terms "first," "second," "third," "fourth," and the like in the description of the application and the above-described figures, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be understood that in the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" for describing an association relationship of associated objects, indicating that there may be three relationships, e.g., "a and/or B" may indicate: only A, only B and both A and B are present, wherein A and B may be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of single item(s) or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", wherein a, b, c may be single or plural.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed to by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.

Claims (10)

1. A method for screening output resolution of a stitching processor, comprising:
s1, acquiring the transverse resolution M and the longitudinal resolution N of the LED display unit, the maximum bandwidth S of an output head, the maximum transverse resolution M and the maximum longitudinal resolution N which can be output by the splicing processor, which are set by a user;
s2, initializing i to 1;
s3, if N x i is less than or equal to N, entering S4, otherwise, ending;
s4, calculating the maximum column number j of the spliced wall supportable by the splicing processor corresponding to the row number i of the spliced wall supported by the splicing processor according to a preset formula;
the preset formula is as follows:
Figure FDA0003113190440000011
wherein S is the maximum bandwidth of the output head, m is the transverse resolution of the LED display unit, and n is the longitudinal resolution of the LED display unit;
s5, if the calculated j is not equal to 0, entering S6, otherwise, ending;
s6, screening from the resolution ratio corresponding to the splicing wall of the i row and the j column and outputting the output resolution ratio corresponding to the current i of the splicing processor according to the preset screening condition;
and S7, i is i +1, and the step returns to the S3.
2. The stitching processor output resolution screening method of claim 1, wherein the S6 specifically comprises:
selecting minimum value M between M and M x j0
Screening and outputting the output resolution of the splicing processor corresponding to the current i from the first resolution and the second resolution; wherein, the firstThe transverse resolution of one resolution is j, and the longitudinal resolution is n x i; the second resolution has a lateral resolution of M0The longitudinal resolution is n x i.
3. The method for screening output resolutions of a stitching processor according to claim 2, wherein the screening and outputting the output resolution of the stitching processor corresponding to the current i from between the first resolution and the second resolution specifically comprises:
screening out the resolution with the transverse resolution being integral multiple of the m from the first resolution and the second resolution as the output resolution corresponding to the current i of the splicing processor;
and outputting the screened output resolution.
4. The stitching processor output resolution screening method of claim 1, wherein the output header is a DVI output header.
5. The method of claim 1, wherein the screen refresh rate for the resolution is 60 Hz.
6. A tiled processor output resolution screening arrangement, comprising:
the acquisition unit is used for acquiring the transverse resolution M and the longitudinal resolution N of the LED display unit, the maximum bandwidth S of the output head, the maximum transverse resolution M and the maximum longitudinal resolution N which can be output by the splicing processor, which are set by a user;
an initialization unit for initializing i ═ 1;
a first judging unit, which is used for starting the calculating unit if N x i is less than or equal to N, otherwise, ending;
the calculation unit is used for calculating the maximum column number j of the spliced wall which can be supported by the splicing processor and corresponds to the row number i of the spliced wall supported by the splicing processor according to a preset formula;
the preset formula is as follows:
Figure FDA0003113190440000021
wherein S is the maximum bandwidth of the output head, m is the transverse resolution of the LED display unit, and n is the longitudinal resolution of the LED display unit;
a second judgment unit, configured to start the screening unit if the calculated j is not equal to 0, and otherwise, end;
the screening unit is used for screening and outputting the output resolution ratio of the splicing processor corresponding to the current i from the resolution ratio below the resolution ratio corresponding to the splicing wall of the i row and the j column according to the preset screening condition;
and the traversing unit is used for returning to start the first judging unit when i is i + 1.
7. The stitching processor output resolution screening apparatus according to claim 6, wherein the screening unit specifically comprises:
a selecting subunit for selecting a minimum value M between M and M x j0
The screening output subunit is used for screening the first resolution and the second resolution and outputting the output resolution corresponding to the current i of the splicing processor; wherein the transverse resolution of the first resolution is j, and the longitudinal resolution is n x i; the second resolution has a lateral resolution of M0The longitudinal resolution is n x i.
8. The tiled processor output resolution screening arrangement of claim 7, wherein the screening output subunit is specifically configured to
Screening out the resolution with the transverse resolution being integral multiple of the m from the first resolution and the second resolution as the output resolution corresponding to the current i of the splicing processor;
and outputting the screened output resolution.
9. A tiled processor output resolution screening apparatus, the apparatus comprising a processor and a memory:
the memory is used for storing program codes and transmitting the program codes to the processor;
the processor is configured to perform the stitching processor output resolution screening method of any one of claims 1-5 in accordance with instructions in the program code.
10. A computer-readable storage medium for storing program code for performing the stitching processor output resolution screening method of any one of claims 1-5.
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CN113286100B (en) * 2021-05-17 2022-12-13 西安诺瓦星云科技股份有限公司 Configuration method and device of video output interface and video output equipment

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101256762A (en) * 2008-03-21 2008-09-03 广东威创视讯科技股份有限公司 Multiple-screen splitting and jointing method and device
CN101404151A (en) * 2008-08-04 2009-04-08 广东威创视讯科技股份有限公司 Multi-screen splicing apparatus and method
CN202171933U (en) * 2011-03-30 2012-03-21 北京彩讯科技股份有限公司 LED (light-emitting diode) split-join display device with super high resolution rate
CN103106889A (en) * 2013-02-25 2013-05-15 南京欧帝科技有限公司 Method utilizing automatic correction extended display identification data (EDID) to improve output resolution
CN104461295A (en) * 2014-12-03 2015-03-25 广东威创视讯科技股份有限公司 Method and system for regulating video display window of jointing wall
CN204707207U (en) * 2015-06-17 2015-10-14 北京德普视讯科技有限公司 Based on the tiled display control system of cloud computing technology
CN105653224A (en) * 2015-12-31 2016-06-08 京东方科技集团股份有限公司 Tiled display system and display method thereof
CN106791551A (en) * 2016-12-12 2017-05-31 广东威创视讯科技股份有限公司 A kind of method of automatic regulating signal source resolution ratio, mosaic screen and system
CN107797784A (en) * 2017-11-13 2018-03-13 威创集团股份有限公司 Obtain the method and device of the adaptation resolution ratio of splicing device
CN109062531A (en) * 2018-08-15 2018-12-21 京东方科技集团股份有限公司 The display methods and display control unit of mosaic screen and mosaic screen
CN109640026A (en) * 2018-12-26 2019-04-16 威创集团股份有限公司 A kind of high-resolution signal source spell wall display methods, device and equipment
CN109739453A (en) * 2018-12-24 2019-05-10 威创集团股份有限公司 A kind of combination resolution ratio method of automatic configuration and relevant device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102436020B1 (en) * 2019-01-31 2022-08-24 삼성전자주식회사 Electronic device and control method thereof

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101256762A (en) * 2008-03-21 2008-09-03 广东威创视讯科技股份有限公司 Multiple-screen splitting and jointing method and device
CN101404151A (en) * 2008-08-04 2009-04-08 广东威创视讯科技股份有限公司 Multi-screen splicing apparatus and method
CN202171933U (en) * 2011-03-30 2012-03-21 北京彩讯科技股份有限公司 LED (light-emitting diode) split-join display device with super high resolution rate
CN103106889A (en) * 2013-02-25 2013-05-15 南京欧帝科技有限公司 Method utilizing automatic correction extended display identification data (EDID) to improve output resolution
CN104461295A (en) * 2014-12-03 2015-03-25 广东威创视讯科技股份有限公司 Method and system for regulating video display window of jointing wall
CN204707207U (en) * 2015-06-17 2015-10-14 北京德普视讯科技有限公司 Based on the tiled display control system of cloud computing technology
CN105653224A (en) * 2015-12-31 2016-06-08 京东方科技集团股份有限公司 Tiled display system and display method thereof
CN106791551A (en) * 2016-12-12 2017-05-31 广东威创视讯科技股份有限公司 A kind of method of automatic regulating signal source resolution ratio, mosaic screen and system
CN107797784A (en) * 2017-11-13 2018-03-13 威创集团股份有限公司 Obtain the method and device of the adaptation resolution ratio of splicing device
CN109062531A (en) * 2018-08-15 2018-12-21 京东方科技集团股份有限公司 The display methods and display control unit of mosaic screen and mosaic screen
CN109739453A (en) * 2018-12-24 2019-05-10 威创集团股份有限公司 A kind of combination resolution ratio method of automatic configuration and relevant device
CN109640026A (en) * 2018-12-26 2019-04-16 威创集团股份有限公司 A kind of high-resolution signal source spell wall display methods, device and equipment

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