CN110161766A - Display device - Google Patents
Display device Download PDFInfo
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- CN110161766A CN110161766A CN201910541933.4A CN201910541933A CN110161766A CN 110161766 A CN110161766 A CN 110161766A CN 201910541933 A CN201910541933 A CN 201910541933A CN 110161766 A CN110161766 A CN 110161766A
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- 238000003860 storage Methods 0.000 claims abstract description 68
- 239000003990 capacitor Substances 0.000 claims abstract description 16
- 230000005611 electricity Effects 0.000 claims description 7
- 230000005540 biological transmission Effects 0.000 claims 1
- 230000014759 maintenance of location Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 15
- 230000000694 effects Effects 0.000 description 13
- 239000000758 substrate Substances 0.000 description 11
- 238000004519 manufacturing process Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 4
- 238000009413 insulation Methods 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
A kind of display device comprising multiple sub-pixels.In each sub-pixel, the first control line and the second control line is electrically connected in the grid of first driving element and the grid of the second driving element, the drain electrode of first driving element is electrically connected source electrode, the first storage capacitance and the display medium capacitor of the second driving element, and the drain electrode of the second driving element is electrically connected the second storage capacitance.In the flrst mode, the first driving element is respectively at opening and closing state with the first section of holding time in the first sweep time section, and the second driving element is constantly in closed state.Under the second mode, the first driving element is respectively at opening and closing state with the second section of holding time in the second sweep time section, and the second driving element is constantly in open state.
Description
Technical field
The invention relates to a kind of display devices, and in particular to a kind of display device of changeable mode.
Background technique
The power consumption (power consumption) of the portable display devices such as mobile phone and tablet computer influence whether using when
Between length.Therefore, if the power consumption of display device can be reduced, can extend display device uses the time, and reaches energy-efficient
Effect.Display device is operated in low frequency, can have lower power consumption, but need enough big storage capacitance to inhibit leakage effect
To negative effect caused by display quality, such as because showing phenomena such as picture is gradually dark or flashes (flicker) caused by electric leakage.Only
With the promotion of the resolution of display device, the area of pixel becomes smaller, and storage capacitance is also relatively small, leads to break-through (feed
Through) voltage becomes larger, cross-talk (crosstalk) phenomenon generates or even the deterioration of leakage effect.In view of above-mentioned, how to increase
Storage capacitance simultaneously inhibits leakage effect, becomes as one of current Research Emphasis.
Summary of the invention
The present invention provides a kind of display device, can increase storage capacitance and inhibit leakage effect.
A kind of display device of one embodiment of the invention includes multiple sub-pixels.Each sub-pixel includes the first control
Line, the second control line, the first driving element, the second driving element, the first storage capacitance, display medium capacitor and the second storage
Capacitor.The grid of first driving element is electrically connected the first control line.The drain electrode of first driving element is electrically connected the second driving
The source electrode of element, the first storage capacitance and display medium capacitor.The grid of second driving element is electrically connected the second control line.
The drain electrode of second driving element is electrically connected the second storage capacitance.In the flrst mode, the first driving element is in the first scanning
Between section it is in the open state and be in close state in the first section of holding time, and the second driving element is in the first sweep time section
And first section of holding time be in close state.Under the second mode, the first driving element is in the second sweep time section
It open state and is in close state in the second section of holding time, and the second driving element is in the second sweep time section and second
Section of holding time is in the open state.
Based on above-mentioned, in an embodiment of the present invention, display device can be in multiple modes (including first mode and the second mould
Formula) between do and switch.In the flrst mode, the second driving element is continuously in closed state, and sub-pixel is made to have lesser deposit
Storage is held, to help to improve charge rate problem.Under the second mode, the second driving element is continuously in open state, makes
Sub-pixel has biggish storage capacitance, so as to effectively inhibit negative effect of the leakage effect for display quality.
Below in conjunction with the drawings and specific embodiments, the present invention will be described in detail, but not as a limitation of the invention.
Detailed description of the invention
Fig. 1 is the equivalent circuit diagram (equivalent of a sub-pixel of the display device of the embodiment of the present invention
circuit diagram)。
Fig. 2A and Fig. 2 B is the drive waveforms figure of first mode and second mode respectively.
Fig. 3 A is the office of the first embodiment of the active component array base board of the display device of the embodiment of the present invention
Portion's upper schematic diagram.
Fig. 3 B is transparent area and the schematic diagram of alternatively non-transparent district in Fig. 3 A.
Fig. 3 C is the diagrammatic cross-section of Fig. 3 A vertical center line I-I '.
Fig. 4 is the part of second of embodiment of the active component array base board of the display device of the embodiment of the present invention
Upper schematic diagram.
Fig. 5 is the part of the third embodiment of the active component array base board of the display device of the embodiment of the present invention
Upper schematic diagram.
Fig. 6 A is the office of the 4th kind of embodiment of the active component array base board of the display device of the embodiment of the present invention
Portion's upper schematic diagram.
Fig. 6 B is the diagrammatic cross-section of Fig. 6 A vertical center line II-II '.
Fig. 7 and Fig. 8 is the upper schematic diagram of two kinds of embodiments of the display device of the embodiment of the present invention respectively.
Wherein, appended drawing reference:
1,1A, 1B: display device
10A, 10B, 10C, 10D: active component array base board
A1: transparent area
A2: alternatively non-transparent district
C1: the first storage capacitance
C2: the second storage capacitance
CE: common electrode
CH1, CH2: channel layer
CL1: the first control line
CL2: the second control line
CL3: third control line
Cm: display medium capacitor
D1, D2: drain electrode
G1, G2: grid
H1: the first holds time section
H2: the second holds time section
IN1, IN2, IN3, IN4, IN5: insulating layer
L1A, L1B, L2A, L2B: lines
PE1: the first pixel electrode
PE2: the second pixel electrode
S1, S2: source electrode
SC1: the first sweep time section
SC2: the second sweep time section
SL: aperture
SP: sub-pixel
SUB: substrate
T1: the first driving element
T2: the second driving element
TH1, TH2: perforation
W: conducting wire
X: direction
I-I ', II-II ': hatching line
Specific embodiment
Structural principle and working principle of the invention are described in detail with reference to the accompanying drawing:
The direction term being previously mentioned in embodiment, such as: "upper", "lower", "front", "rear", "left", "right" etc. are only
With reference to the direction of attached drawing.Therefore, the direction term used and is not intended to limit the invention for illustrating.In the accompanying drawings, respectively
Schema shows the usual property feature of method used in particular exemplary embodiment, structure and/or material.However, these
Schema is not necessarily to be construed as defining or limiting the range or property covered by these example embodiments.For example, in order to clear
Chu Qijian, each film layer, the relative thickness in region and/or structure and position may zoom in or out.
In embodiments, the same or similar element will use the same or similar label, and repeat it is omitted.This
Outside, the feature in different example embodiments can be combined with each other in case of no collision, and according to this specification or claim
Made simple equivalent changes and modifications all still belong in the range of this patent covers.In addition, in this specification or claim
The terms such as " first " that refers to, " second " are only to name the element or the different embodiments of difference or model of discrete (discrete)
It encloses, and is not used to the quantitative upper limit of restriction element or lower limit, manufacturing sequence or the setting for being also not limited to element are suitable
Sequence.
In an embodiment of the present invention, display device has multiple modes (including first mode and second mode), and aobvious
Showing device can be done between the multiple mode to be switched.For example, first mode has the first operating frequency, second mode tool
There is the second operating frequency, and display device can be done between the multiple operating frequency and switch.Herein, operating frequency refers to showing
Show the renewal frequency of picture.Operating frequency is 60 hertz (Hz) and refers to updating within display device every 1/60 second primary display picture.
When the second operating frequency is lower than the first operating frequency, second mode is referred to as low frequency mode, and first mode is referred to as high frequency mode.
Herein, the example of low frequency mode may include showing the renewal frequency of picture lower than 60 hertz, and such as 1 hertz, 24 hertz or other are conspicuous
Hereby.The example of high frequency mode may include show picture renewal frequency be 60 hertz or more, such as 60 hertz, 120 hertz or other
Hertz.Since display device updates display picture under the second mode with lower frequency, display device is in second mode
Under can have a lower power consumption, and it is more energy saving.For convenience of description, following embodiment is high frequency mode and second in the first pattern
Mode is illustrated for low frequency mode, but the schema category of display device is not limited with above-mentioned.
Fig. 1 is the equivalent circuit diagram of a sub-pixel of the display device of the embodiment of the present invention.Fig. 2A and Fig. 2 B difference
It is the drive waveforms figure of first mode and second mode.Please refer to Fig. 1 to Fig. 2 B, the display device 1 of one embodiment of the invention
Including multiple sub-pixel SP.Each sub-pixel SP includes the first control line CL1, the second control line CL2, the first driving element
T1, the second driving element T2, the first storage capacitance C1, display medium capacitor Cm and the second storage capacitance C2.First driving member
The grid G 1 of part T1 is electrically connected the first control line CL1.The drain D 1 of first driving element T1 is electrically connected the second driving element
The source S 2 of T2, the first storage capacitance C1 and display medium capacitor Cm.The grid G 2 of second driving element T2 is electrically connected the
Two control line CL2.The drain D 2 of second driving element T2 is electrically connected the second storage capacitance C2.
Each sub-pixel SP may also include third control line CL3, and the source S 1 of the first driving element T1 is electrically connected
Third control line CL3.First control line CL1 and the second control line CL2 is, for example, scan line, and third control line CL3 is for example
For data line.
In the flrst mode, the first driving element T1 is in the open state in the first sweep time section SC1 and in the first dimension
It holds period H1 to be in close state, and the second driving element T2 holds time section in the first sweep time section SC1 and first
H1 is in close state.For example, as shown in the lines L1A of Fig. 2A, in the first sweep time section SC1, via shown in FIG. 1
First control line CL1 sends out positive pulse voltage (or high potential, VGH) to the grid G 1 of the first driving element T1, to open first
Driving element T1 simultaneously charges to the first storage capacitance C1 and display medium capacitor Cm.In addition, holding time section first
H1, via the first control line CL1 shown in FIG. 1 to the grid G 1 of the first driving element T1 send out negative voltage (or low potential,
VGL), to close the first driving element T1.On the other hand, as shown in the lines L2A of Fig. 2A, the first sweep time section SC1 with
And first hold time a section H1, sends out negative electricity to the grid G 2 of the second driving element T2 via the second control line CL2 shown in FIG. 1
Pressure, makes the second driving element T2 be continuously in closed state.That is, in the flrst mode, not to the second storage capacitance C2
It charges, and the storage capacitance of sub-pixel SP in the flrst mode depends primarily on the first storage capacitance C1 and display medium
Capacitor Cm.
Under the second mode, the first driving element T1 is in the open state in the second sweep time section SC2 and in the second dimension
It holds period H2 to be in close state, and the second driving element T2 holds time section in the second sweep time section SC2 and second
H2 is in the open state.For example, as shown in the lines L1B of Fig. 2 B, in the second sweep time section SC2, via shown in FIG. 1
First control line CL1 sends out positive pulse voltage (or high potential, VGH) to the grid G 1 of the first driving element T1, to open first
Driving element T1 simultaneously charges to the first storage capacitance C1 and display medium capacitor Cm.In addition, holding time section second
H2, via the first control line CL1 shown in FIG. 1 to the grid G 1 of the first driving element T1 send out negative voltage (or low potential,
VGL), to close the first driving element T1.On the other hand, as shown in the lines L2B of Fig. 2 B, the second sweep time section SC2 with
And second hold time a section H2, sends out positive electricity to the grid G 2 of the second driving element T2 via the second control line CL2 shown in FIG. 1
It presses (or high potential, VGH), the second driving element T2 is made to be continuously in open state.That is, under the second mode, to
Two storage capacitance C2 persistently charge, and the storage capacitance of sub-pixel SP under the second mode is in addition to depending on the first storage capacitance C1
And except display medium capacitor Cm, the second storage capacitance C2 is additionally depended on.
According to above-mentioned, sub-pixel SP has lesser storage capacitance in the flrst mode, and have under the second mode compared with
Big storage capacitance.Under first mode (high frequency mode), small storage capacitance is easier to charge, therefore helps to improve high frequency
The problem of mode lower charging time deficiency.On the other hand, under second mode (low frequency mode), big storage capacitance is compared with can stablize
The current potential influenced by leakage effect, therefore effectively leakage effect can be inhibited for the negative of display quality while saving energy
It influences.
Next illustrate the numerous embodiments of display device 1, but the implementable reality of display device 1 by multiple embodiments
It applies mode and is not limited with following.It should be noted that display device 1 generally include active component array base board, opposite substrate and
Display dielectric layer between active component array base board and opposite substrate.Multiple embodiments below are filled mainly for display
The difference for the active component array base board set is illustrated, and existing display medium can be used in display dielectric layer and opposite substrate
Layer and opposite substrate, therefore just repeated no more under.In addition, for convenience of description, following embodiment is limit with display device
Field suitching type (Fringe Field Switching, FFS) display device is illustrated, but the type of display device is not with above-mentioned
It is limited.
Fig. 3 A is the office of the first embodiment of the active component array base board of the display device of the embodiment of the present invention
Portion's upper schematic diagram.Fig. 3 B is transparent area and the schematic diagram of alternatively non-transparent district in Fig. 3 A.In figure 3b, second is indicated with thick dashed line
Region where storage capacitance C2.Fig. 3 C is the diagrammatic cross-section of Fig. 3 A vertical center line I-I '.Fig. 1, Fig. 3 A to Fig. 3 C are please referred to, is shown
The active component array base board 10A of showing device 1 may include substrate SUB and multiple insulating layers (such as insulating layer IN1, insulating layer
IN2, insulating layer IN3 and insulating layer IN4).In addition, the first control line CL1, the second control line CL2, third control line CL3,
One driving element T1, the second driving element T2, the first storage capacitance C1, display medium capacitor Cm, the second storage capacitance C2, insulation
Layer IN1, insulating layer IN2, insulating layer IN3 and insulating layer IN4 are arranged on substrate SUB.
In the present embodiment, the first control line CL1, the second control line CL2, the grid G 1 of the first driving element T1 and
The grid G 2 of two driving element T2 is arranged on substrate SUB and belongs to the first patterned conductive layer.It is led by same patterning
The design of electric layer, can avoid between conducting element because overlie one another (or conducting element cross over another conducting element) due to must add insulation
The problems such as layer and load (loading) increase.Insulating layer IN1 is arranged in the first patterned conductive layer and not by the first pattern
On the substrate SUB for changing conductive layer covering.The channel layer CH1 of first driving element T1 be arranged on insulating layer IN1 and with grid G 1
Overlapping.The channel layer CH2 of second driving element T2 is also disposed on insulating layer IN1 and Chong Die with grid G 2.Channel layer CH1 and
Channel layer CH2 is for example made by polysilicon (poly-Si) material.Source S 1 and drain D 1 are located at the phase of channel layer CH1
To two sides, and source S 2 and drain D 2 are located at the opposite sides of channel layer CH2.Third control line CL3 is controlled across first
Line CL1 processed and the second control line CL2, and it is electric with the first control line CL1 and the second control line CL2 through insulating layer IN1
Property insulation.Source S 1, drain D 1, source S 2, drain D 2 and third control line CL3 belong to the second patterned conductive layer.Absolutely
Edge layer IN2, insulating layer IN3 and insulating layer IN4 are sequentially stacked on substrate SUB.However, in active component array base board 10A
Element and/or film layer be oppositely arranged relationship, production order and/or material etc. and can change on demand, without being limited with above-mentioned.
For marginal field suitching type display device, each sub-pixel SP further includes the first pixel electrode PE1, the second picture
Plain electrode PE2 and common electrode CE.First pixel electrode PE1 has multiple aperture SL, and (aperture SL is not illustrated in Fig. 3 A, please refers to
Fig. 3 C), and the first pixel electrode PE1 is electrically connected by the drain D 1 of perforation TH1 and the first driving element T1.Another party
Face, the second pixel electrode PE2 are electrically connected by the drain D 2 of perforation TH2 and the second driving element T2.In the present embodiment,
First pixel electrode PE1 and the second pixel electrode PE2 is arranged on insulating layer IN4 and belongs to third patterned conductive layer.
In addition, as shown in Figure 3A, the second pixel electrode PE2 and the first pixel electrode PE1 are located at the first driving element T1 and second and drive
The same side of dynamic element T2, and the first pixel electrode PE1 and the second pixel electrode PE2 do not overlap each other.Common electrode CE weight
It is laminated on the first pixel electrode PE1 and the second pixel electrode PE2, and common electrode CE is for example positioned at insulating layer IN3 and insulating layer
Between IN4.However, above-mentioned multiple element and/or film layer be oppositely arranged relationship, production order and/or material etc. can be on demand
Change, without being limited with above-mentioned.
The composition of first storage capacitance C1 is including the first pixel electrode PE1, common electrode CE and is located at the first pixel electricity
Insulating layer IN4 between pole PE1 and common electrode CE.The composition of second storage capacitance C2 includes the second pixel electrode PE2, shares
The electrode CE and insulating layer IN4 between the second pixel electrode PE2 and common electrode CE.
Each sub-pixel SP has transparent area A1 and alternatively non-transparent district A2.The transparent area A1 and alternatively non-transparent district A2 can
It is defined by the decorative layer (not shown) in the opposite substrate of display device 1.Furthermore, it is understood that decorative layer is suitable for masking display dress
The element for being not intended to be seen in 1 by user is set, wherein the region (the namely region Chong Die with decorative layer) covered by decorative layer
For alternatively non-transparent district A2, and the region (namely not region Chong Die with decorative layer) that do not covered by decorative layer is transparent area A1.?
In the present embodiment, as shown in Figure 3B, the first pixel electrode PE1 of the first storage capacitance C1 is Chong Die with transparent area A1, and second deposits
The second pixel electrode PE2 that storage holds C2 is Chong Die with alternatively non-transparent district A2.In other words, the second storage capacitance C2 of the present embodiment is
It is covered by decorative layer.At the second pixel electrode PE2 and the framework of the first pixel electrode PE1 same layer, when the second driving element
When T2 is in the open state (such as second mode), the electric field between the second pixel electrode PE2 and common electrode CE will affect liquid crystal
The arrangement of liquid crystal molecule in layer (display dielectric layer), to influence display effect.Therefore, the second storage can be covered by decorative layer
Region where capacitor C2, to avoid the region from being seen by user.
Fig. 4 is the part of second of embodiment of the active component array base board of the display device of the embodiment of the present invention
Upper schematic diagram.Referring to figure 4., the main difference of the active component array base board 10A of active component array base board 10B and Fig. 3 A
It is that the first control line CL1, the second control line CL2, the first driving element T1 and the second driving element T2's is oppositely arranged pass
System and production order.For example, the production order of multiple patterned conductive layers in active component array base board 10B can be according to need
It asks and different.In addition, in active component array base board 10B, the grid of the first control line CL1 and the first driving element T1
Pole G1 belongs to a patterned conductive layer, and the grid G 2 of the second control line CL2 and the second driving element T2 belong to another
Patterned conductive layer.In addition, the two patterned conductive layers can pass through insulating layer (not shown) and be electrically insulated from.
Fig. 5 is the part of the third embodiment of the active component array base board of the display device of the embodiment of the present invention
Upper schematic diagram.Referring to figure 5., the main difference of the active component array base board 10A of active component array base board 10C and Fig. 3 A
It is that the first pixel electrode PE1, the second pixel electrode PE2 and common electrode CE's is oppositely arranged relationship.For example, this reality
The the second pixel electrode PE2 for applying example is overlapped in the first driving element T1 and the second driving element T2.Under this framework, with first
The area of the common electrode (being not shown, referring to figure 3. C) of pixel electrode PE1 and the second pixel electrode PE2 overlapping will increase.
In addition, the first pixel electrode PE1 can be occupied further and be used originally in Fig. 3 A after the position for changing the second pixel electrode PE2
The region of second pixel electrode PE2 is set, therefore the first pixel electrode PE1 there can be biggish area.Accordingly, in Fig. 3 B
The area of transparent area A1 can increase (such as being expanded to the region in Fig. 3 B where the second storage capacitance C2), and alternatively non-transparent district A2
Area can reduce.Therefore, Fig. 5 sub-pixel SP can have biggish aperture opening ratio.
Fig. 6 A is the office of the 4th kind of embodiment of the active component array base board of the display device of the embodiment of the present invention
Portion's upper schematic diagram.In fig. 6, it is represented by dotted lines the second pixel electrode PE2 covered by the first pixel electrode PE1.Fig. 6 B is
The diagrammatic cross-section of Fig. 6 A vertical center line II-II '.Please refer to Fig. 6 A and Fig. 6 B, active component array base board 10D and Fig. 3 A and Fig. 3 C
Active component array base board 10A main difference be the first pixel electrode PE1, the second pixel electrode PE2 and share electricity
The area for being oppositely arranged relationship and each electrode of pole CE.For example, the first pixel electrode PE1 and the second pixel electrode PE2
Overlap each other and be located at the opposite sides of common electrode CE.In other words, the first pixel electrode PE1 and the second pixel electrode
PE2 is not belonging to the same patterned conductive layer.
Specifically, active component array base board 10D further includes insulating layer IN5.First pixel electrode PE1 setting is being insulated
On layer IN5, and the first pixel electrode PE1 is electrically connected by the drain D 1 of perforation TH1 and the first driving element T1.Second picture
Plain electrode PE2 is arranged on insulating layer IN3, and the second pixel electrode PE2 passes through the leakage of perforation TH2 and the second driving element T2
Pole D2 is electrically connected.Common electrode CE is between insulating layer IN4 and insulating layer IN5.
In the embodiment of Fig. 3 A to Fig. 5, the second pixel electrode PE2 is located at (the second pixel electrode PE2 in opaque area A2
Covered by decorative layer), therefore the second pixel electrode PE2 is other than it can be euphotic electrode, can also be non-transparent electrode.In this reality
It applies in example, the first pixel electrode PE1 and the second pixel electrode PE2 overlap each other, and (the second pixel electrode PE2 is located at the first pixel
Below electrode PE1).In other words, the second pixel electrode PE2 and the first pixel electrode PE1 are co-located in transparent area, therefore the
Two pixel electrode PE2 are preferably euphotic electrode, to avoid the aperture opening ratio for influencing sub-pixel SP.
In the present embodiment, the area of the second pixel electrode PE2 can be equal to the area of the first pixel electrode PE1.At this
Under structure, the first pixel electrode PE1 and the second pixel electrode PE2 can pattern having the same, such first pixel electrode PE1 and
Identical light shield manufacture can be used in two pixel electrode PE2.In addition, the present embodiment can have biggish second storage capacitance.
Fig. 7 and Fig. 8 is the upper schematic diagram of two kinds of embodiments of the display device of the embodiment of the present invention respectively.It please join
According to Fig. 7 and Fig. 8, in display device 1A and display device 1B, multiple sub-pixel SP are arranged in array.Display device 1A and
Display device 1B further includes a plurality of conducting wire W.These conducting wires W connects a plurality of of multiple sub-pixel SP from at least side of the array
Second control line (is not shown, please refer to Fig. 1).Under this framework, further away from least multiple sons of side described in the array
Pixel SP can load (RC loading) because of resistance capacitance due to have more serious leaky.That is, the array
The electric leakage degree of the sub-pixel SP of different zones can be different because of resistance capacitance load.In order to reduce because electric leakage degree is different
It is negatively affected caused by picture uniformity, electricity can be stored to multiple the second of multiple sub-pixel SP according to the severity of electric leakage
The size of appearance carries out regional modulation.By make positioned at the more serious region of electrical leakage problems sub-pixel SP have biggish second
Storage capacitance can promote the picture uniformity under second mode.
In Fig. 7, these conducting wires W connects a plurality of the of multiple sub-pixel SP from the wherein side (such as left side) of the array
Two control lines, thus further away from described in the array wherein side (such as left side) multiple sub-pixel SP (i.e. closer to as described in
Multiple sub-pixel SP on the right side of array) there can be more serious leaky because of resistance capacitance load.It, can under this framework
Make the size of multiple second storage capacitances of multiple sub-pixel SP be incremented by towards the direction X far from the wherein side (such as by a left side and
The right side is incremented by), to promote the picture uniformity under second mode.For example, be located at multiple sub-pixel SP in the left side of the array
The size of multiple second storage capacitances is C, positioned at multiple second storage capacitances of multiple sub-pixel SP at the center of the array
Size be 1.1C to 1.3C, and be located at the array right side multiple sub-pixel SP multiple second storage capacitances size
For 1.3C to 1.5C.On the other hand, multiple first storage capacitances (being not shown, please refer to Fig. 1) of the multiple sub-pixel SP
Size can be all identical.
In fig. 8, a plurality of conducting wire W connects a plurality of of multiple sub-pixel SP from the opposite sides (left and right sides) of the array
Second control line.Under this framework, multiple sub-pixel SP further away from the opposite sides of the array are (i.e. closer to described
Multiple sub-pixel SP at the center of array) there can be more serious leaky because of resistance capacitance load.Therefore, can make multiple
The size of multiple second storage capacitances of sub-pixel SP is incremented by from the opposite sides towards the center of the array, to promote second
Picture uniformity under mode.For example, being located at multiple second storage electricity of multiple sub-pixel SP of the left and right sides of the array
The size of appearance is C, and the size for being located at multiple second storage capacitances of multiple sub-pixel SP at the center of the array is 1.1C
To 1.5C.
In conclusion in an embodiment of the present invention, display device can be in multiple modes (including first mode and the second mould
Formula) between do and switch.In the flrst mode, the second driving element is continuously in closed state, and sub-pixel is made to have lesser deposit
Storage is held, to help to improve charge rate problem.Under the second mode, the second driving element is continuously in open state, makes
Sub-pixel has biggish storage capacitance, so as to effectively inhibit negative effect of the leakage effect for display quality.It is real one
Apply in example, by modulation film layer or element be oppositely arranged relationship and production order can reach the number of the insulating layer needed for reducing
At least one of measure, avoid the advantages that load increase, the promotion of aperture opening ratio and promotion of the second storage capacitance.In another reality
It applies in example, also regional tune can be carried out to the size of multiple second storage capacitances of multiple sub-pixels according to the severity of electric leakage
Become, to promote the picture uniformity under second mode.
Certainly, the present invention can also have other various embodiments, without deviating from the spirit and substance of the present invention, ripe
It knows those skilled in the art and makes various corresponding changes and modifications, but these corresponding changes and change in accordance with the present invention
Shape all should fall within the scope of protection of the appended claims of the present invention.
Claims (10)
1. a kind of display device, which is characterized in that including multiple sub-pixels, each sub-pixel includes one first control line, one
Second control line, one first driving element, one second driving element, one first storage capacitance, a display medium capacitor and one
Second storage capacitance a, wherein grid of first driving element is electrically connected first control line, first driving
One drain electrode of element is electrically connected a source electrode, first storage capacitance and the display medium of second driving element
Capacitor, a grid of second driving element are electrically connected second control line, and a leakage of second driving element
Pole is electrically connected second storage capacitance, wherein
Under a first mode, first driving element is in the open state in one first sweep time section and in one first dimension
Holding the period is in close state, and second driving element is when the first sweep time section and described first maintain
Between section be in close state,
Under a second mode, first driving element is in the open state in one second sweep time section and in one second dimension
Holding the period is in close state, and second driving element is when the second sweep time section and described second maintain
Between section it is in the open state.
2. display device as described in claim 1, which is characterized in that wherein the first mode has one first operation frequency
Rate, the second mode has one second operating frequency, and second operating frequency is lower than first operating frequency.
3. display device as described in claim 1, which is characterized in that wherein each sub-pixel further includes one first pixel electricity
Pole, one second pixel electrode and the common electrode for being overlapped in first pixel electrode Yu second pixel electrode, institute
The composition for stating the first storage capacitance includes first pixel electrode and the common electrode, and second storage capacitance
Composition includes second pixel electrode and the common electrode.
4. display device as claimed in claim 3, which is characterized in that wherein first pixel electrode and second picture
Plain electrode is located at the same side of first driving element and second driving element, and first pixel electrode and
Second pixel electrode does not overlap each other.
5. display device as claimed in claim 3, which is characterized in that wherein second pixel electrode is overlapped in described first
Driving element and second driving element.
6. display device as described in claim 4 or 5, which is characterized in that wherein each sub-pixel have a transparent area with
And an alternatively non-transparent district, first pixel electrode and the light transmission area overlapping of first storage capacitance, and described second deposits
Second pixel electrode that storage is held is Chong Die with the alternatively non-transparent district.
7. display device as claimed in claim 3, which is characterized in that wherein first pixel electrode and second picture
Plain electrode is located at the same side of first driving element and second driving element, first pixel electrode and institute
The opposite sides that the second pixel electrode overlaps each other and is located at the common electrode is stated, wherein each sub-pixel has one
Transparent area and an alternatively non-transparent district, and first storage capacitance state the first pixel electrode and second storage capacitance
Second pixel electrode be overlapped in the transparent area.
8. display device as described in claim 1, which is characterized in that wherein the multiple arrangement of subpixels is at an array, institute
It states display device and further includes a plurality of conducting wire, wherein a plurality of conducting wire connects the multiple sub- picture from the wherein side of the array
A plurality of second control line of element, and the size of multiple second storage capacitances of the multiple sub-pixel is towards far from the wherein side
Direction be incremented by.
9. display device as described in claim 1, which is characterized in that wherein the multiple arrangement of subpixels is at an array, institute
It states display device and further includes a plurality of conducting wire, wherein a plurality of conducting wire connects the multiple sub- picture from the opposite sides of the array
A plurality of second control line of element, and the size of multiple second storage capacitances of the multiple sub-pixel is from the opposite sides towards institute
The center for stating array is incremented by.
10. display device as described in claim 1, which is characterized in that wherein multiple first storages of the multiple sub-pixel
The size of capacitor is all identical.
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| US201862717260P | 2018-08-10 | 2018-08-10 | |
| US62/717,260 | 2018-08-10 | ||
| TW108103331 | 2019-01-29 | ||
| TW108103331A TWI689908B (en) | 2018-08-10 | 2019-01-29 | Display device |
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| CN110161766B CN110161766B (en) | 2022-02-18 |
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