CN110149114A - One kind trimming circuit - Google Patents
One kind trimming circuit Download PDFInfo
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- CN110149114A CN110149114A CN201910579577.5A CN201910579577A CN110149114A CN 110149114 A CN110149114 A CN 110149114A CN 201910579577 A CN201910579577 A CN 201910579577A CN 110149114 A CN110149114 A CN 110149114A
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- switch
- control terminal
- drain electrode
- nmos tube
- resistance
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Trimming circuit the invention discloses one kind includes: PMOS tube, NMOS tube, diode, resistance, current source, comparator, first switch, second switch, the first control terminal, the second control terminal and third control terminal；First control terminal accesses PMOS tube grid, and the second control terminal accesses NMOS tube grid, and third control terminal is connect with first switch, second switch；PMOS tube source electrode is connect with regulated power supply, and PMOS tube drain electrode is connect with one end of one end of diode, one end of resistance and second switch, and the other end of diode and the other end of resistance and NMOS tube drain electrode connect, the other end ground connection of second switch；NMOS tube source electrode ground connection, the other end of NMOS tube drain electrode connection first switch；One end of current source connection first switch；Comparator positive input terminal connects NMOS tube drain electrode, and negative input end connects reference voltage, and comparator is by comparing NMOS tube drain voltage and reference voltage output signal.It can be trimmed after packaging, to reduce cost, reduce chip area, and improve and trim precision.
Description
Technical field
The present invention relates to analog circuit fields more particularly to one kind to trim circuit.
Background technique
It is usually widely adopted in analog circuit currently, trimming circuit.By the way of fusing to metal fuse
Realization trims, and the electric current that this mode is needed when trimming is very big, therefore when can only pass through On-Wafer Measurement (before encapsulating)
It is fused by probe high current.The method is although easy to operate, but there are some disadvantages.For example, it can not encapsulated
After trimmed；Its chip occupying area is larger, higher cost.
Summary of the invention
It is an object of the invention to solve defect of the existing technology.
In order to achieve the above objectives, in a first aspect, the invention discloses one kind to trim circuit, comprising: PMOS tube, NMOS tube,
Diode, resistance, current source, comparator, first switch, second switch, the first control terminal, the second control terminal and third control
End；Wherein,
First control terminal accesses the grid of PMOS tube, and the second control terminal accesses the grid of NMOS tube, third control terminal and the
One switch, second switch connection；The source electrode of PMOS tube is connect with regulated power supply, the drain electrode of PMOS tube and one end, the electricity of diode
One end of resistance is connected with one end of second switch, the drain electrode connection of the other end of diode and the other end of resistance and NMOS tube,
The other end of second switch is grounded；The source electrode of NMOS tube is grounded, the other end of the drain electrode connection first switch of NMOS tube；Current source
Connect one end of first switch；The drain electrode of the positive input terminal connection NMOS tube of comparator, negative input end connect reference voltage Ref,
Comparator by comparing NMOS tube drain voltage and reference voltage Ref, output signal Data；
First control terminal is used to control the conducting and open circuit of PMOS tube source electrode and drain electrode；Second control terminal is for controlling NMOS
The conducting and open circuit of pipe source electrode and drain electrode；Third control terminal is used to control the conducting and open circuit of first switch and the second switch.
In one example, the drain electrode of PMOS tube has extended downwardly one first extension slice, and the drain electrode of NMOS tube upwardly extends
There is one second extension slice；First extension slice and the second extension slice connect, and form P-N junction, i.e. diode；It sinks in P-N junction
Product has metal silicide layer, i.e. resistance.
In one example, have insulation and obturation layer aperture at P-N junction；For making during fuse metal silicide layer
The product that fuses sprays, and the residue of fusing is avoided to re-form metal silicide layer in P-N junction.
Second aspect, the invention discloses a kind of method for repairing and regulating, trim circuit based on above-mentioned, including the following steps:
PMOS tube source electrode and drain electrode is connected in first control terminal output low level, and the second control terminal output high level makes NMOS
Pipe source electrode and drain electrode are connected, and third control terminal output low level keeps first switch and the second switch breaking, and formation trims the stage
Current path；
Control trims the first passage current on the current path in stage, and the first passage current is made to be greater than the specified electricity of resistance
Stream, when the first passage current flows through resistance, makes resistance heating fuse；
First control terminal output high level makes PMOS tube source electrode and drain electrode open circuit, and the second control terminal output low level makes NMOS
Pipe source electrode and drain electrode open circuit, third control terminal output high level are connected first switch and the second switch, form the reading stage
Current path；
Diode prevents the electric current in reading stage from passing through, and NMOS tube drain voltage is greater than reference voltage Ref, comparator output
High level.
The third aspect, the invention discloses a kind of data programmed circuit, comprising it is multiple it is above-mentioned trim circuit, composition is programmable
Array carries out the data programming of multidigit.
The present invention has the advantages that can be trimmed after packaging, to reduce cost, reduce chip area, and
Raising trims precision.
Detailed description of the invention
In order to become apparent from the technical solution for illustrating the embodiment of the present invention, embodiment will be described below in it is required use it is attached
Figure is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for this field
For those of ordinary skill, without creative efforts, it is also possible to obtain other drawings based on these drawings.
Fig. 1 is a kind of circuit diagram for trimming circuit of the invention；
Fig. 2 is that one kind of the embodiment of the present invention trims circuit structure block diagram；
Fig. 3 is a kind of circuit diagram of programmable resistance.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
Every other embodiment obtained without making creative work, shall fall within the protection scope of the present invention.
Fig. 1 is a kind of circuit diagram for trimming circuit of the invention, as shown in Figure 1.It includes: PMOS tube that one kind, which trimming circuit,
MP1, NMOS tube MN1, diode D1, resistance R1, current source I1, comparator Comp1, first switch S1, second switch S2, first
Control terminal TC, the second control terminal BC and third control terminal RC.
The connection relationship of each device is as follows: TC accesses the grid of MP1, and BC accesses the grid of MN1, and TC is for controlling the source MP1
The conducting and open circuit of pole and drain electrode；BC is used to control the conducting and open circuit of MN1 source electrode and drain electrode；RC is for controlling leading for S1 and S2
On and off road.
The source electrode of MP1 is connect with regulated power supply, and the drain electrode of MP1 is connect with one end of one end of D1, one end of R1 and S2, D1
The drain electrode of the other end and MN1 of the other end and R1 connect, the other end of S2 ground connection, the source electrode ground connection of MN1；The one of I1 connection S1
End, the drain electrode of the other end connection MN1 of S1；The drain electrode of the positive input terminal connection MN1 of Comp1, negative input end connect reference voltage
Ref, Comp1 by comparing MN1 drain voltage VAThe size of (in attached drawing 1 at A point) and Ref, output signal Data.
When being trimmed, TC output low level make MP1 source electrode and drain electrode be connected, BC output high level make MN1 source electrode with
Drain electrode conducting, RC output low level make S1 and S2 open circuit, form the current path in the stage that trims.
Control trims the first passage current on the current path in stage, and the first passage current is made to be greater than the specified electricity of R1
Stream, parallel circuit, the MN1 that the first passage current sequence flows through MP1, D1 and R1 send out R1 when the first passage current flows through R1
Hot melt is disconnected.
When being read, TC export high level make MP1 source electrode and drain electrode open circuit, BC output low level make MN1 source electrode with
Drain electrode open circuit, RC output high level are connected S1 and S2, form the current path in reading stage.
If experienced the stage of trimming, R1 is blown.D1 prevents the electric current in reading stage from passing through, MN1 drain voltage VA
Greater than reference voltage Ref, the output signal Data of Comp1 is high level.
For example, I1 is 1 microampere, reference voltage Ref is 0.5 volt, and after R1 fusing, the impedance of the parallel circuit of D1 and R1 is
1 megohm.MN1 drain voltage VA=I1*R1, then VAThe output signal Data of > Ref, Comp1 are high level.
If not suffering from the stage of trimming, R1 is not blown.I1 is as alternate path electric current, if alternate path electric current is less than R1
Rated current, alternate path sequence of currents flows through S1, R1, S2.MN1 drain voltage is less than reference voltage, the output of comparator
Signal is low level.
For example, I1 is 1 microampere, reference voltage Ref is 0.5 volt, and R1 is not blown, and the resistance value of R1 is less than 105Ohm.
MN1 drain voltage VA=I1*R1, then VAThe output signal Data of < Ref, Comp1 are low level.
In a specific embodiment, PMOS tube, the structural relation of NMOS tube and diode in circuit, such as Fig. 2 are trimmed
It is shown.
MP1 is PMOS tube, wherein oblique line filling region is P+ active area, GPFor the grid of MP1, SPFor the source electrode of MP1, DP
For the drain electrode of MP1；MN1 is NMOS tube, wherein grid filling region is N+ active area, GNFor the grid of MN1, SNFor the source of MN1
Pole, DNFor the drain electrode of MN1.
Under normal circumstances, it drains identical with source configuration, drain electrode and source electrode are according only to carrier in circuit connection
It flows to and defines, the terminal of carrier outflow is drain electrode, and the terminal that carrier flows into is source electrode.PMOS tube is using hole as current-carrying
Son, NMOS tube is using electronics as carrier.
The drain electrode of PMOS tube has extended downwardly an extension slice DP', the drain electrode of NMOS tube has upwardly extended an extension slice
DN'.Extend slice DP' and extension slice DN' connect, form P-N junction, i.e. diode D1.
Preferably, extend slice DP' and extension slice DN' width is set as 5 nanometers~500 nanometers.Herein, it will be perpendicular to
Sense of current is defined as width.
Using 0.35 micron and more advanced metal silicide silicide technique, the deposited metal silicide in P-N junction
Layer (attached drawing is not shown), the metal silicide layer have certain resistance.Specifically, the resistance value of metal silicide layer can basis
Need self-setting.
P-N junction and metal silicide layer form the parallel-connection structure of diode and resistance.It is equivalent to diode D1 shown in FIG. 1
With the parallel relationship of resistance R1.
Preferably, when encapsulation trims circuit, using etching technics, the insulation and obturation layer on metal silicide layer is etched
Fall, makes have insulation and obturation layer aperture A at P-N junction, as shown in Figure 2.Metal silicide when being trimmed, as resistance R1
Layer is blown, and insulation and obturation layer aperture A can effectively make the product ejection that fuses, and avoids the residue of fusing in P-N junction (i.e. two
Pole pipe D1) on re-form metal silicide layer, and then form new resistance.
In practical applications, circuit composition programmable array can be trimmed by multiple, forms the data programmed circuit of multidigit.
Fig. 3 is a kind of circuit diagram of programmable resistance, as shown in Figure 3.The end X and the end Y of programmable resistance are as external electrical
Road connecting pin, the end D1~D3 are signal control terminal.The output signal Data for 3 being trimmed circuit, respectively as programmable resistance
The end D1~D3 input signal.By trimming the output signal Data of circuit, the resistance value of programmable resistance is determined.
When the resistance value R for needing programmable resistance to provide is the resistance value of resistance RX1, then circuit is not trimmed to 3 and repaired
It adjusts, and then is low level reading stage output signal Data, is i.e. the end D1~D3 input signal is 0.Since the end D1~D3 is defeated
Entering signal is 0, so switch SX1, switch SX2 and switch SX3 closure, so that the resistance value R of programmable resistance is resistance RX1's
Resistance value.
When the resistance value R for needing programmable resistance to provide is the sum of resistance RX1 and the resistance value of resistance RX2, then need to the end D1
The corresponding circuit that trims is trimmed, this is made to trim the R1 fusing in circuit, and then is height reading stage output signal Data
Level, meanwhile, the circuit that trims not corresponding to the end D2, D3 trims, it is made to read the low electricity of stage output signal Data
Flat, i.e., the end D1 input signal is 1, and the end D2, D3 input signal is 0.Since the end D1 input signal is 1, the end D2, D3 input signal is
0, so switch SX1 is disconnected, switch SX2 and switch SX3 are closed, so that the resistance value R of programmable resistance is resistance RX1 and resistance
The sum of resistance value of RX2.
And so on.By the corresponding output signal for trimming circuit in the end D1~D3, the end programmable resistance X and the end Y are controlled
Between resistance.
The present invention provides one kind to trim circuit, can be trimmed after packaging, to reduce cost, reduces chip face
Product, and improve and trim precision.
Above specific embodiment has carried out further in detail the purpose of the present invention, technical scheme and beneficial effects
Illustrate, it should be understood that the above is only a specific embodiment of the invention, the protection model that is not intended to limit the present invention
It encloses, all within the spirits and principles of the present invention, any modification, equivalent substitution, improvement and etc. done should be included in the present invention
Protection scope within.
Claims (5)
1. one kind trims circuit characterized by comprising PMOS tube, NMOS tube, diode, resistance, current source, comparator,
One switch, second switch, the first control terminal, the second control terminal and third control terminal；Wherein,
First control terminal accesses the grid of PMOS tube, and the second control terminal accesses the grid of NMOS tube, and third control terminal is opened with first
It closes, second switch connection；The source electrode of PMOS tube is connect with regulated power supply, one end of the drain electrode of PMOS tube and diode, resistance
One end is connected with one end of second switch, the drain electrode connection of the other end of diode and the other end of resistance and NMOS tube, and second
The other end of switch is grounded；The source electrode of NMOS tube is grounded, the other end of the drain electrode connection first switch of NMOS tube；Current source connection
One end of first switch；The drain electrode of the positive input terminal connection NMOS tube of comparator, negative input end connect reference voltage Ref, compare
Device by comparing NMOS tube drain voltage and reference voltage Ref, output signal Data；
First control terminal is used to control the conducting and open circuit of PMOS tube source electrode and drain electrode；Second control terminal is for controlling NMOS tube source
The conducting and open circuit of pole and drain electrode；Third control terminal is used to control the conducting and open circuit of first switch and the second switch.
2. according to claim 1 trim circuit, which is characterized in that the drain electrode of the PMOS tube has extended downwardly first and prolonged
Slice is stretched, the drain electrode of NMOS tube has upwardly extended the second extension slice；The first extension slice and the second extension slice connect,
Form P-N junction, i.e., the described diode；Metal silicide layer is deposited in P-N junction, i.e., the described resistance.
3. according to claim 2 trim circuit, which is characterized in that have insulation and obturation layer aperture at the P-N junction；With
During fuse metal silicide layer, making the product ejection that fuses, the residue of fusing is avoided to re-form gold in P-N junction
Belong to silicide layer.
4. a kind of method for repairing and regulating trims circuit based on as described in claim 1, characterized in that it comprises the following steps:
PMOS tube source electrode and drain electrode is connected in first control terminal output low level, and the second control terminal output high level makes NMOS tube source
Pole and drain electrode are connected, and third control terminal output low level keeps first switch and the second switch breaking, form the electric current in the stage that trims
Access；
Control trims the first passage current on the current path in stage, and the first passage current is made to be greater than the rated current of resistance,
When the first passage current flows through resistance, resistance heating is made to fuse；
First control terminal output high level makes PMOS tube source electrode and drain electrode open circuit, and the second control terminal output low level makes NMOS tube source
Pole and drain electrode open circuit, third control terminal output high level are connected first switch and the second switch, form the electric current in reading stage
Access；
Diode prevents the electric current in reading stage from passing through, and NMOS tube drain voltage is greater than reference voltage Ref, the high electricity of comparator output
It is flat.
5. a kind of data programmed circuit, which is characterized in that trim circuit as described in claim 1 comprising multiple, composition can be compiled
Journey array carries out the data programming of multidigit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910579577.5A CN110149114B (en) | 2019-06-28 | 2019-06-28 | Trimming circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910579577.5A CN110149114B (en) | 2019-06-28 | 2019-06-28 | Trimming circuit |
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| Publication Number | Publication Date |
|---|---|
| CN110149114A true CN110149114A (en) | 2019-08-20 |
| CN110149114B CN110149114B (en) | 2023-01-03 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201910579577.5A Active CN110149114B (en) | 2019-06-28 | 2019-06-28 | Trimming circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116707497A (en) * | 2023-08-08 | 2023-09-05 | 成都电科星拓科技有限公司 | Tunable low-speed clock duty cycle skew trimming circuit, method and timing circuit |
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| WO2011060638A1 (en) * | 2009-11-19 | 2011-05-26 | 北京中星微电子有限公司 | Battery charge control device |
| CN103825601A (en) * | 2012-11-15 | 2014-05-28 | 东莞赛微微电子有限公司 | Fuse trimming and adjusting circuit |
| CN204578500U (en) * | 2015-04-14 | 2015-08-19 | 无锡中星微电子有限公司 | Single-stage comparator |
| WO2017004984A1 (en) * | 2015-07-07 | 2017-01-12 | 深圳创维－Rgb电子有限公司 | Power converter and power supply switching device |
-
2019
- 2019-06-28 CN CN201910579577.5A patent/CN110149114B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011060638A1 (en) * | 2009-11-19 | 2011-05-26 | 北京中星微电子有限公司 | Battery charge control device |
| CN103825601A (en) * | 2012-11-15 | 2014-05-28 | 东莞赛微微电子有限公司 | Fuse trimming and adjusting circuit |
| CN204578500U (en) * | 2015-04-14 | 2015-08-19 | 无锡中星微电子有限公司 | Single-stage comparator |
| WO2017004984A1 (en) * | 2015-07-07 | 2017-01-12 | 深圳创维－Rgb电子有限公司 | Power converter and power supply switching device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116707497A (en) * | 2023-08-08 | 2023-09-05 | 成都电科星拓科技有限公司 | Tunable low-speed clock duty cycle skew trimming circuit, method and timing circuit |
| CN116707497B (en) * | 2023-08-08 | 2023-10-31 | 成都电科星拓科技有限公司 | Tunable low-speed clock duty cycle skew trimming circuit, method and timing circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110149114B (en) | 2023-01-03 |
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