CN110137132A - Forming method, the chemical vapor deposition process of groove isolation construction - Google Patents

Forming method, the chemical vapor deposition process of groove isolation construction Download PDF

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Publication number
CN110137132A
CN110137132A CN201910383100.XA CN201910383100A CN110137132A CN 110137132 A CN110137132 A CN 110137132A CN 201910383100 A CN201910383100 A CN 201910383100A CN 110137132 A CN110137132 A CN 110137132A
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silicon oxide
oxide layer
semiconductor substrate
chemical vapor
vapor deposition
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李众
鲁旭斋
张锋
林宗贤
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Huaian Imaging Device Manufacturer Corp
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Huaian Imaging Device Manufacturer Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/7627—Vertical isolation by full isolation by porous oxide silicon, i.e. FIPOS techniques

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

Technical solution of the present invention discloses a kind of forming method of groove isolation construction, chemical vapor deposition process.The forming method of groove isolation construction includes: offer semiconductor substrate, is formed with polish stop layer in semiconductor substrate；It is sequentially etched polish stop layer and semiconductor substrate, forms groove in polish stop layer and semiconductor substrate；Trenched side-wall and bottom in semiconductor substrate form silicon oxide layer；Silicon oxide layer is surface-treated using the gaseous state or liquid of ultraviolet light and hydroxyl, alternatively, being surface-treated using ultraviolet light and combinations of reactants to silicon oxide layer, the combinations of reactants is suitable for reacting the substance for generating hydroxyl；Silica is filled into groove using TEOS-Ozone thermal chemical vapor deposition process, the silica fills up the groove and the covering polish stop layer.Technical solution of the present invention can optimize the deposition rate, uniformity, compactness of TEOS-Ozone silicon oxide film.

Description

Forming method, the chemical vapor deposition process of groove isolation construction
Technical field
The present invention relates to field of semiconductor technology more particularly to a kind of forming methods of groove isolation construction, and one kind The TEOS-Ozone thermal chemical vapor deposition process of optimization.
Background technique
In integrated circuit fabrication, ethyl orthosilicate-ozone thermal chemical vapor deposition (TEOS (Tetraethyl Orthosilicate)-Ozone(O3) thermal CVD) technique is widely used, such as high-aspect-ratio (HARP, High Aspect Ration Process) depositing operation, sub- aumospheric pressure cvd (SACVD, Sub Atmospheric CVD) Technique is widely used in well shallow ditch groove structure (STI, Shallow Trench Isolation) and metal due to porefilling capability The trench fill of front medium layer (PMD, Pre Metal Dielectric).
When carrying out TEOS-Ozone thermal chemical vapor deposition process, the physicochemical properties of substrate surface be will affect TEOS-Ozone cvd silicon oxide (SiO2) film deposition rate, uniformity, compactness etc..Studies have shown that substrate surface silicon Hydroxyl (Si-OH) quantity is more, is more conducive to the absorption of TEOS-Ozone reaction intermediate, SiO2Deposition rate, uniformity, Compactness is then better.By taking the filling of sti trench slot as an example, current process is the SiO in STI2Situ steam oxygen is first used before deposition Change reaction process (ISSG, In Situ Steam Generation) or thermal oxidative reaction (Thermal) technique prepares one layer of oxygen Change layer, such as SiO2Layer, but the ISSG or SiO of thermal oxidative reaction preparation2Layer surface lacks silicone hydroxyl.
Therefore the deposition rate, uniformity and compactness for how optimizing TEOS-Ozone thermal chemical vapor deposition process, from And improving film quality and production capacity becomes current urgent problem to be solved.
Summary of the invention
Technical solution of the present invention technical problems to be solved are how to optimize existing TEOS-Ozone thermal chemical vapor to sink Deposition rate, uniformity and the compactness of product technique.
In order to solve the above technical problems, technical solution of the present invention provides a kind of forming method of groove isolation construction, comprising: Semiconductor substrate is provided, is formed with polish stop layer in the semiconductor substrate；It is sequentially etched the polish stop layer and partly leads Body substrate forms groove in the polish stop layer and semiconductor substrate；Trenched side-wall in the semiconductor substrate and Silicon oxide layer is formed on bottom；The silicon oxide layer is carried out at surface using the gaseous state or liquid of ultraviolet light and hydroxyl Reason, alternatively, being surface-treated using ultraviolet light and combinations of reactants to the silicon oxide layer, the combinations of reactants is suitable for Reaction generates the substance of hydroxyl；Silica is filled into the groove using TEOS-Ozone thermal chemical vapor deposition process, The silica fills up the groove and the covering polish stop layer.
Optionally, the ditch using situ steam oxidation reaction technique or thermal oxidative reaction technique in the semiconductor substrate Silicon oxide layer is formed on groove sidewall and bottom.
Optionally, the gaseous state of the hydroxyl or liquid include H2O、H2O2Or alcohols.
Optionally, the combinations of reactants includes O3And H2Or including O2And H2。
Optionally, when being surface-treated using ultraviolet light, oxidizing species are also passed through.
Optionally, the oxidizing species include O3。
In order to solve the above technical problems, technical solution of the present invention also provides a kind of chemical vapor deposition process, comprising: provide Semiconductor substrate；Silicon oxide layer is formed on the semiconductor substrate；Using ultraviolet light and the gaseous state or liquid object of hydroxyl The silicon oxide layer of verifying is surface-treated, alternatively, being carried out using ultraviolet light and combinations of reactants to the silicon oxide layer Surface treatment, the combinations of reactants are suitable for reacting the substance for generating hydroxyl；Using TEOS-Ozone thermal chemical vapor deposition Technique is in silicon oxide layer surface cvd silicon oxide.
Optionally, before the chemical vapor deposition process is applied to fleet plough groove isolation structure, deep trench isolation structure, metal In the formation process of dielectric layer or intermetallic dielectric layer.
Optionally, the gaseous state of the hydroxyl or liquid include H2O、H2O2Or alcohols.
Optionally, the combinations of reactants includes O3And H2Or including O2And H2。
Optionally, when being surface-treated using ultraviolet light, oxidizing species are also passed through.
Optionally, the oxidizing species include O3。
Compared with prior art, technical solution of the present invention has the advantages that
Using TEOS-Ozone thermal chemical vapor deposition process cvd silicon oxide (SiO2) before film, first use ultraviolet light And the gaseous state or liquid of hydroxyl are surface-treated the silicon oxide layer, alternatively, using ultraviolet light and reaction Object combination (suitable for reacting the substance for generating hydroxyl) is surface-treated the silicon oxide layer, provides energy using ultraviolet light To strike off silicon oxygen (Si-O) key, the hydroxyl in hydroxyl (- OH) substance is allowed to be combined into silicone hydroxyl (Si- with silicon (Si-) OH), thus increase surface silicone hydroxyl quantity, so as to optimize TEOS-Ozone silicon oxide film deposition rate, uniformly Property, compactness, improve film quality and production capacity.
Further, when being surface-treated using ultraviolet light, oxidizing species, such as O are also passed through3, O3It is easy to point Solution generates O2Very high with the chemical activity of O free radical, O free radical, the O that can more easily grab in Si-O key forms O2Escape Fall, therefore UV+O3Processing can reinforce destroy Si-O key process.
Detailed description of the invention
Fig. 1 and Fig. 2 is that substrate surface silicone hydroxyl quantity influences TEOS-Ozone deposition SiO2The schematic illustration of film；
Fig. 3 A to Fig. 3 E is the corresponding structural schematic diagram of each step of the chemical vapor deposition process of the embodiment of the present invention；
Fig. 4 is surface-treated silicon oxide layer for the embodiment of the present invention to increase the signal of the principle of silicone hydroxyl quantity Figure；
Fig. 5 A to Fig. 5 E is that the corresponding structure of each step of forming method of the fleet plough groove isolation structure of the embodiment of the present invention is shown It is intended to.
Specific embodiment
When carrying out TEOS-Ozone thermal chemical vapor deposition process, the physicochemical properties of semiconductor substrate surface can shadow Ring TEOS-Ozone cvd silicon oxide (SiO2) film deposition rate, uniformity, compactness etc..Substrate surface silicone hydroxyl (Si- OH) quantity is more, is more conducive to the absorption of TEOS-Ozone reaction intermediate, SiO2Deposition rate, uniformity, compactness then Better.
By taking Fig. 1 as an example: (a) 10 surface of semiconductor substrate has a fairly large number of silicone hydroxyl (Si-OH)；(b) TEOS- is carried out When Ozone depositing operation, TEOS is by O3Activation；(c) TEOS reaction intermediates (reactive intermediates) are adsorbed on There is the position of silicone hydroxyl (Si-OH) on 10 surface of substrate；(d) pass through dehydration (Dehydration reaction), substrate 10 Adsorption is uniform, highdensity silicon oxygen bond (Si-O, silicon oxygen bond) and silicone hydroxyl (Si-OH)；(e) 2 silicon Hydroxyl (Si-OH) dehydration formed silicon oxygen bond (Si-O), uniform, highly dense silicon oxygen bond (Si-O) 10 surface of substrate formed uniformly, Fine and close SiO2Film 11.
By taking Fig. 2 as an example: the surface (a') semiconductor substrate 10' has a small amount of silicone hydroxyl (Si-OH)；(b') TEOS- is carried out When Ozone depositing operation, TEOS is by O3Activation；(c') TEOS reaction intermediates (reactive intermediates) are adsorbed on There is the position (surface reaction model) of silicone hydroxyl (Si-OH) on the surface substrate 10', and TEOS reaction intermediates are in no silicone hydroxyl (Si- OH position (gas phase reaction mode)) forms polysiloxanes (polysiloxane, (- Si-O-Si-O-) n)；(d') by dehydration It reacts (Dehydration reaction), the surface substrate 10' forms polysiloxanes, a small amount of silicon oxygen bond (Si-O, silicon Oxygen bond) and silicone hydroxyl (Si-OH)；(e') 2 silicone hydroxyl (Si-OH) dehydrations form silicon oxygen bond (Si-O), on a small quantity, no Uniform silicon oxygen bond (Si-O) forms uneven, compactness difference SiO on the surface substrate 10'2It is heavy to affect film by film 11' Product quality.
Based on this, in order to optimize TEOS-Ozone thermal chemical vapor deposition process, technical solution of the present invention is in TEOS- First using the gaseous state or liquid of ultraviolet light and hydroxyl in semiconductor substrate before Ozone thermal chemical vapor deposition process Silicon oxide layer be surface-treated, alternatively, using ultraviolet light and suitable for generate hydroxyl substance combinations of reactants pair Silicon oxide layer in semiconductor substrate is surface-treated, to increase the silicone hydroxyl quantity on surface.
Technical solution of the present invention is described in detail below with reference to embodiment and attached drawing.
Chemical vapor deposition process provided in an embodiment of the present invention includes: to provide semiconductor substrate 100, in the semiconductor Silica (SiO is formed on substrate2) layer 101, as shown in Figure 3A；Using ultraviolet light (UV) and hydroxyl (- OH) gaseous state or Liquid is surface-treated the silicon oxide layer 101, alternatively, using ultraviolet light (UV) and combinations of reactants to described Silicon oxide layer 101 is surface-treated, and the combinations of reactants is suitable for generating the substance of hydroxyl, as shown in Fig. 3 B to Fig. 3 D； Using TEOS-Ozone thermal chemical vapor deposition process in the 101 surface cvd silicon oxide 102 of silicon oxide layer, such as Fig. 3 E institute Show.
In the present embodiment, as shown in Figure 3A, before TEOS-Ozone thermal chemical vapor deposition process, it is initially formed one layer of oxidation Silicon layer, for example, by using situ steam oxidation reaction (ISSG, In Situ Steam Generation) technique or thermal oxidative reaction (Thermal) technique forms silicon oxide layer 101 on 100 surface of semiconductor substrate.Using situ steam oxidation reaction technique Or 101 surface of silicon oxide layer that thermal oxidative reaction technique is formed only has a small amount of silicone hydroxyl (Si-OH), due to lacking silicone hydroxyl, So that TEOS-Ozone SiO2Deposition rate, uniformity, compactness etc. it is lower, influence film performance.
Deposit ISSG or Thermal SiO2Suitable for semiconductor front end technique, such as shallow trench isolation (STI, Shallow Trench Isolation) technique because both techniques are all high-temperature technologies, can repair shallow ridges it is groove etched it is complete after silicon Damage, smooth trench bottom angle, it is easier to subsequent deposition process.In addition, backend process or to heat budget it is demanding Technique or surface are not in the structure of silicon, such as the filling of before-metal medium layer (PMD, Pre-Metal Dielectric), no ISSG or Thermal SiO can be used2, other existing techniques such as depositing operation can be used and form SiO2Layer, but these techniques The SiO of formation2Layer surface lacks silicone hydroxyl.
In the process node of the present embodiment, the thickness range of silicon oxide layer 101 can beBecause ISSG or Thermal SiO2It is thermal oxidation technology, needs to consume substrate silicon, if thickness is too thin possibly can not be repaired completely quarter The smoothness of silicon damage and channel bottom angle after erosion is inadequate, so that device performance is influenced, if thickness is too big, More silicon can be consumed, device active region is caused to reduce, influence device performance.
As shown in Figure 3B, silicon oxide layer 101 is surface-treated using ultraviolet light.Ultraviolet light wave length, it is relatively visible Energy is higher for light, therefore, can use the high feature of UV energy and comes for 101 table of silicon oxide layer in semiconductor substrate Face provides energy, achievees the purpose that strike off surface Si-O key with this.
Further, when being surface-treated using ultraviolet light, oxidizing species, such as O can be also passed through3, O3It is easy to It decomposes and generates O2Very high with the chemical activity of O free radical, O free radical, the O that can more easily grab in Si-O key forms O2Escape Ease is fallen, therefore uses UV+O3Carrying out surface treatment can reinforce destroying the process of Si-O key, be more conducive to strike off silicon oxide layer surface Silicon oxygen bond.
In addition, using UV be surface-treated when, can according to actual process situation adjust ultraviolet light watt level, Time etc. is handled, to reach preferable surface treatment effect.Using UV+O3It, can be according to practical work when being surface-treated Skill situation adjusts the watt level of ultraviolet light, processing time etc., also adjustable O3Concentration, flow etc., to reach preferable Surface treatment effect.
As shown in Figure 3 C, silicon oxide layer 101 is surface-treated using the gaseous state of hydroxyl or liquid, alternatively, Silicon oxide layer 101 is surface-treated using the combinations of reactants for the substance for being suitable for generating hydroxyl.
The gaseous state or liquid of the hydroxyl include but is not limited to H2O、H2O2Or alcohols (such as methanol, ethyl alcohol etc.). When being surface-treated using the gaseous state or liquid of hydroxyl, the gas of hydroxyl can be adjusted according to actual process situation State or the concentration of liquid, flow and the time is passed through etc., to guarantee that gaseous state or the liquid of hydroxyl can be with silica Layer surface comes into full contact with.In the present embodiment, using H2O is surface-treated silicon oxide layer 101.
The combinations of reactants includes the combination of oxidizing substance and hydrogenous material, the oxidizing substance and hydrogenous material The substance for generating hydroxyl can be reacted, the oxidizing substance includes but is not limited to O3Or O2, the hydrogenous material can for containing The small-molecule substance of protium, including but not limited to H2.In the present embodiment, using O3+H2Silicon oxide layer 101 is carried out at surface Reason, O3It is easy to decompose and generates O2With O free radical, O free radical is reinforced destroying Si-O key and forms O with the O in Si-O key2, O2With H2Reaction generates H2O, H2- OH contained by O can generate Si-OH in conjunction with Si-.
It, can be according to reality when being surface-treated using combinations of reactants (combination of oxidizing substance and hydrogenous material) The concentration of border process condition adjustment oxidizing substance and hydrogenous material is passed through the time etc., to guarantee hydroxyl that reaction generates Substance can come into full contact with silicon oxide layer surface.
As shown in Figure 3D, after being surface-treated to the silicon oxide layer 101 in semiconductor substrate 100, silicon oxide layer 101 Surface increases sufficient amount of silicone hydroxyl (Si-OH) and is evenly distributed.
Please refer to being surface-treated to silicon oxide layer to increase the schematic illustration of silicone hydroxyl quantity for Fig. 4: (i) is combined With reference to Fig. 3 A, 101 surface of silicon oxide layer has silicon oxygen bond (Si-O) and a small amount of silicone hydroxyl (Si-OH)；(ii) it combines with reference to figure 3B, using UV or UV+O3Handle 101 surface of silicon oxide layer；(iii) it combines and refers to Fig. 3 C, the silicon oxygen bond on 101 surface of silicon oxide layer (Si-O) (break up) is struck off or destroyed, is passed through H to 101 surface of silicon oxide layer2O or O3+H2；(iv) it combines and refers to Fig. 3 D, H2The hydroxyl (- OH) and silicon (Si-) that O contains, which combine, forms silicone hydroxyl (Si-OH).
It should be noted that guaranteeing that silicon oxygen bond (Si-O) is struck off when being surface-treated to silicon oxide layer 101, Hydroxyl (- OH) can be combined with silicon (Si-), in the case where 101 surface of silicon oxide layer increases silicone hydroxyl (Si-OH), Fig. 3 B's Step and sequence and time not considered critical is carried out the step of Fig. 3 C, such as: the step of can first carrying out Fig. 3 B, then carry out figure The step of 3C；It can also be carried out simultaneously with the step of Fig. 3 B and Fig. 3 C；Or the step duration portion of the step of Fig. 3 B and Fig. 3 C Point overlapping, in general, the step of Fig. 3 B at the beginning of earlier than Fig. 3 C the step of at the beginning of, end the step of Fig. 3 B The end time for the step of time is earlier than Fig. 3 C.
As shown in FIGURE 3 E, it is deposited using TEOS-Ozone thermal chemical vapor deposition process on 101 surface of silicon oxide layer When silica 102, TEOS reaction intermediate more holds there is 101 surface of silicon oxide layer of high density, uniform silicone hydroxyl (Si-OH) Easily absorption, TEOS-Ozone SiO2Deposition rate, uniformity, compactness it is more preferable.Dotted line is for distinguishing different process step in figure Suddenly the silicon oxide layer formed.
The chemical vapor deposition process of the embodiment of the present invention can be adapted for the TEOS-Ozone Thermal CVD used Form SiO2The technique of film, such as fleet plough groove isolation structure, deep trench isolation structure, before-metal medium layer or inter-metal medium The formation process such as layer.Below with reference to Fig. 5 A to Fig. 5 E, it is described in detail by taking the forming method of groove isolation construction as an example, this reality It applies in example, the groove isolation construction is fleet plough groove isolation structure, and in other embodiments, the groove isolation construction can also be with For deep trench isolation structure.
Fig. 5 A is please referred to, semiconductor substrate 200 is provided, is formed with polish stop layer 202 in the semiconductor substrate 200.
The material of the semiconductor substrate 200 be silicon, germanium, SiGe, silicon carbide, GaAs or gallium indium, it is described partly to lead Body substrate 200 can also be the germanium substrate on the silicon substrate or insulator on insulator.In the present embodiment, the substrate 200 For silicon substrate.
The polish stop layer 202 is used as subsequent grinding insulating materials SiO2Grinding stop position.In the present embodiment, institute The material for stating polish stop layer 202 is silicon nitride (SiN), and the technique for forming the polish stop layer 202 is chemical vapor deposition (CVD) technique.
It should be noted that being formed before polish stop layer 202 in the semiconductor substrate 200, provides and described partly lead The step of body substrate 200 can also include: to form cushion oxide layer 201 on 200 surface of semiconductor substrate.
Since the stress of the polish stop layer 202 is larger, the grinding is formed in the semiconductor substrate 200 and is stopped When layer 202, it is easy to cause dislocation on 200 surface of semiconductor substrate, the cushion oxide layer 201 is used to grind described in formation Buffering is provided when grinding stop-layer 202, avoids the directly production when forming the polish stop layer 202 in the semiconductor substrate 200 The problem of raw dislocation；In addition, the cushion oxide layer 201 is also used as in subsequent removal 202 step of polish stop layer Stop-layer.In the present embodiment, the material of the cushion oxide layer 201 is SiO2, the technique that forms the cushion oxide layer 201 It can be thermal oxidation technology.
Fig. 5 B is please referred to, the polish stop layer 202 and semiconductor substrate 200 are sequentially etched, in the polish stop layer 202 and semiconductor substrate 200 in formed shallow trench 500.
Specifically, it is formed before polish stop layer 202 in the semiconductor substrate 200, further includes: in the semiconductor The step of 200 surface of substrate forms cushion oxide layer 201, forms shallow trench 500 includes: in the polish stop layer 202 Surface forms graph layer, and the graph layer definition has shallow trench figure；Using the graph layer as exposure mask, along the shallow trench figure It is sequentially etched the polish stop layer 202, cushion oxide layer 201 and semiconductor substrate 200, in the polish stop layer 202, lining Shallow trench 500 is formed in pad oxide 201 and semiconductor substrate 200；Remove the graph layer.
In the present embodiment, the technique for etching the polish stop layer 202, cushion oxide layer 201 and semiconductor substrate 200 can Think plasma dry etch process.The material of the graph layer is that photoresist (PR) is adopted after forming the shallow trench 500 It is removed photoresist with wet process or cineration technics removes the graph layer.
Fig. 5 C is please referred to, 500 side wall of shallow trench and bottom in the semiconductor substrate 200 form silicon oxide layer 203. It is shallow in the semiconductor substrate 200 using situ steam oxidation reaction technique or thermal oxidative reaction technique in the present embodiment Silicon oxide layer 203 is formed on 500 side wall of groove and bottom.ISSG or Thermal SiO2It is thermal oxidation technology, needs to consume silicon lining The thickness range at bottom, oxide thickness, that is, silicon oxide layer 203 can be, for example,Because if thickness too Bao Keneng The smoothness that the silicon damage and channel bottom angle after etching can not be repaired completely is inadequate, so that device performance is influenced, If thickness is too big, more silicon can be consumed, device active region is caused to reduce, influence device performance.
Fig. 5 D is please referred to, the silicon oxide layer 203 is carried out using the gaseous state or liquid of ultraviolet light and hydroxyl Surface treatment.
In the present embodiment, using ultraviolet light and H2O (gaseous state or liquid) carries out the silicon oxide layer 203 in shallow trench 500 Surface treatment: 203 surface of silicon oxide layer has silicon oxygen bond (Si-O) and a small amount of silicone hydroxyl (Si-OH), uses ultraviolet light for oxygen 203 surface of SiClx layer provides energy, and the silicon oxygen bond (Si-O) on 203 surface of silicon oxide layer is struck off (break up), H2What O contained Hydroxyl (- OH) and silicon (Si-), which are combined, forms silicone hydroxyl (Si-OH), so that 203 surface of silicon oxide layer in shallow trench 500 It increases sufficient amount of silicone hydroxyl (Si-OH) and is evenly distributed.
Further, when being surface-treated using ultraviolet light, oxidizing species, such as O can be also passed through3, O3It is easy to It decomposes and generates O2Very high with the chemical activity of O free radical, O free radical, the O that can more easily grab in Si-O key forms O2Escape Ease is fallen, therefore uses UV+O3Carrying out surface treatment can reinforce destroying the process of Si-O key, be more conducive to strike off silicon oxide layer surface Silicon oxygen bond.
In addition, using UV be surface-treated when, can according to actual process situation adjust ultraviolet light watt level, Time etc. is handled, to reach preferable surface treatment effect.Using UV+O3It, can be according to practical work when being surface-treated Skill situation adjusts the watt level of ultraviolet light, processing time etc., also adjustable O3Concentration, flow etc., to reach preferable Surface treatment effect.
When being surface-treated using the gaseous state or liquid of hydroxyl, it can be adjusted and be contained according to actual process situation The concentration of the gaseous state of hydroxyl or liquid, flow and the time is passed through etc., to guarantee that gaseous state or the liquid of hydroxyl can be with It is come into full contact with silicon oxide layer surface.
The gaseous state or liquid of the hydroxyl include but is not limited to H2O、H2O2Or alcohols (such as methanol, ethyl alcohol etc.).
Other than the gaseous state or liquid using hydroxyl are surface-treated, in other embodiments, it can also adopt The silicon oxide layer 203 is surface-treated with combinations of reactants, the combinations of reactants, which is suitable for reacting, generates hydroxyl Substance.Specifically, the combinations of reactants includes the combination of oxidizing substance and hydrogenous material, the oxidizing substance with it is hydrogeneous Substance can react the substance for generating hydroxyl, and the oxidizing substance includes but is not limited to O3Or O2, the hydrogenous material can be with For the small-molecule substance containing protium, including but not limited to H2.For example, using O3+H2Or O2+H2Table is carried out to silicon oxide layer 101 Surface treatment.O3It is easy to decompose and generates O2With O free radical, O free radical is reinforced destroying Si-O key and forms O with the O in Si-O key2, O2With H2Reaction generates H2O, H2- OH contained by O can generate Si-OH in conjunction with Si-.
It, can be according to reality when being surface-treated using combinations of reactants (combination of oxidizing substance and hydrogenous material) The concentration of border process condition adjustment oxidizing substance and hydrogenous material is passed through the time etc., to guarantee hydroxyl that reaction generates Substance can come into full contact with silicon oxide layer surface.
It should be noted that guaranteeing that silicon oxygen bond (Si-O) is struck off when being surface-treated to silicon oxide layer 203, Hydroxyl (- OH) can be combined with silicon (Si-), in the case where 101 surface of silicon oxide layer increases silicone hydroxyl (Si-OH), using UV/ UV+O3It is provided for surface and destroys the energy of Si-O key and be passed through H2The step of O, and carries out time not considered critical at sequence, such as: UV/UV+O can first be used3Energy is provided for surface, then is passed through H2O；It can also be with UV/UV+O3Energy is provided for surface and is passed through H2O is carried out simultaneously；Or UV/UV+O3Energy is provided for surface and is passed through H2The duration portions of O are overlapped, and in general, are adopted Use UV/UV+O3Earlier than being passed through H at the beginning of being surface-treated2At the beginning of O, using UV/UV+O3It is surface-treated End time earlier than being passed through H2The end time of O.
Fig. 5 E is please referred to, fills oxidation into the shallow trench 500 using TEOS-Ozone thermal chemical vapor deposition process Silicon 600, the silica 600 fill up the shallow trench and the covering polish stop layer 202.
The technique for filling the silica 600 is specifically as follows high-aspect-ratio (HARP) depositing operation, sub- normal pressure chemical gas Mutually deposition (SACVD) technique etc..Dotted line is used to distinguish the silicon oxide layer of different process step formation in Fig. 5 E.
Later, the silica in polish stop layer 202 is removed by flatening process, forms fleet plough groove isolation structure；Again Remove the polish stop layer 202.In the present embodiment, the flatening process is chemical mechanical grinding (CMP) technique.It can adopt The polish stop layer 202 is removed with wet-etching technology, solution used by the wet-etching technology can be molten for phosphoric acid Liquid.
Although the present invention discloses as above in a preferred embodiment thereof, it is not for limiting the present invention, any ability Field technique personnel without departing from the spirit and scope of the present invention, may be by the methods and technical content of the disclosure above to this Inventive technique scheme makes possible variation and modification, therefore, anything that does not depart from the technical scheme of the invention, according to this hair Bright technical spirit belongs to the technology of the present invention to any simple modifications, equivalents, and modifications made by embodiment of above The protection scope of scheme.

Claims (12)

1. a kind of forming method of groove isolation construction characterized by comprising
Semiconductor substrate is provided, is formed with polish stop layer in the semiconductor substrate；
It is sequentially etched the polish stop layer and semiconductor substrate, forms ditch in the polish stop layer and semiconductor substrate Slot；
Trenched side-wall and bottom in the semiconductor substrate form silicon oxide layer；
The silicon oxide layer is surface-treated using the gaseous state or liquid of ultraviolet light and hydroxyl, alternatively, using Ultraviolet light and combinations of reactants are surface-treated the silicon oxide layer, and the combinations of reactants is suitable for reaction and generates containing hydroxyl The substance of base；
Silica is filled into the groove using TEOS-Ozone thermal chemical vapor deposition process, the silica fills up described Groove and the covering polish stop layer.
2. the forming method of groove isolation construction as described in claim 1, which is characterized in that use situ steam oxidation reaction The trenched side-wall and bottom of technique or thermal oxidative reaction technique in the semiconductor substrate form silicon oxide layer.
3. the forming method of groove isolation construction as described in claim 1, which is characterized in that the gaseous state or liquid of the hydroxyl State substance includes H2O、H2O2Or alcohols.
4. the forming method of groove isolation construction as described in claim 1, which is characterized in that the combinations of reactants includes O3 And H2Or including O2And H2。
5. the forming method of groove isolation construction as described in claim 1, which is characterized in that carrying out surface using ultraviolet light When processing, it is also passed through oxidizing species.
6. the forming method of groove isolation construction as claimed in claim 5, which is characterized in that the oxidizing species include O3。
7. a kind of chemical vapor deposition process characterized by comprising
Semiconductor substrate is provided；
Silicon oxide layer is formed on the semiconductor substrate；
The silicon oxide layer is surface-treated using the gaseous state or liquid of ultraviolet light and hydroxyl, alternatively, using Ultraviolet light and combinations of reactants are surface-treated the silicon oxide layer, and the combinations of reactants is suitable for reaction and generates containing hydroxyl The substance of base；
Using TEOS-Ozone thermal chemical vapor deposition process in silicon oxide layer surface cvd silicon oxide.
8. chemical vapor deposition process as claimed in claim 7, which is characterized in that the chemical vapor deposition process is applied to Fleet plough groove isolation structure, deep trench isolation structure, in the formation process of before-metal medium layer or intermetallic dielectric layer.
9. chemical vapor deposition process as claimed in claim 7, which is characterized in that the gaseous state or liquid of the hydroxyl Including H2O、H2O2Or alcohols.
10. chemical vapor deposition process as claimed in claim 7, which is characterized in that the combinations of reactants includes O3And H2Or Person includes O2And H2。
11. chemical vapor deposition process as claimed in claim 7, which is characterized in that be surface-treated using ultraviolet light When, also it is passed through oxidizing species.
12. chemical vapor deposition process as claimed in claim 11, which is characterized in that the oxidizing species include O3。
CN201910383100.XA 2019-05-09 2019-05-09 Forming method, the chemical vapor deposition process of groove isolation construction Pending CN110137132A (en)

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CN112366205A (en) * 2020-11-09 2021-02-12 长江存储科技有限责任公司 Semiconductor device and preparation method thereof

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Application publication date: 20190816