CN110120206A - On-state voltage generative circuit, displaying panel driving method and display panel - Google Patents
On-state voltage generative circuit, displaying panel driving method and display panel Download PDFInfo
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- CN110120206A CN110120206A CN201910565760.XA CN201910565760A CN110120206A CN 110120206 A CN110120206 A CN 110120206A CN 201910565760 A CN201910565760 A CN 201910565760A CN 110120206 A CN110120206 A CN 110120206A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- Crystallography & Structural Chemistry (AREA)
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Abstract
The present invention proposes a kind of on-state voltage generative circuit, it is related to technical field of liquid crystal display, the on-state voltage generative circuit is connected to the outside of power circuit, the power circuit is equipped with driving pin and positive feedback voltage pin, power circuit exports analog voltage and trigger signal to the on-state voltage generative circuit, the on-state voltage generative circuit includes: the voltage generation module for exporting on-state voltage, and the voltage connecting with voltage generation module increases module.The present invention can export higher on-state voltage VGH by power supply chip during shutdown, can guarantee that on-state voltage VGH maintains higher voltage for a period of time with this, make shutdown that can discharge sufficiently.
Description
Technical field
The invention belongs to technical field of liquid crystal display, and in particular to a kind of on-state voltage generative circuit, display panel driving
Method and display panel.
Technical background
Traditional liquid crystal display panel needs all thin film transistor (TFT) TFT being connected to on-state voltage when shutdown
VGH discharges to thin film transistor (TFT) TFT, requires the power-off sequential of on-state voltage VGH relatively slow at this time and maintains on-state voltage
VGH higher voltage for a period of time, but the speed of power-off sequential is not easily controlled, and is easy to occur shutdown and is discharged insufficient feelings
Condition.
Due to passing through reset signal Reset during shutdown for all thin film transistor (TFT)s in traditional liquid crystal display panel
TFT is connected to on-state voltage VGH and discharges, and on-state voltage VGH is also in power-down state when shutting down, so on-state voltage
VGH maintains the time deficiency of high voltage just to will appear the insufficient problem of electric discharge.It is as shown in Figure 1 under existing background technique, to close
Thin film transistor (TFT) TFT is connected to the power-down state schematic diagram of on-state voltage VGH when machine.
Summary of the invention
The present invention provides a kind of on-state voltage generative circuit, displaying panel driving method and display panel, and this circuit can
Higher on-state voltage VGH is exported with power supply chip during shutdown, can guarantee that on-state voltage VGH maintains higher voltage with this
For a period of time, make shutdown that can discharge sufficiently.
Technical scheme is as follows:
The invention discloses a kind of on-state voltage generative circuits, are connected to the outside of power circuit, and the power circuit is set
There are driving pin and positive feedback voltage pin, power circuit output analog voltage and trigger signal to the on-state voltage generate
Circuit, the on-state voltage generative circuit include: the voltage generation module for exporting on-state voltage, and are connected with voltage generation module
The voltage connect increases module；
It includes: the first PMOS transistor, the second PMOS transistor, first resistor and the second electricity that the voltage, which increases module,
Resistance；
The trigger signal is input to the grid of first PMOS transistor, and the analog voltage is input to first resistor
First end, the source electrode of first PMOS transistor connects with the second end of first resistor；First PMOS transistor
Grounded drain；
The grid of second PMOS transistor connects the source electrode of first PMOS transistor；The 2nd PMOS crystal
The source electrode of pipe is connected with the first end of second resistance, the second end of second resistance with voltage generation module and positive feedback voltage
Pin connection；The grounded drain of second PMOS transistor.
Preferably, the voltage generation module includes: the second capacitor, the 6th capacitor, 3rd resistor, the 4th resistance, the 5th
Resistance, the 6th resistance, the first positive charge pump circuit and the second positive charge pump circuit；
The analog voltage is input to the first positive charge pump circuit and the second positive charge pump circuit simultaneously；
The first positive charge pump circuit connects the driving pin, the second capacitor, analog voltage, third of power circuit simultaneously
Resistance and the second positive charge pump circuit；
The second positive charge pump circuit output on-state voltage and connect simultaneously the driving pin of power circuit, second electricity
Appearance, 3rd resistor and the 4th resistance；
The first end of second capacitor is connect with driving pin, the second end ground connection of the second capacitor；
The analog voltage is input to the first end of 3rd resistor, and the second end of 3rd resistor is connected to the first positive charge pump
Between circuit and the second positive charge pump circuit；
The first end of 4th resistance connects positive feedback voltage pin, and the first end of the 4th resistance is also connected with the
The first end of five resistance is simultaneously grounded via the second end of the 5th resistance, and the second end of the 4th resistance connects the second positive charge pump circuit
And output on-state voltage；
The first end of 6th capacitor and the first end of the 6th resistance are connected and are grounded side by side, and the of the 6th capacitor
The second end of two ends and the 6th resistance is exported to on-state voltage.
Preferably, the first positive charge pump circuit includes first capacitor, the 4th capacitor, first diode and the two or two pole
Pipe；
The first end connection driving pin of the first capacitor, the second end of first capacitor connect the sun of the second diode
Pole；The anode of the first diode connects the first end of the 4th capacitor, and the cathode of first diode connects the second diode
Anode；The cathode of second diode connects the second end of the 4th capacitor；Analog voltage is input to the of the 4th capacitor
One end, the second end of the 4th capacitor are also connected with the second positive charge pump circuit.
Preferably, the second positive charge pump circuit includes third capacitor, the 5th capacitor, third diode and the four or two pole
Pipe；
The first end connection driving pin of the third capacitor, the second end of third capacitor connect the sun of the 4th diode
Pole；The anode of the third pole pipe connects the first positive charge pump circuit, and the cathode of third diode connects the sun of the 4th diode
Pole；The cathode of 4th diode connects the first end of the 5th capacitor；Analog voltage is input to the second of the 5th capacitor
End, the first end of the 5th capacitor are also connected with on-state voltage VGH.
Preferably, the anode of the third diode connects the cathode and the of the second diode of the first positive charge pump circuit
The second end of four capacitors.
Preferably, under the normal operating condition that is switched on, the on-state voltage meets display panel:
VGH=VFBP* (R4+R5)/R5；
Wherein, on-state voltage value when VGH is booting, VFBP are positive feedback voltage level, and R4 is the resistance value of the 4th resistance,
R5 is the resistance value of the 5th resistance.
Preferably, in the power-offstate, the on-state voltage that the on-state voltage generative circuit finally obtains is full for display panel
Sufficient following formula:
VGH '=VFBP* (R4+Ra)/Ra；Ra=R5*R2/ (R5+R2)；
Wherein, on-state voltage value when VGH ' is shutdown, VFBP are positive feedback voltage level, and R2 is the resistance of second resistance
Value, R4 are the resistance value of the 4th resistance, and R5 is the resistance value of the 5th resistance, and Ra is the parallel equivalent of second resistance and the 5th resistance
Resistance value.
The invention also discloses a kind of displaying panel driving methods to be used for using above-mentioned on-state voltage generative circuit
It generates on-state voltage adjusted and is inputted thin film transistor (TFT), the on-state voltage increases during shutdown.
The invention also discloses a kind of display devices, comprising: display panel and the institute as above for connecting display panel
The on-state voltage generative circuit stated.
Detailed description of the invention
Below by clearly understandable mode, preferred embodiment is described with reference to the drawings, the present invention is given furtherly
It is bright.
Fig. 1 is the power-down state schematic diagram of on-state voltage VGH when shutting down in the prior art；
Fig. 2 is the schematic diagram of on-state voltage generative circuit provided by the invention；
The power-down state schematic diagram of on-state voltage VGH when Fig. 3 is present invention shutdown.
Specific embodiment
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, Detailed description of the invention will be compareed below
A specific embodiment of the invention.It should be evident that drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing, and obtain other embodiments.
To make simplified form, part related to the present invention is only schematically shown in each figure, they are not represented
Its practical structures as product.In addition, there is identical structure or function in some figures so that simplified form is easy to understand
Component only symbolically depicts one of those, or has only marked one of those.Herein, "one" is not only indicated
" only this ", can also indicate the situation of " more than one ".
Technical solution of the present invention is discussed in detail with specific embodiment below.
It is the schematic diagram of on-state voltage generative circuit provided by the invention as shown in Figure 2.The on-state voltage generative circuit
It is connected to the outside of power circuit 100, for generating on-state voltage VGH adjusted and being inputted thin film transistor (TFT).Power supply
Circuit 100 is equipped with driving pin DRVP and positive feedback voltage pin FBP, and power circuit 100 exports analog voltage AVDD and touching
Signalling XON.
Analog voltage AVDD and trigger signal XON input on-state voltage generative circuit comprising voltage generation module 01 with
And the voltage connecting with voltage generation module 01 increases module 02, the voltage increases module 02 for increasing ON state during shutdown
Voltage VGH.
Specifically, the voltage generation module 01 exports on-state voltage VGH comprising: the second capacitor C2, the 6th capacitor
C6,3rd resistor R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the first positive charge pump circuit 11 and the second positive electricity
Lotus pump circuit 12.
Wherein, the first positive charge pump circuit 11 connects driving pin DRVP, the second capacitor of power circuit 100 simultaneously
C2, analog voltage AVDD, 3rd resistor R3 and the second positive charge pump circuit 12；The output of second positive charge pump circuit 12 is opened
State voltage VGH and driving pin DRVP, the second capacitor C2, analog voltage AVDD, the third electricity for connecting power circuit 100 simultaneously
Hinder R3 and the 4th resistance R4.
The first end of second capacitor C2 is connect with driving pin DRVP, the second end ground connection of the second capacitor C2.Analog voltage
AVDD is input to the first end of 3rd resistor R3, and the second end of 3rd resistor R3 is connected to the first positive charge pump circuit 11 and second
Between positive charge pump circuit 12.
The first end of the 4th resistance R4 connects positive feedback voltage pin FBP, the first end of the 4th resistance R4
It is also connected with the first end of the 5th resistance R5 and is grounded via the second end of the 5th resistance R5, the second end output of the 4th resistance R4 is opened
State voltage VGH；The first end of the 6th resistance R6 and the first end of the 6th capacitor C6 are connected and are grounded side by side, the 6th electricity
The second end of the second end and the 6th capacitor C6 that hinder R6 is exported to on-state voltage VGH.Drive pin DRVP after output signal
Obtain output voltage by the first positive charge pump circuit 11 and the second positive charge pump circuit 12, if the output voltage meet it is pre-
The value first set will export on-state voltage VGH by the partial pressure of the 4th resistance R4 and the 5th resistance R5, otherwise can feed back to just
To feedback voltage pin FBP, then drive pin DRVP that can export an output signal again, if until output voltage meets
Preset value.
Specifically, the first positive charge pump circuit 11 include first capacitor C1, the 4th capacitor C4, first diode D1 and
Second diode D2.
Wherein, the second end connection the of first end connection driving the pin DRVP, first capacitor C1 of the first capacitor C1
The anode of two diode D2 and the cathode of first diode D1；The anode of the first diode D1 connects the of the 4th capacitor C4
One end, the cathode of first diode D1 connect the anode of the second diode D2；The cathode connection the 4th of the second diode D2
The second end of capacitor C4；The first end of the 4th capacitor C4 is also connected with analog voltage AVDD, and the second end of the 4th capacitor C4 is also
Connect the second positive charge pump circuit 12.
Specifically, the second positive charge pump circuit 12 include third capacitor C3, the 5th capacitor C5, third diode D3 and
4th diode D4.
Wherein, the second end connection the of first end connection driving the pin DRVP, third capacitor C3 of the third capacitor C3
The anode of four diode D4 and the cathode of third diode D3；The anode of the third diode D3 connects the first positive charge pump electricity
The cathode of the cathode of the second diode D2 on road 11 and the second end of the 4th capacitor C4, third diode D3 connects the 4th diode
The anode of D4；The cathode of the 4th diode D4 connects the first end of the 5th capacitor C5；The second end of the 5th capacitor C5
It is also connected with analog voltage AVDD, the first end of the 5th capacitor C5 exports on-state voltage VGH.
Specifically, it includes: the first PMOS transistor Q1, the second PMOS transistor Q2, first that the voltage, which increases module 02,
Resistance R1 and second resistance R2.
Wherein, the trigger signal XON is input to the grid of the first PMOS transistor Q1, analog voltage AVDD input
To the first end of first resistor R1, the source electrode of the first PMOS transistor Q1 is connected with the second end of first resistor R1；It is described
The grounded drain of first PMOS transistor Q1；The grid of the second PMOS transistor Q2 connects the first PMOS transistor Q1
Source electrode；The source electrode of the second PMOS transistor Q2 is connected with the first end of second resistance R2, the second end of second resistance R2
It is connect with 01 positive feedback voltage pin FBP of voltage generation module；The grounded drain of the second PMOS transistor Q2.
The effect of the first resistor R1 is that the effect of partial pressure current limliting is carried out to analog voltage AVDD, after being on the one hand partial pressure
Realize that the conducting to the second PMOS transistor Q2, the effect of another aspect are increased in the first PMOS transistor Q1 conducting
Analog voltage AVDD draws the resistance in ground path to reduce electric current, is unlikely to keep the electric current of the first PMOS transistor Q1 excessive.
Thin film transistor (TFT) is connected to the power-down state schematic diagram of on-state voltage VGH when Fig. 3 is present invention shutdown.It is of the invention public
For the on-state voltage generative circuit opened after increasing voltage and increasing module 02, on-state voltage VGH passes through 100 non-essential resistance of power circuit
It is exported after adjusting voltage, allows for using different on-state voltages when being switched on normal operating condition and shutdown in this way
VGH。
Because of the characteristic of PMOS transistor, when the normal operating condition, that is, trigger signal XON that is switched on is high level, the
One PMOS transistor Q1 and the second PMOS transistor Q2 are in off state, and drawing ground resistance at this time only has the 5th resistance R5, because
This on-state voltage meets following formula:
VGH=VFBP* (R4+R5)/R5；
Wherein, on-state voltage value when VGH is booting, VFBP are positive feedback voltage level, and R4 is the resistance value of the 4th resistance,
R5 is the resistance value of the 5th resistance.
During shutdown, trigger signal XON is low level, and the first PMOS transistor Q1 and the second PMOS transistor Q2 are therefore
It is in an open state, draws ground resistance to become the merging resistance of second resistance R2 and the 5th resistance R5 at this time, impedance value is denoted as Ra, described
The on-state voltage that on-state voltage generative circuit finally obtains meets following formula:
VGH '=VFBP* (R4+Ra)/Ra；Ra=R5*R2/ (R5+R2)；
Wherein, on-state voltage value when VGH ' is shutdown, VFBP are positive feedback voltage level, and R2 is the resistance of second resistance
Value, R4 are the resistance value of the 4th resistance, and R5 is the resistance value of the 5th resistance, and Ra is the parallel equivalent of second resistance and the 5th resistance
Resistance value.
The present invention also discloses a kind of displaying panel driving method, includes the following steps:
For display panel under the normal operating condition that is switched on, trigger signal XON is high level, the first PMOS transistor Q1 and the
Two PMOS transistor Q2 are in off state, and positive feedback voltage pin FBP is connect with the 5th resistance R5, and on-state voltage VGH is full
Sufficient following formula:
VGH=VFBP* (R4+R5)/R5；
Wherein, on-state voltage value when VGH is booting, VFBP are positive feedback voltage level, and R4 is the resistance value of the 4th resistance,
R5 is the resistance value of the 5th resistance；
For display panel in the power-offstate, trigger signal XON is low level, the first PMOS transistor Q1 and the 2nd PMOS
Transistor Q2 is in opening state, and second resistance R2 and the 5th resistance R5 are connected side by side, second resistance R2 and the 5th resistance R5
Equivalent impedance value is denoted as Ra, and the on-state voltage that the on-state voltage generative circuit finally obtains meets following formula:
VGH '=VFBP* (R4+Ra)/Ra；Ra=R5*R2/ (R5+R2)；
Wherein, on-state voltage value when VGH ' is shutdown, VFBP are positive feedback voltage level, and R2 is the resistance of second resistance
Value, R4 are the resistance value of the 4th resistance, and R5 is the resistance value of the 5th resistance, and Ra is the parallel equivalent of second resistance and the 5th resistance
Resistance value.
It can thus be appreciated that the effect that the voltage increases module 02 is exactly during shutdown by resistance adjustment to influence ON state
The output of voltage VGH can make on-state voltage VGH when shutdown reach desired design by the adjustment to second resistance R2
Value.
The invention also discloses a kind of displaying panel driving methods to be used for using the on-state voltage generative circuit
It generates on-state voltage adjusted and is inputted thin film transistor (TFT), the on-state voltage increases during shutdown.
The invention also discloses a kind of liquid crystal display devices, comprising: liquid crystal display panel and for connecting liquid crystal display
Any on-state voltage generative circuit of the upper surface of panel.
On-state voltage VGH is adjusted voltage by power circuit non-essential resistance by on-state voltage generative circuit disclosed by the invention
After exported, two PMOS transistors and off signal are combined by this circuit by adding newly-increased circuit, are obtained
The on-state voltage VGH of increase, enable during shutdown thin film transistor (TFT) be substantially discharged, and this newly-increased circuit structure design letter
It is single uncomplicated, excessive data calculation amount will not be increased.
It should be noted that the above is only a preferred embodiment of the present invention, but the present invention is not limited to above-mentioned
Detail in embodiment, it is noted that for those skilled in the art, in technology of the invention
In conception range, various improvements and modifications may be made without departing from the principle of the present invention, to technology of the invention
Scheme carries out a variety of equivalents, these are improved, retouching and equivalents also should be regarded as protection scope of the present invention.
Claims (9)
1. a kind of on-state voltage generative circuit is connected to the outside of power circuit, the power circuit is equipped with driving pin and just
To feedback voltage pin, power circuit exports analog voltage and trigger signal to the on-state voltage generative circuit, and feature exists
In the on-state voltage generative circuit includes: the voltage generation module for exporting on-state voltage, and is connect with voltage generation module
Voltage increase module；
It includes: the first PMOS transistor, the second PMOS transistor, first resistor and second resistance that the voltage, which increases module,；
The trigger signal is input to the grid of first PMOS transistor, and the analog voltage is input to the of first resistor
The source electrode of one end, first PMOS transistor is connected with the second end of first resistor；The drain electrode of first PMOS transistor
Ground connection；
The grid of second PMOS transistor connects the source electrode of first PMOS transistor；Second PMOS transistor
Source electrode is connected with the first end of second resistance, the second end of second resistance with voltage generation module and positive feedback voltage pin
Connection；The grounded drain of second PMOS transistor.
2. on-state voltage generative circuit according to claim 1, which is characterized in that the voltage generation module includes:
Two capacitors, the 6th capacitor, 3rd resistor, the 4th resistance, the 5th resistance, the 6th resistance, the first positive charge pump circuit and second
Positive charge pump circuit；
The analog voltage is input to the first positive charge pump circuit and the second positive charge pump circuit simultaneously；
The first positive charge pump circuit connects the driving pin, the second capacitor, analog voltage, 3rd resistor of power circuit simultaneously
And the second positive charge pump circuit；
The second positive charge pump circuit output on-state voltage and the driving pin of power circuit, the second capacitor, are connected simultaneously
Three resistance and the 4th resistance；
The first end of second capacitor is connect with driving pin, the second end ground connection of the second capacitor；
The analog voltage is input to the first end of 3rd resistor, and the second end of 3rd resistor is connected to the first positive charge pump circuit
And second between positive charge pump circuit；
The first end of 4th resistance connects positive feedback voltage pin, and the first end of the 4th resistance is also connected with the 5th electricity
The first end of resistance is simultaneously grounded via the second end of the 5th resistance, and the second end of the 4th resistance connects the second positive charge pump circuit and defeated
On-state voltage out；
The first end of 6th capacitor and the first end of the 6th resistance are connected and are grounded side by side, the second end of the 6th capacitor
It exports with the second end of the 6th resistance to on-state voltage.
3. on-state voltage generative circuit according to claim 2, which is characterized in that the first positive charge pump circuit includes
First capacitor, the 4th capacitor, first diode and the second diode；
The first end connection driving pin of the first capacitor, the second end of first capacitor connect the anode of the second diode；Institute
The anode for stating first diode connects the first end of the 4th capacitor, and the cathode of first diode connects the anode of the second diode；
The cathode of second diode connects the second end of the 4th capacitor；Analog voltage is input to the first end of the 4th capacitor,
The second end of 4th capacitor is also connected with the second positive charge pump circuit.
4. on-state voltage generative circuit according to claim 3, which is characterized in that the second positive charge pump circuit includes
Third capacitor, the 5th capacitor, third diode and the 4th diode；
The first end connection driving pin of the third capacitor, the second end of third capacitor connect the anode of the 4th diode；Institute
The anode for stating third pole pipe connects the first positive charge pump circuit, and the cathode of third diode connects the anode of the 4th diode；Institute
The cathode for stating the 4th diode connects the first end of the 5th capacitor；Analog voltage is input to the second end of the 5th capacitor, the
The first end of five capacitors is also connected with on-state voltage VGH.
5. on-state voltage generative circuit according to claim 4, which is characterized in that the anode of the third diode connects
The cathode of second diode of the first positive charge pump circuit and the second end of the 4th capacitor.
6. on-state voltage generative circuit according to claim 4, which is characterized in that display panel operates normally shape in booting
Under state, the on-state voltage meets:
VGH=VFBP* (R4+R5)/R5；
Wherein, on-state voltage value when VGH is booting, VFBP are positive feedback voltage level, and R4 is the resistance value of the 4th resistance, and R5 is
The resistance value of 5th resistance.
7. on-state voltage generative circuit according to claim 4, which is characterized in that display panel in the power-offstate, institute
It states the on-state voltage that on-state voltage generative circuit finally obtains and meets following formula:
VGH '=VFBP* (R4+Ra)/Ra；Ra=R5*R2/ (R5+R2)；
Wherein, on-state voltage value when VGH ' is shutdown, VFBP are positive feedback voltage level, and R2 is the resistance value of second resistance, R4
For the resistance value of the 4th resistance, R5 is the resistance value of the 5th resistance, and Ra is the parallel equivalent resistance of second resistance and the 5th resistance
Value.
8. a kind of displaying panel driving method, which is characterized in that generated using on-state voltage as claimed in claim 1
Circuit, for generating on-state voltage adjusted and being inputted thin film transistor (TFT), the on-state voltage increases during shutdown.
9. a kind of display device, comprising: display panel and for connecting the as claimed in claim 1 of display panel
On-state voltage generative circuit.
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| CN201910565760.XA CN110120206A (en) | 2019-06-27 | 2019-06-27 | On-state voltage generative circuit, displaying panel driving method and display panel |
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| CN201910565760.XA CN110120206A (en) | 2019-06-27 | 2019-06-27 | On-state voltage generative circuit, displaying panel driving method and display panel |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111179868A (en) * | 2020-01-21 | 2020-05-19 | 南京中电熊猫平板显示科技有限公司 | Reset signal potential maintaining circuit and method |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102005019256A1 (en) * | 2005-04-26 | 2006-11-16 | Texas Instruments Deutschland Gmbh | Bias power supply for liquid crystal display, has voltage amplifier with several charge pump stages, where one stage comprises reference potential that is based on output signal of DC to DC converter |
| KR20070059457A (en) * | 2005-12-06 | 2007-06-12 | 삼성전자주식회사 | Drive voltage generating module for liquid crystal display |
| CN101329851A (en) * | 2007-06-18 | 2008-12-24 | 三星电子株式会社 | Drive device for LCD device and LCD device including the same |
| CN102982781A (en) * | 2012-12-29 | 2013-03-20 | 深圳市华星光电技术有限公司 | Drive circuit and drive method for liquid crystal display device and liquid crystal display device |
| CN103258515A (en) * | 2013-05-13 | 2013-08-21 | 京东方科技集团股份有限公司 | Gate driving voltage supplying device, supplying method and display device |
| CN108231022A (en) * | 2018-01-05 | 2018-06-29 | 京东方科技集团股份有限公司 | Driving circuit and driving method, the liquid crystal display device of liquid crystal display device |
-
2019
- 2019-06-27 CN CN201910565760.XA patent/CN110120206A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102005019256A1 (en) * | 2005-04-26 | 2006-11-16 | Texas Instruments Deutschland Gmbh | Bias power supply for liquid crystal display, has voltage amplifier with several charge pump stages, where one stage comprises reference potential that is based on output signal of DC to DC converter |
| KR20070059457A (en) * | 2005-12-06 | 2007-06-12 | 삼성전자주식회사 | Drive voltage generating module for liquid crystal display |
| CN101329851A (en) * | 2007-06-18 | 2008-12-24 | 三星电子株式会社 | Drive device for LCD device and LCD device including the same |
| CN102982781A (en) * | 2012-12-29 | 2013-03-20 | 深圳市华星光电技术有限公司 | Drive circuit and drive method for liquid crystal display device and liquid crystal display device |
| CN103258515A (en) * | 2013-05-13 | 2013-08-21 | 京东方科技集团股份有限公司 | Gate driving voltage supplying device, supplying method and display device |
| CN108231022A (en) * | 2018-01-05 | 2018-06-29 | 京东方科技集团股份有限公司 | Driving circuit and driving method, the liquid crystal display device of liquid crystal display device |
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