CN110099023A - Ofdm system receiver sampling frequency offset compensation device and method - Google Patents
Ofdm system receiver sampling frequency offset compensation device and method Download PDFInfo
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- CN110099023A CN110099023A CN201910410374.3A CN201910410374A CN110099023A CN 110099023 A CN110099023 A CN 110099023A CN 201910410374 A CN201910410374 A CN 201910410374A CN 110099023 A CN110099023 A CN 110099023A
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- H04—ELECTRIC COMMUNICATION TECHNIQUE
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- H04L27/00—Modulated-carrier systems
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Abstract
The invention discloses a kind of ofdm system receiver sampling frequency offset compensation device and method, the sampling frequency offset estimation module of the device is for calculating sampling frequency offset estimated value;Farrow filter is used to carry out interpolation or extract operation to sampled signal according to initial samples offset estimation value;Frame synchronization module is used to synchronize detection to the sampled data after interpolation or extract operation by computing cross-correlation;The data real-time detection sample-timing error value that sample-timing error auxiliary detection module is used to be exported according to frame synchronization module, proportional integration module is used to sample-timing error value carrying out ratio and integral operation, Farrow filter is also used to carry out interpolation or extract operation to sampled signal according to the value after the ratio and integral operation, is also used to carry out interpolation or extract operation to sampled signal according to calculated sampling frequency offset estimated value.The ofdm system receiver sampling frequency offset compensation device and method can be improved the accuracy of sampling frequency offset estimation.
Description
Technical field
The present invention relates to wireless communication technology fields, compensate especially with regard to a kind of ofdm system receiver sampling frequency offset
Device and method.
Background technique
Can all there be frequency departure in the crystal oscillator in any communication system between transmitting-receiving node, therefore sampling frequency can be caused
Partially, for the communication system using OFDM technology (orthogonal frequency division multiplexi), even if there are lesser sampling frequency offset, if passed
The duration of defeated frame is longer, and the sampling frequency offset of accumulation will be bigger, to increase the bit error rate for receiving data.Here with electric power
For line carrier communication, Fig. 1 is the frame format schematic diagram of power line carrier communication, and a PPDU (protocol Data Unit) is by preceding
It leads, frame control and load data form.Leading is a cycle sequence, generally comprises 10.5 SYNCP symbols and 2.5
SYNCM symbol has protection interval between each data.
The deviation of sampling clock can transmit the long-time of data and cause fatal influence, simply by the presence of some deviations, i.e.,
Keep channel SNR (signal-to-noise ratio) very high, by the sufficiently long time, it is completely un-decodable to also result in signal.For above-mentioned frame knot
The power-line carrier communication system of structure, only leading since every frame all can independently realize frame synchronization, frame control is several with front
User symbol is higher to the deviation tolerance of sampling clock.
Therefore the receptivity in order to guarantee system, it must be according to the estimated result of sampling frequency offset, to sampling in receiving end
Data carry out frequency deviation compensation, rebuild ideal sampled data, guarantee that subsequent synchronization, demodulation, decoder module effectively work.
The first common frequency bias compensation method carries out interpolation, pumping to sampled signal in time domain using interpolation, decimation filter
It takes.This method generallys use the segmented parabola Polynomial Filter of Farrow structure.This filter is fixed by one group
Coefficient and a series of operations are realized interpolation, are extracted, and realize that sampled data is rebuild.The segmented parabola multinomial of Farrow structure
In interpolation filter, interpolated phase control is according to various modes (for example, MAC layer is by comparing system in BEACON (beacon) frame
Network clocking and the difference of local network clock obtain;Or by determining frequency deviation value to the CP continuous pilot detection in signal;
Or the schemes such as sampling frequency offset value are determined by carrying out cross-correlation test to the synchronization header sequence in signal) SFO that obtains (adopts
Sample frequency deviation) error, the phase deviation of the corresponding known input signal of each output signal is calculated, i.e., integral behaviour is done to frequency error
Make, obtains basic point and the relative position of interpolation.It is (primary thick that the conventional compensation approach usually only carries out primary permanent adjustment to frequency deviation
Adjust, or finely tune again plus once), frequency deviation adjustment is no longer carried out later.This compensation method system that places one's entire reliance upon estimates frequency deviation
Accuracy is counted, and frequency deviation compensation circuit itself only realizes compensation function, itself will not improve the accuracy of offset estimation.Cause
This, compensation effect is not highly desirable sometimes.
Second of common frequency bias compensation method is by the way of directly adjusting phaselocked loop oscillation frequency.This method is exactly will
Frequency offset estimation result is converted into phase-locked loop frequency setting parameter, the parameter setting of phaselocked loop is directly modified, to change phaselocked loop
Oscillation frequency, be consistent it with transmitting terminal frequency, this method is concise, does not need interpolation, decimation filter.But
It is to need high-precision phase-locked loop circuit.Therefore higher cost.Meanwhile also design is realized and brings unnecessary limitation.
The information disclosed in the background technology section is intended only to increase the understanding to general background of the invention, without answering
When being considered as recognizing or imply that the information constitutes the prior art already known to those of ordinary skill in the art in any form.
Summary of the invention
The purpose of the present invention is to provide a kind of ofdm system receiver sampling frequency offset compensation device and methods, can mention
The accuracy of high sampling frequency offset estimation.
To achieve the above object, the present invention provides a kind of ofdm system receiver sampling frequency offset compensation devices comprising:
Memory, sampling frequency offset estimation module, Farrow filter, frame synchronization module, sample-timing error assist detection module, ratio
Integration module.Memory is for storing sampled data;Sampling frequency offset estimation module is used to calculate sampling frequency offset based on beacon frame
Estimated value;Farrow filter is coupled with the memory and the sampling frequency offset estimation module, for according to
Sampling frequency offset estimation module sampling frequency offset estimated value initially set and segmented parabola multinomial algorithm believe the sampling
Number carry out interpolation or extract operation;Frame synchronization module is coupled with the Farrow filter, for passing through computing cross-correlation pair
Sampled data after interpolation or extract operation synchronizes detection;Sample-timing error assists detection module and the frame synchronization mould
Block is coupled, the data real-time detection sample-timing error value for being exported according to the frame synchronization module, the frame synchronization mould
For block when detecting leading symbol synchronous circulating prefix (SYNCP symbol), it is fixed to start the sampling to export pre-locked signal
When error auxiliary detection module work;Proportional integration module and the sample-timing error assist detection module and described
Farrow filter is coupled, for the sample-timing error value to be carried out ratio and integral operation, the Farrow filter
Wave device is also used to according to the value and segmented parabola multinomial after sample-timing error value progress ratio and integral operation
Algorithm carries out interpolation or extract operation to the sampled signal, and the Farrow filter is also used to according to the sampling frequency offset
The calculated sampling frequency offset estimated value of estimation module and segmented parabola multinomial algorithm carry out interpolation to the sampled signal
Or extract operation.
In a preferred embodiment, before the frame synchronization module does not detect the leading symbol synchronous circulating
When sewing, the sampled data for being input to the memory is buffered in half of buffer area of the memory, when the frame synchronization
When module detects the leading symbol synchronous circulating prefix, the sampled data for being input to the memory is buffered in described deposit
In the entire buffer area of reservoir.
In a preferred embodiment, the sample-timing error auxiliary detection module is defeated according to the frame synchronization module
Data real-time detection sample-timing error value out includes: that the sample-timing error assists detection module by each sampling instant
The data in preceding half of sampling period and local synchronous circulating prefix (SYNCP symbol) make computing cross-correlation, and cross-correlation is transported
Data after calculation are put into according to its index value to be carried out accumulating operation after corresponding sliding window and seeks absolute value, then will be sought
Each absolute value be added again after divided by carry out computing cross-correlation all data total number obtain the first average value;Institute
Sample-timing error auxiliary detection module is stated by the data in half of sampling period after each sampling instant and local synchronous circulating
Prefix (SYNCP symbol) makees computing cross-correlation, and the data after computing cross-correlation are put into corresponding sliding according to its index value
Accumulating operation is carried out after window and seeks absolute value, it is mutual divided by carrying out after being then added each absolute value sought again
The total number for closing all data of operation obtains the second average value;First average value and second average value are subjected to phase
Subtract to obtain the sample-timing error value.
In a preferred embodiment, when signal-to-noise ratio is lower than certain value and the sampling frequency offset estimation module calculates institute
When stating sampling frequency offset estimated value, the sample-timing error auxiliary detection module is closed, Farrow filter is according to calculated
The sampling frequency offset estimated value and segmented parabola multinomial algorithm carry out interpolation or extract operation to the sampled signal.
The present invention also provides a kind of ofdm system receiver sampling frequency offset compensation methodes comprising: sampled data is defeated
Enter into memory;Sampling frequency offset estimation module is based on beacon frame and calculates sampling frequency offset estimated value;Farrow filter is according to institute
Sampling frequency offset estimation module sampling frequency offset estimated value initially set and segmented parabola multinomial algorithm are stated to the sampling
Signal carries out interpolation or extract operation;Frame synchronization module to the Farrow filter interpolation or extracts fortune by computing cross-correlation
Sampled data after calculation synchronizes detection, and when detecting leading symbol synchronous circulating prefix, exports pre-locked signal;It adopts
Sample timing error is real-time according to the data of frame synchronization module output after assisting detection module to receive the pre-locked signal
Detect sample-timing error value;The sample-timing error value is carried out ratio and integral operation by proportional integration module;It is described
Farrow filter carries out the value after ratio and integral operation according to the sample-timing error value and segmented parabola is multinomial
Formula algorithm carries out interpolation or extract operation to the sampled signal, and the Farrow filter is estimated according to the sampling frequency offset
Count the calculated sampling frequency offset estimated value of module and segmented parabola multinomial algorithm to the sampled signal carry out interpolation or
Extract operation.
In a preferred embodiment, sampled data is input in memory includes: when the frame synchronization module does not have
When detecting the leading symbol synchronous circulating prefix, the sampled data for being input to the memory is buffered in the storage
In half of buffer area of device, when the frame synchronization module detects the leading symbol synchronous circulating prefix, it is input to described
The sampled data of memory is buffered in the entire buffer area of the memory.
In a preferred embodiment, the sample-timing error auxiliary detection module is defeated according to the frame synchronization module
Data real-time detection sample-timing error value out includes: that the sample-timing error assists detection module by each sampling instant
The data in preceding half of sampling period and local synchronous circulating prefix (SYNCP symbol) make computing cross-correlation, and cross-correlation is transported
Data after calculation are put into according to its index value to be carried out accumulating operation after corresponding sliding window and seeks absolute value, then will be sought
Each absolute value be added again after it is average to obtain first divided by the total number for all data for carrying out computing cross-correlation
Value;The sample-timing error auxiliary detection module is synchronous with local by the data in half of sampling period after each sampling instant
Cyclic prefix (SYNCP symbol) makees computing cross-correlation, and the data after computing cross-correlation are put into accordingly according to its index value
Accumulating operation is carried out after sliding window and seeks absolute value, divided by progress after being then added each absolute value sought again
The total number of all data of computing cross-correlation is to obtain the second average value;First average value is averaged with described second
Value subtract each other obtaining the sample-timing error value.
In a preferred embodiment, ofdm system receiver sampling frequency offset compensation method further include: work as signal-to-noise ratio
Lower than certain value and when the sampling frequency offset estimation module calculates the sampling frequency offset estimated value, closes the sampling timing and miss
Difference auxiliary detection module, Farrow filter is according to the calculated sampling frequency offset estimated value and segmented parabola multinomial
Algorithm carries out interpolation or extract operation to the sampled signal.
Compared with prior art, ofdm system receiver sampling frequency offset compensation device and method according to the present invention use
The segmented parabola polynomial interopolation filter scheme of Farrow structure, the sampling frequency offset value on the one hand based on beacon frame estimation
Interpolation, extraction processing are carried out to input data;On the other hand, sample-timing error auxiliary detection module exports frame synchronization module
Data carry out specially treated, using a kind of different from traditional Timing Error Detection scheme, i.e., to frame synchronization module export number
According to being delayed, being segmented, do double sliding window computing cross-correlations of suitable length, then subtract each other again, and be filtered to result is subtracted each other,
To obtain real-time sample-timing error auxiliary information, and using the sample-timing error information to the interpolation of Farrow filter
Phase carries out auxiliary adjustment in real time, and the present invention based on the sampling frequency offset value and real-time sampling timing that beacon frame is estimated by that will be missed
Poor auxiliary information is used in combination with, and neither requires to be inserted into continuous pilot signal in the signal, also not single dependence beacon frame
Or sample-timing error detection is carried out to signal, there is better frequency deviation compensation effect compared with traditional frequency deviation compensation scheme
Fruit.
Detailed description of the invention
Fig. 1 is the frame format schematic diagram of power line carrier communication according to prior art;
Fig. 2 is ofdm system receiver sampling frequency offset compensation device according to an embodiment of the present invention;
Fig. 3 is sample-timing error aided detection algorithms block diagram according to an embodiment of the present invention.
Specific embodiment
With reference to the accompanying drawing, specific embodiments of the present invention will be described in detail, it is to be understood that guarantor of the invention
Shield range is not limited by the specific implementation.
Unless otherwise explicitly stated, otherwise in entire disclosure and claims, term " includes " or its change
Changing such as "comprising" or " including " etc. will be understood to comprise stated element or component, and not exclude other members
Part or other component parts.
Various present in traditional frequency deviation compensation scheme in order to overcome the problems, such as, the present invention provides a kind of receptions of ofdm system
Machine sampling frequency offset compensation device and method, using the segmented parabola polynomial interopolation filter scheme of Farrow structure, one
Aspect carries out interpolation to input data based on the sampling frequency offset value that beacon frame is estimated, extraction is handled;On the other hand, sampling timing is missed
Difference auxiliary detection module carries out specially treated to the data that frame synchronization module exports, using a kind of different from traditional timing error
Detection scheme, i.e., double sliding window computing cross-correlations of be delayed, be segmented to frame synchronization module output data, done suitable length, so
Subtract each other again afterwards, and be filtered to result is subtracted each other, to obtain real-time sample-timing error auxiliary information, and it is fixed using the sampling
When control information auxiliary adjustment in real time is carried out to the interpolated phase of Farrow filter.The present invention based on beacon frame by that will be estimated
Sampling frequency offset value be used in combination with real-time sample-timing error auxiliary information, neither require to be inserted into the signal continuous
Pilot signal, also not single dependence beacon frame or sample-timing error detection is carried out to signal, is compensated with traditional frequency deviation
Scheme, which is compared, has better frequency deviation compensation effect.
Here using power line carrier communication as one embodiment of the invention, the present invention will be described.But the present invention is unlimited
In power-line carrier communication system, the present invention is applicable in the frequency deviation compensation application of all ofdm communication systems with leader sequence.
As shown in Fig. 2, in one embodiment, ofdm system receiver sampling frequency offset compensation device include: memory 10,
Sampling frequency offset estimation module 11, Farrow filter 12, frame synchronization module 13, sample-timing error auxiliary detection module 14, ratio
Example integration module 15.
Memory 10 is for storing sampled data.In one embodiment, the present invention is according to the state of frame synchronization module 13,
Input data is buffered in half of buffer or entire buffer, specifically, when frame synchronization module 13 does not reach leading
When symbol cyclic prefix, the sampled data of input circular buffer in half buffer, when leading symbol cyclic prefix occurs, after
The sampled data of continuous input circular buffer in entire buffer, it is defeated when available frame count can be effectively avoided in this way according to reaching
Enter to cache buffer or will overflow, to improve communication success rate.Specifically, memory 10 can be using dual-port
DP512X12SRAM (Static RAM).
Sampling frequency offset estimation module 11 is for calculating sampling frequency offset estimated value based on beacon frame.Specifically, sampling frequency offset
Estimated value can be obtained by comparing the difference of grid clock and local network clock in beacon frame.
Farrow filter 12 is coupled with memory 10 and sampling frequency offset estimation module 11, for according to sampling frequency
Inclined estimated value and segmented parabola multinomial algorithm carry out interpolation or extract operation to sampled signal.
Frame synchronization module 13 and Farrow filter 12 is coupled, for passing through computing cross-correlation to interpolation or extract operation
Sampled data afterwards synchronizes detection.Frame synchronization module 13 is also used to detect leading symbol synchronous circulating prefix SYNCP, and
When detecting leading symbol synchronous circulating prefix SYNCP, it is fixed to start sampling to export pre-locked signal pre-lock signal
When error auxiliary detection module 14 work.
Sample-timing error auxiliary detection module 14 is coupled with frame synchronization module 13, for defeated according to frame synchronization module 13
Data real-time detection sample-timing error value out.
Proportional integration module 15 assists detection module 14 and Farrow filter 12 to be coupled with sample-timing error,
For sample-timing error value to be carried out ratio and integral operation.Farrow filter 12 is also used to according to the sample-timing error
Value and segmented parabola multinomial algorithm after being worth carry out ratio and integral operation carry out interpolation or extract to transport to sampled signal
It calculates.
In one embodiment, the frequency bias compensation method of above-mentioned ofdm system receiver sampling frequency offset compensation device is such as
Under:
First after sampling frequency offset compensation device is enabled, receives data and be written into a dual-port DP512X12SRAM
In, with the write-in of data, the data being written before are read and are shifted again from the buffer by the beginning of Farrow filter 12
Into 5 grades of shift buffer, as data move in displacement buffer, Farrow filter 12 is according to initially setting
Fixed sampling frequency estimated value SFO value (initially setting SFO=0) carries out interpolation, extraction operation to the data in displacement buffer,
Data in 5 grades of shift buffer are the input datas of real Farrow filter 12.The SFO value is positive and means to insert
Value Operations, being negative means extraction operation, and the interpolation and extraction operation equal to 0 Farrow filter 12 depend on sampling timing
The output of error auxiliary detection module 14.
Then input data is buffered in half by sampling frequency offset compensation device according to the synchronous regime of frame synchronization module 13
In buffer DP512X12 or entire buffer DP512X12, i.e., frame synchronization module 13 does not reach leading symbol cyclic prefix
When, it is recycled in half of buffer, when leading symbol cyclic prefix occurs, recycles in entire buffer, can have in this way
Effect is avoided when real leader sequence SYNCP is reached, and input-buffer buffer is or the case where will overflow.Cause
It can not know when that leader sequence SYNCP symbol reaches for sampling frequency offset compensation device, module can only be ceaselessly according to MAC
The sampling frequency offset estimated value SFO of layer setting carries out interpolation or extract operation, but after carrying out long-time interpolation arithmetic, input
The buffer data size of buffer will be more than the data volume read from buffer, when the data volume exceeded is greater than buffer depth
It will overflow.Entanglement will be occurred and may cause this communication failure by receiving data.The length for choosing above-mentioned half buffer is
It is calculated according to maximum SFO value, can satisfy the length of input data buffer memory caused by the sampling frequency offset of a whole frame,
In the present embodiment, calculate according to SFO maximum 120ppm (hundred a ten thousandths): when system uses 50Mhz clock, data frame length is
After SFO value of 689652*2, the Farrow filter 12 by sampling frequency offset estimation module 11 carries out interpolation, the sampling point on both sides is inclined
Difference is 689652*2*120=165.5, i.e., therefore 166 data points of most interpolation or extraction select 256 buffer length
Fully meet requirement.After switching scheme using above-mentioned half and entire buffer, when leader sequence SYNCP is reached, at least
The caching depth (depth 256) of half of buffer is available, thus, effectively avoid the generation of spillover.
Secondly, one side input data is entire when frame synchronization module 13 reaches leading symbol cyclic prefix
Recycled in DP512X12buffer, another aspect frame synchronization module 13 start start sample-timing error assist detection module 14 into
Row Timing Error Detection.Sample-timing error assist detection module 14 based on frame synchronization module 13 export at 180 degree phase difference
Two paths of data Do_0 25Mhz-T/2 and Do_1 25Mhz in the first circuit-switched data Do_0 25Mhz-T/2 detected.
Do_0 25Mhz-T/2 is the sampling in half of sampling period before current sample time, and sample frequency 25MHz, Do_1 25Mhz are
The sampling of current sample time.
In one embodiment, sample-timing error aided detection algorithms block diagram is as shown in Figure 3: first to Do_0@
25Mhz-T/2 one 25MHz sampling period of delay obtains Do_0@25Mhz+T/2, then, Do_0@25Mhz-T/2 and Do_0@
25Mhz+T/2 does appropriate length of window sliding computing cross-correlation with local SYNCP sequence respectively, and operation is indexed in input data
When for 1~m (m be select a positive integer), it is segmented and is taken absolute value to increase the size of operation result, finally, two-way
Sliding cross-correlation output is averaged and subtracts each other, and obtains sample-timing error value.
Specifically, it includes: that sampling timing is missed that sample-timing error auxiliary detection module 14, which calculates sample-timing error value,
Difference auxiliary detection module 14 is synchronous with local by the data Do_0 25Mhz-T/2 in half of sampling period before each sampling instant
Cyclic prefix makees computing cross-correlation, and the data after computing cross-correlation are put into corresponding sliding window (this according to its index value
In embodiment, indexing can be put into a window for the data of 1~m, and the data of other call numbers can be put into another window
In) carry out accumulating operation afterwards and seek absolute value (Abs), divided by progress after then each absolute value sought is added again
The total number k of all data of computing cross-correlation is to obtain the first average value;Sample-timing error assists detection module 14 will
The data Do_0 25Mhz+T/2 in half of sampling period and local synchronous circulating prefix SYNCP sequence are made after each sampling instant
Computing cross-correlation, and by the data after computing cross-correlation according to its index value be put into corresponding sliding window (in present embodiment,
Index be 1~m data can be put into a window, the data of other call numbers can be put into another window) after carry out it is tired
Add operation and seek absolute value, divided by all of progress computing cross-correlation after being then added each absolute value sought again
The total number of data is to obtain the second average value;First average value and the second average value subtract each other obtaining sampling and determined
When error amount Te.
Finally after obtaining sample-timing error value Te, which is fed back to the ratio to sampling frequency offset compensation device in real time
Integration module 15 carries out ratio and integral operation, operation result later are exported to Farrow filter 12, Farrow filter
12 carry out interpolation or extract operation to sampled signal according to the operation result, using segmented parabola multinomial algorithm.If
Sampling frequency offset estimation module 11 has calculated SFO at this time, then carries out interpolated phase control to Farrow filter 12 by SFO
System, i.e. Farrow filter 12 carry out interpolation or extraction to sampled signal according to SFO, using segmented parabola multinomial algorithm
Operation.In the present embodiment, the SFO estimated based on beacon frame and sample-timing error auxiliary information are used in combination with,
Without relying solely on alternative one.
It assists detection module 14 to fight sampling frequency deviation by sample-timing error to be obviously improved.The prior art
In, since the one side beacon frame period is longer, need to receive enough beacon frames, system can just estimate SFO;On the other hand
Under extremely low signal-to-noise ratio, beacon frame itself possibly can not be correctly received, and system can not all be estimated in time under both of these case
SFO is counted out, but this programme assists the aided timing error information pair of the generation of detection module 14 by sample-timing error
12 interpolated phase of Farrow filter is adjusted in real time, and can preferably improve frame control data is decoded into power, is accelerated
The capture of grid clock and SFO estimation, avoid the shortcomings that prior art is using only SFO scheme is estimated based on beacon frame.
In one embodiment, frequency bias compensation method further include: when signal-to-noise ratio is lower than certain value and sampling frequency offset estimates mould
When block 11 calculates sampling frequency offset estimated value, closes sample-timing error and assist detection module 14,12 basis of Farrow filter
Calculated sampling frequency offset estimated value and segmented parabola multinomial algorithm carry out interpolation or extract operation to sampled signal.?
In the case where extremely low signal-to-noise ratio, sample-timing error assists the possible detection effect of detection module 14 to be deteriorated, therefore in this item
Under part, sample-timing error assists detection module 14 only before terminal searching beacon frame obtains grid clock and SFO estimation
It uses, help to improve frame control data is decoded into power, the capture of acceleration system network clocking, after estimating SFO
Sample-timing error auxiliary detection module 14 can be closed, directly Farrow is filtered using the SFO estimated based on beacon frame
Device 12 carries out interpolated phase control, and sampling frequency offset correction accuracy can be improved.
To sum up, the ofdm system receiver sampling frequency offset compensation device of present embodiment and method will be by that will be based on beacon frame
The sampling frequency offset value of estimation combines with real-time sample-timing error auxiliary information, carries out interpolation phase to Farrow filter
Position control, neither requires to be inserted into continuous pilot signal in the signal, also not single dependence beacon frame or adopts to signal
Sample Timing Error Detection filters Farrow by real-time sample-timing error auxiliary information before SFO estimated value is calculated
Wave device carries out interpolated phase control, and help to improve frame control data is decoded into power, the capture of acceleration system network clocking,
After estimating SFO, it can directly use based on the SFO of beacon frame estimation and interpolated phase control is carried out to Farrow filter
System, can be improved sampling frequency offset correction accuracy, have better frequency deviation compensation effect compared with traditional frequency deviation compensation scheme.
It should be understood by those skilled in the art that, embodiments herein can provide as method, system or computer program
Product.Therefore, complete hardware embodiment, complete software embodiment or reality combining software and hardware aspects can be used in the application
Apply the form of example.Moreover, it wherein includes the computer of computer usable program code that the application, which can be used in one or more,
The computer program implemented in usable storage medium (including but not limited to magnetic disk storage, CD-ROM, optical memory etc.) produces
The form of product.
The application is referring to method, the process of equipment (system) and computer program product according to the embodiment of the present application
Figure and/or block diagram describe.It should be understood that every one stream in flowchart and/or the block diagram can be realized by computer program instructions
The combination of process and/or box in journey and/or box and flowchart and/or the block diagram.It can provide these computer programs
Instruct the processor of general purpose computer, special purpose computer, Embedded Processor or other programmable data processing devices to produce
A raw machine, so that being generated by the instruction that computer or the processor of other programmable data processing devices execute for real
The device for the function of being specified in present one or more flows of the flowchart and/or one or more blocks of the block diagram.
These computer program instructions, which may also be stored in, is able to guide computer or other programmable data processing devices with spy
Determine in the computer-readable memory that mode works, so that it includes referring to that instruction stored in the computer readable memory, which generates,
Enable the manufacture of device, the command device realize in one box of one or more flows of the flowchart and/or block diagram or
The function of being specified in multiple boxes.
These computer program instructions also can be loaded onto a computer or other programmable data processing device, so that counting
Series of operation steps are executed on calculation machine or other programmable devices to generate computer implemented processing, thus in computer or
The instruction executed on other programmable devices is provided for realizing in one or more flows of the flowchart and/or block diagram one
The step of function of being specified in a box or multiple boxes.
The aforementioned description to specific exemplary embodiment of the invention is in order to illustrate and illustration purpose.These descriptions
It is not wishing to limit the invention to disclosed precise forms, and it will be apparent that according to the above instruction, can much be changed
And variation.The purpose of selecting and describing the exemplary embodiment is that explaining specific principle of the invention and its actually answering
With so that those skilled in the art can be realized and utilize a variety of different exemplary implementation schemes of the invention and
Various chooses and changes.The scope of the present invention is intended to be limited by claims and its equivalents.
Claims (8)
1. a kind of ofdm system receiver sampling frequency offset compensation device characterized by comprising
Memory, for storing sampled data;
Sampling frequency offset estimation module, for calculating sampling frequency offset estimated value based on beacon frame;
Farrow filter is coupled, for adopting according to the memory and the sampling frequency offset estimation module
Sample frequency deviation estimating modules sampling frequency offset estimated value initially set and segmented parabola multinomial algorithm are to the sampled signal
Carry out interpolation or extract operation;
Frame synchronization module is coupled with the Farrow filter, after passing through computing cross-correlation to interpolation or extract operation
Sampled data synchronize detection;
Sample-timing error assists detection module, is coupled with the frame synchronization module, for defeated according to the frame synchronization module
Data real-time detection sample-timing error value out, the frame synchronization module are also used to detect leading symbol synchronous circulating prefix,
And when detecting the leading symbol synchronous circulating prefix, pre-locked signal is exported to start the sample-timing error auxiliary
Detection module work;And
Proportional integration module assists detection module and the Farrow filter to be coupled with the sample-timing error,
For being also used to sample-timing error value progress ratio and integral operation, the Farrow filter according to the sampling
Timing error value carries out the value after ratio and integral operation and segmented parabola multinomial algorithm carries out the sampled signal
Interpolation or extract operation, and the Farrow filter is also used to according to the calculated sampling frequency of the sampling frequency offset estimation module
Inclined estimated value and segmented parabola multinomial algorithm carry out interpolation or extract operation to the sampled signal.
2. ofdm system receiver sampling frequency offset compensation device as described in claim 1, which is characterized in that when the frame synchronization
When module does not detect the leading symbol synchronous circulating prefix, the sampled data for being input to the memory is buffered in institute
It states in half of buffer area of memory, when the frame synchronization module detects the leading symbol synchronous circulating prefix, input
Sampled data to the memory is buffered in the entire buffer area of the memory.
3. ofdm system receiver sampling frequency offset compensation device as described in claim 1, which is characterized in that the sampling timing
The data real-time detection sample-timing error value that is exported according to the frame synchronization module of error auxiliary detection module includes:
Sample-timing error auxiliary detection module is same by the data in half of sampling period before each sampling instant and local
Step cyclic prefix makees computing cross-correlation, and after the data after computing cross-correlation are put into corresponding sliding window according to its index value
It carries out accumulating operation and seeks absolute value, divided by progress computing cross-correlation after being then added each absolute value sought again
All data total number obtain the first average value;
Sample-timing error auxiliary detection module is same by the data in half of sampling period after each sampling instant and local
Step cyclic prefix makees computing cross-correlation, and after the data after computing cross-correlation are put into corresponding sliding window according to its index value
It carries out accumulating operation and seeks absolute value, divided by progress computing cross-correlation after being then added each absolute value sought again
All data total number obtain the second average value;And
First average value and second average value subtract each other to obtain the sample-timing error value.
4. ofdm system receiver sampling frequency offset compensation device as described in claim 1, which is characterized in that when signal-to-noise ratio is lower than
Certain value and when the sampling frequency offset estimation module calculates the sampling frequency offset estimated value, it is auxiliary to close the sample-timing error
Detection module is helped, Farrow filter is according to the calculated sampling frequency offset estimated value and segmented parabola multinomial algorithm
Interpolation or extract operation are carried out to the sampled signal.
5. a kind of ofdm system receiver sampling frequency offset compensation method characterized by comprising
Sampled data is input in memory;
Sampling frequency offset estimation module is based on beacon frame and calculates sampling frequency offset estimated value;
Farrow filter is according to sampling frequency offset estimation module sampling frequency offset estimated value initially set and segmented parabolic
Line multinomial algorithm carries out interpolation or extract operation to the sampled signal;
Frame synchronization module carries out the sampled data after the Farrow filter interpolation or extract operation by computing cross-correlation
Synchronous detection, and when detecting leading symbol synchronous circulating prefix, export pre-locked signal;
Sample-timing error auxiliary detection module receives the number exported after the pre-locked signal according to the frame synchronization module
According to real-time detection sample-timing error value;
The sample-timing error value is carried out ratio and integral operation by proportional integration module;And
The Farrow filter carries out the value and segmented throwing after ratio and integral operation according to the sample-timing error value
Object line multinomial algorithm carries out interpolation or extract operation to the sampled signal, and the Farrow filter is adopted according to
The calculated sampling frequency offset estimated value of sample frequency deviation estimating modules and segmented parabola multinomial algorithm to the sampled signal into
Row interpolation or extract operation.
6. ofdm system receiver sampling frequency offset compensation method as claimed in claim 5, which is characterized in that sampled data is defeated
Enter and includes: into memory
When the frame synchronization module does not detect the leading symbol cyclic prefix, it is input to the hits of the memory
According in half of buffer area for being buffered in the memory, when the frame synchronization module detects the leading symbol synchronous circulating
When prefix, the sampled data for being input to the memory is buffered in the entire buffer area of the memory.
7. ofdm system receiver sampling frequency offset compensation method as claimed in claim 5, which is characterized in that the sampling timing
The data real-time detection sample-timing error value that is exported according to the frame synchronization module of error auxiliary detection module includes:
Sample-timing error auxiliary detection module is same by the data in half of sampling period before each sampling instant and local
Step cyclic prefix makees computing cross-correlation, and after the data after computing cross-correlation are put into corresponding sliding window according to its index value
It carries out accumulating operation and seeks absolute value, divided by progress computing cross-correlation after being then added each absolute value sought again
All data total number to obtain the first average value;
Sample-timing error auxiliary detection module is same by the data in half of sampling period after each sampling instant and local
Step cyclic prefix makees computing cross-correlation, and after the data after computing cross-correlation are put into corresponding sliding window according to its index value
It carries out accumulating operation and seeks absolute value, divided by progress computing cross-correlation after being then added each absolute value sought again
All data total number to obtain the second average value;And
First average value and second average value subtract each other to obtain the sample-timing error value.
8. ofdm system receiver sampling frequency offset compensation method as claimed in claim 5, which is characterized in that the ofdm system connects
Receipts machine sampling frequency offset compensation method further include:
When signal-to-noise ratio is lower than certain value and the sampling frequency offset estimation module calculates the sampling frequency offset estimated value, institute is closed
Sample-timing error auxiliary detection module is stated, Farrow filter is according to the calculated sampling frequency offset estimated value and segmented
Parabola multinomial algorithm carries out interpolation or extract operation to the sampled signal.
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