CN110079787B - Method for surfactant-assisted vapor phase growth of III-V semiconductor nanowire - Google Patents
Method for surfactant-assisted vapor phase growth of III-V semiconductor nanowire Download PDFInfo
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- CN110079787B CN110079787B CN201910400878.7A CN201910400878A CN110079787B CN 110079787 B CN110079787 B CN 110079787B CN 201910400878 A CN201910400878 A CN 201910400878A CN 110079787 B CN110079787 B CN 110079787B
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/301—AIII BV compounds, where A is Al, Ga, In or Tl and B is N, P, As, Sb or Bi
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
Abstract
The invention relates to a method for growing small-diameter and high-performance III-V group semiconductor nanowires by using a surfactant to assist gas phase growth, which comprises the following steps: growing by adopting a dual-temperature-zone vapor phase method; the dual-temperature area comprises a source area and a growth area, wherein III-V semiconductor source materials are placed in the source area and used for providing source materials; the substrate covered with the Au film catalyst is placed in the growth area and used for growing the nanowire; and a surfactant is placed between the source region and the growth region and used for improving the nanowire. The invention can prepare III-V group nanowires with the diameter less than 10nm and simultaneously realize the control of the diameter and the electrical property of the III-V group nanowires. Meanwhile, the chemical vapor deposition method adopted by the invention for preparing the III-V group nanowire has simple conditions and low cost. The adopted surfactant only forms chemical bonds with the V group elements on the surface of the growing nanowire and is not doped into the nanowire.
Description
Technical Field
The invention relates to a method for growing small-diameter and high-performance III-V semiconductor nanowires by using a surfactant to assist gas phase growth, belonging to the field of preparation of low-dimensional photoelectric materials.
Background
One-dimensional nanowires (10 diameter) thanks to a unique geometry and dimensions-9Meter-scale, aspect ratio greater than 1000) can be used for exploring novel physical and chemical phenomena which cannot be observed in a plurality of macroscopic worlds, such as quantum tunneling effect, small-size effect and the like, and has important research significance and development prospect in the fields of next-generation photoelectricity, electrochemistry, sensors, quantum computing and the like. In recent years, the mobility (hole mobility: mu) due to the p-type silicon materialh ≈ 480 cm2V-1s-1) At the low dimensional scale, moore's law has developed with unprecedented difficulty in highly integrated circuits. Scientists in the "post-morgan" phase are pursuing solutions to overcome the enormous difficulties faced by moore's law in small sizes. Among the many proposed solutions, the search for new channel materials with higher mobility to implement fully wrapped-gate nanowire field effect transistors is recognized as one of the most efficient approaches (Jes-A. del Alamo. 2011 nanometer-scale electronics with III-V compounds semiconductors Nature. 479.317.). Gallium antimonide (GaSb) due to its group III-V semiconductorHole mobility (mu) ofh ≈ 1000 cm2V-1s-1) (Dey A W, Svensson J, Borg B M, Ek M and Wernersson L-E.2012 Single InAs/GaSb nanowire low-power CMOS inverter. Nano Lett. 12.5593-7.) is considered one of the best semiconductor materials to replace p-type silicon in future microelectronic circuits. Due to the Gibbs-Tomas effect and the skin effect of antimony (Sb) atoms (Ek M, Borg B M, Johansson J and Dick K A.2013. Diameter limitation in growth of III-Sb-relating nanomagnesium ACS Nano No. 7.3668-75; Anyebe E A, Rajbatch M K, Veal T D, Jin C J, Wang Z M and Zhuang Q D. 2015. surface effect of anti-activity addition to the morphology of self-catalyzed InAs1−xSbxnanowires, Nano res, 8.1309-19.), which strongly affects the surface energy and interfacial energy, reduces the migration length of atoms, resulting in uncontrollable radial growth, making it difficult to realize small-diameter, high-performance GaSb nanowires in high-temperature gas-phase preparation methods, and greatly limiting the practical application of GaSb materials in next-generation microelectronic devices.
As is well known, the surfactant is the key for regulating the nano material by a liquid phase method, but the surfactant is not reported to be used in a high-temperature gas phase process, and the invention is provided for the purpose.
Disclosure of Invention
Aiming at the defects of the prior art, particularly the difficulty in realizing the preparation of small-diameter and high-performance III-V group semiconductor nanowires in a high-temperature gas phase method, the invention provides a method for growing the high-performance III-V group semiconductor nanowires by using a surfactant as an auxiliary gas phase. The surfactant forms a stable chemical bond with the five (V) group elements on the surface of the growing nanowire, effectively inhibits the radial growth of the nanowire, reduces the diameter, can also influence the interaction between the surface energy and the interface energy of the nanowire, realizes the controllability of the diameter and the electrical property of the nanowire, and has the advantages of simple operation and low cost.
The technical scheme of the invention is as follows:
a method of surfactant assisted vapor growth of small diameter, high performance group III-V semiconductor nanowires comprising:
growing by adopting a dual-temperature-zone vapor phase method; the dual-temperature area comprises a source area and a growth area, wherein III-V semiconductor source materials are placed in the source area and used for providing source materials; the substrate covered with the Au film catalyst is placed in the growth area and used for growing the nanowire;
and a surfactant is placed between the source region and the growth region and used for improving the nanowire.
According to the present invention, it is preferable that the temperature of the source region is 690-900 deg.C and the temperature of the growth region is 510-600 deg.C. The temperature of the source region is controlled within 690-900 ℃, so that the decomposition and supply of source materials are ensured, the temperature of the growth region is controlled within 510-600 ℃, so that the state of the catalyst is liquid, and the nanowire grows according to a gas-liquid-solid (VLS) growth mode.
According to the invention, preferably, before the temperature rise growth, the double-temperature area is vacuumized and then protective gas is introduced; further preferably, the protective gas is H2The purity is 99.9995%; vacuum pumping is carried out to 10-3And Torr, and the time for introducing the protective gas is 20-40 minutes.
According to the present invention, it is preferable that the temperature increase rate of the temperature increase to the temperature required for the source region and the growth region is not less than 60 ℃/min.
According to the invention, preferably, the III-V group semiconductor source material is GaSb or GaAs, the purity is 99.999%, and the III-V group semiconductor source material is in a powder form and has a particle size of less than or equal to 100 meshes.
According to the invention, preferably, said surfactant is in the form of elemental powder, preferably a chalcogen, more preferably S, Se or Te.
According to the invention, preferably, the substrate is Si/SiO2A substrate; preferably, the thickness of the Au film catalyst is 0.1-12 nm.
According to the present invention, it is preferable that the distance of the III-V semiconductor source material from the substrate covered with the Au film catalyst is 15 cm; the distance between the surfactant and the substrate covered with the Au film catalyst was 9 cm.
According to the invention, the growth time is preferably 20-60 min; and after the growth is finished, simultaneously stopping heating the source region and the growth region and gradually cooling to room temperature.
In accordance with the present invention, the surfactant assisted vapor growth method of small diameter, high performance group III-V semiconductor nanowires, a preferred embodiment, comprises the steps of:
(1) adopting a double-temperature-zone horizontal tube furnace, placing a boron nitride crucible containing GaSb or GaAs powder in an upstream source zone at a distance of 15cm from a substrate for growing nanowires, and placing a Si/SiO in a downstream growth zone covered with an Au film catalyst with the thickness of 0.1-12 nm2The substrate is used for growing the nanowires, and the boron nitride crucible containing the surfactant S, Se or Te powder is placed between the two temperature zones and is 9cm away from the substrate used for growing the nanowires;
(2) pumping the pressure of the tube furnace to 10-3Torr and H was applied for 30 minutes2Protective gas;
(3) heating the temperature of the source region to 690-900 ℃, heating the temperature of the growth region to 510-600 ℃, and growing for 20-60 min;
(4) and after the growth is finished, stopping heating the source region and the growth region and gradually cooling to room temperature.
The method adopts chalcogenide material as surfactant to regulate and control the structure and performance of the III-V semiconductor nanowire for the first time in a high-temperature gas phase process, and obtains the III-V semiconductor nanowire with small diameter and high performance by inhibiting the growth of the side surface of the nanowire and carrying out surface state passivation in real time.
The invention has the beneficial effects that:
the invention can prepare III-V group nanowires with the diameter less than 10nm and simultaneously realize the control of the diameter and the electrical property of the III-V group nanowires. Meanwhile, the Chemical Vapor Deposition (CVD) method adopted by the invention for preparing the III-V group nanowire has simple conditions and low cost. The adopted surfactant only forms chemical bonds with the V group elements on the surface of the growing nanowire and is not doped into the nanowire.
Drawings
FIG. 1 is a schematic diagram of the modification of nanowires using a surfactant according to the present invention.
Fig. 2 is a scanning electron micrograph of GaSb nanowires prepared before and after the improvement of the surfactant in example 1 of the present invention.
FIG. 3 is a statistical graph showing the diameter distribution before and after the modification of the surfactant in example 1 of the present invention.
Fig. 4 is a statistical diagram of the hole mobility distribution of GaSb nanowires before and after the improvement of the surfactant in example 1 of the present invention.
Fig. 5 is a scanning electron micrograph of GaAs nanowires without surfactant modification.
FIG. 6 is a SEM image of GaAs nanowires modified by the surfactant S in example 2.
FIG. 7 is a scanning electron micrograph of GaAs nanowires of example 3 modified with Se as a surfactant.
FIG. 8 is a SEM image of GaAs nanowires modified by the surfactant Te in example 4.
FIG. 9 is a statistical graph of the diameter distribution before and after modification with different surfactants in examples 2, 3 and 4.
Fig. 10 is a graph of the electrical properties of GaAs nanowires modified with different surfactants in examples 2, 3, and 4.
Detailed Description
The present invention is further illustrated by, but is not limited to, the following specific examples.
The samples described in the examples are Si/SiO for growing nanowires2A substrate.
Example 1
Adopting a double-temperature-zone horizontal tube furnace, placing a boron nitride crucible containing 0.5g of GaSb powder in an upstream source zone at a distance of 15cm from a sample, placing a boron nitride crucible containing 0.5g of surfactant S powder between the GaSb powder and a growth zone at a distance of 9cm from the sample, and covering a Si/SiO film with a thickness of 0.1nm on an Au film2The substrate is arranged in the middle of the downstream temperature zone and is used for growing the nanowire. Pumping the pressure of the tube furnace to 10-3Torr and H was applied for 30 minutes2The flow rate was 200 sccm. The source region temperature was raised to 750 deg.C, the growth region temperature was raised to 550 deg.C, and the growth was carried out for 25 min. And after the growth is finished, simultaneously stopping heating the source region and the growth region and gradually cooling to room temperature.
The improvement principle of the surfactant is shown in fig. 1, and S atoms form chemical bonds with Sb atoms on the surface of the nanowire, so that the radial growth of the nanowire is inhibited.
Example 2
Adopting a double-temperature-zone horizontal tube furnace, placing a boron nitride crucible containing 0.6g of GaAs powder in an upstream source region at a distance of 15cm from a sample, placing a boron nitride crucible containing 0.6g of surfactant S powder in the middle of a source material and a growth region at a distance of 9cm from the sample, and covering a Si/SiO film of a 12nm Au film2The substrate is arranged in the middle of the downstream temperature zone and is used for growing the nanowire. Pumping the pressure of the tube furnace to 10-3Torr and H was applied for 30 minutes2The flow rate was 100 sccm. The temperature of the source region is raised to 820 ℃, the temperature of the growth region is raised to 600 ℃ and the growth is carried out for 1 h. And after the growth is finished, stopping heating the source region and the growth region and gradually cooling to room temperature.
Example 3
Adopting a double-temperature-zone horizontal tube furnace, placing a boron nitride crucible containing 0.5g of GaAs powder in an upstream source region at a distance of 15cm from a sample, placing a boron nitride crucible containing 0.5g of surfactant Se powder in the middle of a source material and a growth region at a distance of 9cm from the sample, and covering a Si/SiO film of a 12nm Au film2The substrate is arranged in the middle of the downstream temperature zone and is used for growing the nanowire. Pumping the pressure of the tube furnace to 10-3Torr and H was applied for 30 minutes2The flow rate was 200 sccm. The temperature of the source region is raised to 850 ℃, the temperature of the growth region is raised to 600 ℃ and the growth is carried out for 1 h. And after the growth is finished, stopping heating the source region and the growth region and gradually cooling to room temperature.
Example 4
Adopting a double-temperature-zone horizontal tube furnace, placing a boron nitride crucible containing 0.4g of GaAs powder in an upstream source zone at a distance of 15cm from a sample, placing a boron nitride crucible containing 0.5g of surfactant Te powder in the middle of a source material and a growth zone at a distance of 9cm from the sample, and covering a Si/SiO of 12nm Au film2The substrate is arranged in the middle of the downstream temperature zone and is used for growing the nanowire. Pumping the pressure of the tube furnace to 10-3Torr and H was applied for 30 minutes2The flow rate was 300 sccm. The temperature of the source region is increased to 850 ℃, the temperature of the growth region is increased to 580 ℃, and the growth period is 1 h. After the growth is finished, the source region and the growth region are stoppedStopping heating and gradually cooling to room temperature.
Test example 1
Scanning electron micrographs of GaSb nanowires prepared before and after the modification of the surfactant in example 1 are shown in fig. 2. The diameter distribution before and after the modification of the surfactant is shown in FIG. 3.
As can be seen from fig. 2 and 3, the diameter of GaSb nanowires without surfactant modification is 219 ± 53 nm, while the diameter of GaSb nanowires with S surfactant modification is 28 ± 9 nm. It can be seen that the diameter of the nanowires is significantly reduced using surfactant modification.
The statistical graph of the hole mobility distribution of the GaSb nanowires before and after the surfactant modification in example 1 is shown in fig. 4, and it can be seen from fig. 4 that, in terms of electrical properties, the mobility of the GaSb nanowires after the surfactant modification can reach up to 200 cm at most2V-1s-1The mobility of the GaSb nanowire which is not improved by the surfactant is only 40 cm at the maximum2V-1s-1。
Test example 2
Scanning electron micrographs of GaAs nanowires not modified with surfactant were tested as shown in fig. 5.
Example 2 scanning electron micrograph of GaAs nanowire modified with surfactant S, as shown in fig. 6.
Example 3 scanning electron micrograph of GaAs nanowire after being modified with surfactant Se, as shown in fig. 7.
Example 4 scanning electron micrograph of GaAs nanowire modified with surfactant Te, as shown in fig. 8.
The diameter distribution before and after modification with different surfactants in examples 2, 3 and 4 is shown in FIG. 9.
As can be seen from FIGS. 5 to 9, the diameter range of the GaAs nanowires without surfactant modification was 76.1. + -. 49.9 nm, the diameter range of the GaAs nanowires modified with S surfactant was 36.9. + -. 8.6nm, the diameter range of the GaAs nanowires modified with Se surfactant was 29.9. + -. 7.3nm, and the diameter range of the GaAs nanowires modified with Te surfactant was 26.2. + -. 6.6 nm. It can be seen that the diameter of the nanowires is significantly reduced using surfactant modification.
The GaAs nanowires modified by different surfactants in examples 2, 3, and 4 were tested for electrical properties, as shown in fig. 10. As can be seen from fig. 10, the electrical properties can also be modulated by selecting different surfactants. The GaAs nanowire improved with the S surfactant exhibits p-type conductivity, the GaAs nanowire improved with the Se surfactant has a reduced p-type conductivity and exhibits insulator characteristics, and the GaAs nanowire improved with the Te surfactant exhibits n-type conductivity due to Te atom doping into the nanowire to provide electrons.
Claims (6)
1. A method of surfactant assisted vapor growth of group III-V semiconductor nanowires comprising:
growing by adopting a dual-temperature-zone vapor phase method; the dual-temperature area comprises a source area and a growth area, wherein III-V semiconductor source materials are placed in the source area and used for providing source materials; the substrate covered with the Au film catalyst is placed in the growth area and used for growing the nanowire;
a surfactant is placed between the source region and the growth region and used for improving the nanowire and inhibiting the radial growth of the nanowire;
the temperature interval of the source region is 690-900 ℃, and the temperature interval of the growth region is 510-600 ℃; the surfactant is S, Se or Te in the form of simple substance powder;
the III-V group semiconductor source material is GaSb or GaAs, is in a powder form, and has the grain diameter of less than or equal to 100 meshes;
the substrate is Si/SiO2A substrate.
2. The method of claim 1, wherein the dual temperature zone is evacuated before elevated temperature growth and then a shielding gas is introduced, the shielding gas being H2。
3. The method of claim 1, wherein the rate of temperature increase to the temperature required for the source and growth regions is greater than or equal to 60 ℃/min.
4. The method of surfactant assisted vapor growth of group III-V semiconductor nanowires of claim 1, wherein the Au film catalyst has a thickness of 0.1-12 nm.
5. The method of surfactant assisted vapor growth of group III-V semiconductor nanowires of claim 1, wherein the distance of the group III-V semiconductor source material from the substrate covered with Au film catalyst is 15 cm; the distance between the surfactant and the substrate covered with the Au film catalyst was 9 cm.
6. The method of surfactant assisted vapor growth of group III-V semiconductor nanowires of claim 1, wherein the growth time is 20-60 min; and after the growth is finished, simultaneously stopping heating the source region and the growth region and gradually cooling to room temperature.
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