CN110071200B - Resonant cavity light emitting diode and manufacturing method thereof - Google Patents

Resonant cavity light emitting diode and manufacturing method thereof Download PDF

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CN110071200B
CN110071200B CN201910215605.5A CN201910215605A CN110071200B CN 110071200 B CN110071200 B CN 110071200B CN 201910215605 A CN201910215605 A CN 201910215605A CN 110071200 B CN110071200 B CN 110071200B
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CN110071200A (en
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顾俊
胡任浩
胡加辉
周飚
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HC Semitek Corp
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H01L33/105—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector with a resonant cavity structure
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
    • H01L33/465—Reflective coating, e.g. dielectric Bragg reflector with a resonant cavity structure
    • H—ELECTRICITY
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Abstract

The invention discloses a resonant cavity light-emitting diode and a manufacturing method thereof, belonging to the technical field of semiconductors. The resonant cavity light-emitting diode comprises a substrate, and an N-type layer, an active layer, a P-type layer, a transparent conducting layer and a passivation layer which are sequentially stacked on the substrate, wherein P-type electrodes are arranged on the P-type layer and the transparent conducting layer, N-type electrodes are arranged on the N-type layer, one surface of the substrate, which is far away from the N-type layer, is provided with a lower reflector layer, and an upper reflector layer is arranged on the passivation layer. At this time, the requirement of high reflectivity of the lower reflector can be met by increasing the doping concentration of Al in GaN. Because the lower reflector layer is arranged on the surface of the substrate far away from the N-type layer, the epitaxial quality of the RCLED is not influenced by improving the concentration of Al.

Description

Resonant cavity light emitting diode and manufacturing method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to a resonant cavity light-emitting diode and a manufacturing method thereof.
Background
A Resonant Cavity Light Emitting Diode (RCLED) is a novel Light Emitting Diode (LED) structure, which has the advantages of a conventional LED and a vertical Cavity surface laser (VCSEL), has a good application value and a broad market prospect, and is currently used in the field of optical fiber communication.
The basic structure of an RCLED includes an upper mirror layer, a lower mirror layer, an active layer sandwiched between the upper and lower mirror layers, and a conductive electrode. The upper mirror layer and the lower mirror layer are usually composed of an AlGaN layer and a GaN layer which are alternately stacked, or an InAlGaN layer and a GaN layer which are alternately stacked.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
for RCLEDs that emit light from above, the upper mirror layer has a lower reflectivity than the lower mirror layer. The existing lower reflector layer meets the requirement of high reflectivity of the lower reflector layer mainly by improving the doping concentration of Al in GaN, but the high doping concentration Al can influence the epitaxial quality of the RCLED, so that the crystal lattice mismatch of the RCLED is caused, a large number of dislocations and defects occur, and the application of the RCLED is greatly influenced.
Disclosure of Invention
The embodiment of the invention provides a resonant cavity light-emitting diode and a manufacturing method thereof, which can ensure the epitaxial quality of an RCLED while improving the reflectivity of a lower reflector. The technical scheme is as follows:
in one aspect, the invention provides a resonant cavity light-emitting diode, which comprises a substrate, and an N-type layer, an active layer, a P-type layer, a transparent conductive layer and a passivation layer which are sequentially stacked on the substrate, wherein P-type electrodes are arranged on the P-type layer and the transparent conductive layer, an N-type electrode is arranged on the N-type layer,
and a lower reflector layer is arranged on one surface of the substrate, which is far away from the N-type layer, and an upper reflector layer is arranged on the passivation layer.
Furthermore, a plurality of triangular pits are formed in one surface, provided with the lower reflecting mirror layer, of the substrate and one surface, provided with the upper reflecting mirror layer, of the passivation layer, and part of the lower reflecting mirror layer are located on the side walls of the triangular pits.
Further, every the width of triangle pit is 2.7 ~ 2.8um, and the degree of depth is 1.6 ~ 1.8um, and inclination is 70 ~ 80.
Further, the distance between the central lines of two adjacent triangular pits is 2.9-3.1 um.
In another aspect, the present invention provides a method for manufacturing a resonant cavity light emitting diode, the method comprising:
sequentially growing an N-type layer, an active layer and a P-type layer on a substrate;
forming a groove extending from the P-type layer to the N-type layer on the P-type layer;
forming a transparent conductive layer on the P-type layer;
forming a passivation layer on the transparent conductive layer and the N-type layer;
forming an upper mirror layer on the passivation layer;
etching the upper reflector layer, the passivation layer and the transparent conducting layer to expose the P-type layer, the transparent conducting layer and the N-type layer;
arranging a P-type electrode on the P-type layer and the transparent conductive layer, and arranging an N-type electrode on the N-type layer;
and forming a lower reflector layer on one surface of the substrate far away from the N-type layer.
Further, the forming a lower mirror layer on a side of the substrate away from the N-type layer includes:
arranging a plurality of triangular pits on one surface of the substrate, which is far away from the N-type layer;
and forming a lower reflector layer on one surface of the substrate far away from the N-type layer and on the side wall of the triangular pit.
Further, the forming an upper mirror layer on the passivation layer includes:
arranging a plurality of triangular pits on one surface of the passivation layer far away from the substrate;
and forming an upper reflecting mirror layer on one surface of the passivation layer far away from the substrate and on the side wall of the triangular pit.
Further, every the width of triangle pit is 2.7 ~ 2.8um, the degree of depth is 1.6 ~ 1.8um, and inclination is 70 ~ 80.
Further, the distance between the central lines of two adjacent triangular pits is 2.9-3.1 um.
Further, before forming a lower mirror layer on a side of the substrate away from the N-type layer, the manufacturing method further includes:
and thinning the substrate.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
the lower reflector layer is arranged on the surface, far away from the N-type layer, of the substrate, and the requirement of high reflectivity of the lower reflector can be met by increasing the doping concentration of Al in GaN. Because the lower reflector layer is arranged on the surface of the substrate far away from the N-type layer, the epitaxial quality of the RCLED is not influenced by improving the concentration of Al.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a resonant cavity light emitting diode according to an embodiment of the present invention;
fig. 2 is a flowchart of a method for manufacturing a resonant cavity light emitting diode according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a resonant cavity light emitting diode according to an embodiment of the present invention, and as shown in fig. 1, the resonant cavity light emitting diode includes a substrate 1, and an N-type layer 2, an active layer 3, a P-type layer 4, a transparent conductive layer 5, and a passivation layer 6 sequentially stacked on the substrate 1, where the P-type layer 4 and the transparent conductive layer 5 are both provided with a P-type electrode 7, and the N-type layer 2 is provided with an N-type electrode 8.
An upper reflector layer 9 is arranged on the passivation layer 6, and a lower reflector layer 10 is arranged on one surface of the substrate 1 far away from the N-type layer 2.
According to the embodiment of the invention, the lower reflector layer is arranged on the surface of the substrate far away from the N-type layer, so that the requirement of high reflectivity of the lower reflector can be met by increasing the doping concentration of Al in GaN. Because the lower reflector layer is arranged on the surface of the substrate far away from the N-type layer, the epitaxial quality of the RCLED is not influenced by improving the concentration of Al.
Further, a plurality of upper triangular pits 6a are arranged on the surface of the passivation layer 6 provided with the upper mirror layer 9, and part of the upper mirror layer 9 is positioned on the side walls of the plurality of upper triangular pits 6 a.
A plurality of lower triangular pits 1a are arranged on one surface of the substrate 1 provided with the lower reflector layer 10, and part of the lower reflector layer 10 is positioned on the side walls of the lower triangular pits 6 a.
Because the existing RCLED without the triangular pit can vertically emit light after passing through the reflecting layer, and then part of reflected light can be absorbed by the active layer after passing through the active layer, so that the light emitting efficiency of the RCLED is low. Therefore, the reflective layer is arranged on the triangular pits to form a diffuse reflection structure, so that reflected light passing through the upper reflector layer and the lower reflector layer is emitted from all directions, the probability of absorption of the reflected light by the active layer is reduced, and the light emitting efficiency of the RCLED is improved. Meanwhile, the surface roughness of the substrate and the passivation layer is increased by arranging the triangular pits, and compared with a smooth planar surface, the surface provided with the triangular pits has higher adhesiveness, so that the falling-off of the upper reflecting mirror layer and the lower reflecting mirror layer can be reduced.
Optionally, as shown in fig. 1, the width d of each triangular pit is 2.7-2.8 um, the height h is 1.6-1.8 um, and the inclination angle θ is 70-80 ℃. In this case, the RCLED has the highest light emission efficiency and the RCLED has the best light emission efficiency.
Further, the distance L between the central lines of two adjacent triangular pits is 2.9-3.1 um.
In the present embodiment, each of the upper mirror layer 9 and the lower mirror layer 10 includes a plurality of alternately stacked AlGaN layers and GaN layers, or alternately stacked InAlGaN layers and GaN layers.
In another mode of realisation of the invention, the upper mirror layer 9 and the lower mirror layer 10 each comprise a plurality of alternately stacked Ti3O5Layer and SiO2And (3) a layer. Ti3O5Will decompose into Ti simple substance more than the oxide of the rest Ti and can react with O2Fully react to form TiO2And is beneficial to the high-efficiency utilization of Ti. Wherein, Ti3O5The layer being of a high refractive index material, SiO2The layers are low index materials.
Optionally, the number of layers of the upper mirror layer 9 and the lower mirror layer 10 is equal, and each layer is 48 layers.
Optionally, the thicknesses of the upper mirror layer 9 and the lower mirror layer 10 are the same and are both 3.7-4.7 um.
Preferably, the upper mirror layer 9 and the lower mirror layer 10 are both 4.2um thick.
Optionally, the last SiO layer of the upper mirror layer 9 and the lower mirror layer 102The thickness of the layer was 5000 angstroms.
Optionally, the distance D between the upper and lower mirror layers0The following formula can be satisfied:
Figure BDA0002001968030000041
where k is an odd number and Σ i is λ when all values are taken for i0/niThe sum, i, taking different values to represent the different layers between the upper mirror layer 9 and the lower mirror layer 10, λ0Generating a central wavelength of light, n, for a resonant cavity light emitting diodeiThe refractive indices of the layers between the upper mirror layer 9 and the lower mirror layer 10.
It is readily appreciated that the condition for forming a resonant cavity is to form a standing wave which requires the reflected wave to cancel the outgoing wave, i.e. the reflected wave is out of phase with the reflected wave by pi. Since the wavelength/refractive index is the equivalent wavelength of light in a medium and k is an odd number, the distance between the upper mirror layer 9 and the lower mirror layer 10 is equal to 1/2 wavelength, 3/2 wavelength, 5/2 wavelength, and the like, and the condition of the resonant cavity (the phase difference of the reflected wave and the reflected wave is pi) can be satisfied.
Specifically, the N-type layer 2 is an N-type GaN layer, the active layer 3 includes InGaN layers and GaN layers alternately stacked, and the P-type layer 4 is a P-type GaN layer.
Alternatively, the substrate 1 may be a 002-plane sapphire substrate, a SiC substrate, or a Si substrate.
Alternatively, the material used for the transparent conductive layer 5 may include at least one of Indium Tin Oxide (ITO), fluorine-doped tin oxide (FTO), graphene, and zinc oxide (ZnO).
Preferably, the material used for the transparent conductive layer 5 may be ITO, and the most commonly used material is ITO.
Alternatively, the thickness of the passivation layer 6 may be 10nm to 500 nm.
Preferably, the thickness of the passivation layer 6 may be 80 nm.
Optionally, the material used for the passivation layer 6 may include at least one of silicon oxide, silicon nitride, aluminum oxide, and magnesium fluoride, so as to protect the light emitting diode, avoid the problems of reverse leakage, and improve the reliability of the light emitting diode.
Preferably, the passivation layer 6 may be silicon oxide, so that the electrode is formed by opening a hole using an etching solution.
Alternatively, the material used for the P-type electrode 7 may include at least one of gold, silver, aluminum, nickel, platinum, and titanium.
Preferably, the P-type electrode 7 may be a chromium layer, an aluminum layer, a chromium layer, a titanium layer, and a chromium layer stacked in sequence to be suitable for contact, reflection, conduction, and the like.
Alternatively, the material used for the N-type electrode 8 may include at least one of gold, silver, aluminum, chromium, nickel, platinum, and titanium.
Fig. 2 is a flowchart of a method for manufacturing a resonant cavity light emitting diode according to an embodiment of the present invention, and as shown in fig. 2, the method includes:
step 201, growing an N-type layer, an active layer and a P-type layer on a substrate in sequence.
Alternatively, the substrate 1 may be a 002-plane sapphire substrate.
Specifically, the N-type layer 2 is an N-type GaN layer, the active layer 3 includes InGaN layers and GaN layers alternately stacked, and the P-type layer 4 is a P-type GaN layer.
Specifically, the step 201 may include:
an N-type layer 2, an active layer 3 and a P-type layer 4 are sequentially grown on a substrate 1 by adopting a Metal-organic chemical vapor Deposition (MOCVD) technology.
In another implementation manner of this embodiment, step 201 may include:
forming at least one AlN buffer layer on the substrate 1;
an N-type layer 2, an active layer 3, and a P-type layer 4 are sequentially formed on the AlN buffer layer.
It can be understood that forming the AlN buffer layer between the substrate 1 and the N-type layer 2 first facilitates the growth of the N-type layer 2, the active layer 3, and the P-type layer 4, improving the crystal quality.
Step 202, forming a groove extending from the P-type layer to the N-type layer on the P-type layer.
Specifically, this step 202 may include:
and forming a groove extending from the P-type layer 4 to the N-type layer 2 on the P-type layer 4 by adopting a photoetching process.
More specifically, opening a groove extending from the P-type layer 4 to the N-type layer 2 on the P-type layer 4 by using a photolithography process may include:
forming a layer of photoresist on the P-type layer 4;
exposing and developing the photoresist to form the photoresist with a set pattern;
under the protection of photoresist, a groove extending from the P-type layer 4 to the N-type layer 2 is formed on the P-type layer 4 by adopting an inductively Coupled Plasma etching (ICP) technology;
and stripping the photoresist.
The depth of the groove is larger than the sum of the thicknesses of the P-type layer 4 and the active layer 3, and the depth of the groove is smaller than the sum of the thicknesses of the P-type layer 4, the active layer 3 and the N-type layer 2.
Step 203, a transparent conductive layer is formed on the P-type layer.
Alternatively, the material used for the transparent conductive layer may include at least one of Indium Tin Oxide (ITO), fluorine-doped tin oxide (FTO), graphene, and zinc oxide (ZnO).
Preferably, the material used for the transparent conductive layer can be ITO, and the most commonly used material is ITO.
Specifically, the step 203 may include:
forming a transparent conducting layer 5 on the N-type layer 2, the groove and the P-type layer 4 by adopting a Physical Vapor Deposition (PVD for short);
the transparent conductive layer 5 on the N-type layer 2 is removed using a photolithographic process, leaving the transparent conductive layer 5 on the P-type layer 4.
More specifically, removing transparent conductive layer 5 on N-type layer 2 using a photolithography process, leaving transparent conductive layer 5 on P-type layer 4, may include:
forming a layer of photoresist on the transparent conductive layer 5;
exposing and developing the photoresist to form the photoresist with a set pattern;
under the protection of the photoresist with a set pattern, carrying out corrosion cleaning on the transparent conducting layer 5, and leaving the transparent conducting layer 5 on the P-type layer 4;
and stripping the photoresist.
And step 204, forming a passivation layer on the transparent conductive layer and the N-type layer.
Alternatively, the thickness of the passivation layer 6 may be 10nm to 500 nm.
Preferably, the thickness of the passivation layer 6 may be 80 nm.
Optionally, the passivation layer 6 may include at least one of silicon oxide, silicon nitride, aluminum oxide, and magnesium fluoride, so as to protect the RCLED, avoid the problems of reverse leakage, and improve the reliability of the RCLED.
Preferably, the passivation layer 6 may be silicon oxide, so that the electrode is formed by opening a hole using an etching solution.
Specifically, the step 205 may include:
a passivation layer 6 is formed on the N-type layer 4 and the transparent conductive layer 5 by a Plasma Enhanced Chemical Vapor Deposition (PECVD) technique.
Step 205, an upper mirror layer is formed on the passivation layer.
Optionally, in conjunction with fig. 1, step 205 includes:
a plurality of upper triangular pits 6a are arranged on one surface of the passivation layer 6, which is far away from the substrate 1;
an upper mirror layer 9 is formed on a side of the passivation layer 6 remote from the substrate 1 and on sidewalls of the upper triangular pits 6 a.
Further, the width d of each upper triangular pit 6a is 2.7-2.8 um, the height h is 1.6-1.8 um, and the inclination angle theta is 70-80 ℃. In this case, the RCLED has the highest light emission efficiency and the RCLED has the best light emission efficiency.
Further, the distance L between the central lines of two adjacent triangular pits 6a is 2.9-3.1 um.
In the present embodiment, the upper mirror layer 9 includes a plurality of AlGaN layers and GaN layers alternately stacked, or InAlGaN layers and GaN layers alternately stacked.
Optionally, the upper mirror layer 9 includes a plurality of alternately laminated Ti3O5Layer and SiO2And (3) a layer.
And step 206, etching the upper reflector layer, the passivation layer and the transparent conducting layer to expose the P-type layer, the transparent conducting layer and the N-type layer.
Specifically, step 206 may include:
forming a layer of photoresist on the upper mirror layer 9;
dissolving part of the photoresist by adopting a photoetching process;
and under the protection of the photoresist, performing ICP (inductively coupled plasma) etching on the upper reflecting mirror layer 9 to form a through hole which extends from the upper reflecting mirror layer 9 to the transparent conducting layer 5 and is connected with the P-type layer 4 and a through hole which extends from the upper reflecting mirror layer 9 to the N-type layer 2.
And step 207, arranging a P-type electrode on the P-type layer and the transparent conductive layer, and arranging an N-type electrode on the N-type layer.
Alternatively, the material used for the P-type electrode 7 may include at least one of gold, silver, aluminum, nickel, platinum, and titanium.
Preferably, the P-type electrode 7 may be a chromium layer, an aluminum layer, a chromium layer, a titanium layer, and a chromium layer stacked in sequence to be suitable for contact, reflection, conduction, and the like.
Alternatively, the material used for the N-type electrode 8 may include at least one of gold, silver, aluminum, chromium, nickel, platinum, and titanium.
Preferably, the electrodes can be formed using evaporation techniques at a faster rate.
Alternatively, the electrode may also be formed using a sputtering technique.
Further, after the step 207 is executed and before the step 208 is executed, the manufacturing method may further include:
and thinning the substrate to improve the heat dissipation effect of the chip.
Optionally, the substrate may be thinned to 180-.
And step 208, forming a lower reflecting mirror layer on one surface of the substrate far away from the N-type layer.
Specifically, in conjunction with fig. 1, step 208 may include:
arranging a plurality of triangular pits on one surface of the substrate, which is far away from the N-type layer;
and forming a lower reflecting mirror layer on one surface of the substrate far away from the N-type layer and on the side wall of the triangular pit.
Further, the width d of each triangular pit is 2.7-2.8 um, the height h is 1.6-1.8 um, and the inclination angle theta is 70-80 ℃.
Further, the distance L between the central lines of two adjacent triangular pits is 2.9-3.1 um.
In the present embodiment, the lower mirror layer includes a plurality of AlGaN layers and GaN layers alternately stacked, or InAlGaN layers and GaN layers alternately stacked.
Optionally, the lower mirror layer comprises a plurality of alternately stacked Ti3O5Layer and SiO2And (3) a layer.
According to the embodiment of the invention, the lower reflector layer is arranged on the surface of the substrate far away from the N-type layer, so that the requirement of high reflectivity of the lower reflector can be met by increasing the doping concentration of Al in GaN. Because the lower reflector layer is arranged on the surface of the substrate far away from the N-type layer, the epitaxial quality of the RCLED is not influenced by improving the concentration of Al.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent replacements, improvements, etc. within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (7)

1. The utility model provides a resonant cavity emitting diode, resonant cavity emitting diode includes the substrate and stacks gradually N type layer, active layer, P type layer, transparent conducting layer, passivation layer on the substrate, P type layer with all be equipped with P type electrode on the transparent conducting layer, be equipped with N type electrode on the N type layer, its characterized in that:
a lower reflector layer is arranged on one surface of the substrate, which is far away from the N-type layer, an upper reflector layer is arranged on the passivation layer, and the upper reflector layer and the lower reflector layer respectively comprise a plurality of alternately stacked AlGaN layers and GaN layers or alternately stacked InAlGaN layers and GaN layers;
the doping concentration of Al in the lower reflecting mirror layer is greater than that of Al in the upper reflecting mirror layer;
the substrate be equipped with down on the one side of speculum layer and the passivation layer be equipped with all be equipped with a plurality of triangle pits on the one side of going up the speculum layer, part down speculum layer and part down the speculum layer is located on the lateral wall of triangle pit.
2. The resonant cavity light-emitting diode of claim 1, wherein each of the triangular pits has a width of 2.7-2.8 um, a depth of 1.6-1.8 um, and an inclination angle of 70-80 °.
3. The resonant cavity light-emitting diode of claim 1, wherein the distance between the central lines of two adjacent triangular pits is 2.9-3.1 um.
4. A method of fabricating a resonant cavity light emitting diode, the method comprising:
sequentially growing an N-type layer, an active layer and a P-type layer on a substrate;
forming a groove extending from the P-type layer to the N-type layer on the P-type layer;
forming a transparent conductive layer on the P-type layer;
forming a passivation layer on the transparent conductive layer and the N-type layer;
arranging a plurality of triangular pits on one surface of the passivation layer far away from the substrate;
forming an upper reflecting mirror layer on one surface of the passivation layer far away from the substrate and on the side wall of the triangular pit;
etching the upper reflector layer, the passivation layer and the transparent conducting layer to expose the P-type layer, the transparent conducting layer and the N-type layer;
arranging a P-type electrode on the P-type layer and the transparent conductive layer, and arranging an N-type electrode on the N-type layer;
arranging a plurality of triangular pits on one surface of the substrate, which is far away from the N-type layer;
forming a lower reflector layer on one surface of the substrate far away from the N-type layer and on the side wall of the triangular pit;
the upper reflector layer and the lower reflector layer respectively comprise a plurality of AlGaN layers and GaN layers which are alternately stacked, or InAlGaN layers and GaN layers which are alternately stacked;
the doping concentration of Al in the lower reflecting mirror layer is greater than that of Al in the upper reflecting mirror layer.
5. The manufacturing method according to claim 4, wherein each of the triangular pits has a width of 2.7 to 2.8um, a depth of 1.6 to 1.8um, and an inclination angle of 70 to 80 °.
6. The manufacturing method according to claim 4, wherein the distance between the center lines of two adjacent triangular pits is 2.9-3.1 um.
7. The manufacturing method according to claim 4, wherein before forming a lower mirror layer on a side of the substrate away from the N-type layer, the manufacturing method further comprises:
and thinning the substrate.
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