CN110048302B - Vertical cavity surface emitting laser array based on superlattice heterostructure and preparation method thereof - Google Patents

Vertical cavity surface emitting laser array based on superlattice heterostructure and preparation method thereof Download PDF

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CN110048302B
CN110048302B CN201910340539.4A CN201910340539A CN110048302B CN 110048302 B CN110048302 B CN 110048302B CN 201910340539 A CN201910340539 A CN 201910340539A CN 110048302 B CN110048302 B CN 110048302B
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oxidation
hole
limiting layer
laser array
superlattice
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CN110048302A (en
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关宝璐
张峰
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Beijing University of Technology
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/024—Arrangements for thermal management
    • H01S5/02461—Structure or details of the laser chip to manipulate the heat flow, e.g. passive layers in the chip with a low heat conductivity
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • H01S5/18308—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
    • H01S5/18322—Position of the structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/185—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only horizontal cavities, e.g. horizontal cavity surface-emitting lasers [HCSEL]
    • H01S5/187—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only horizontal cavities, e.g. horizontal cavity surface-emitting lasers [HCSEL] using Bragg reflection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
    • H01S5/42—Arrays of surface emitting lasers
    • H01S5/423—Arrays of surface emitting lasers having a vertical cavity
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S2304/00—Special growth methods for semiconductor lasers

Abstract

A vertical cavity surface emitting laser array based on a superlattice heterostructure and a preparation method thereof belong to the field of optoelectronics. The array structure mainly comprises a lower electrode, a substrate, a superlattice, a lower DBR, an active region, an oxidation limiting layer, a silicon dioxide passivation layer, an upper DBR and an upper electrode from bottom to top. The invention utilizes the thermoelectric anisotropy of the superlattice, electrons are emitted in the superlattice through thermoelectrons, so that the heat generated by the laser is easier to conduct in the vertical and horizontal directions, the integral temperature of the laser is reduced, the thermal uniformity of the laser array is improved, the integral temperature of the laser array is further reduced, the temperature difference among all laser units in the array is reduced, and the light output characteristic of the laser array is improved.

Description

Vertical cavity surface emitting laser array based on superlattice heterostructure and preparation method thereof
Technical Field
The invention relates to a semiconductor laser and a thermoelectric property of a superlattice, in particular to a vertical cavity surface emitting laser array based on a superlattice heterostructure and a preparation method thereof.
Background
The Vertical Cavity Surface Emitting Laser (VCSEL) is a semiconductor laser with the light emitting direction perpendicular to the substrate direction, and compared with the traditional edge emitting laser, the vertical cavity surface emitting laser has the advantages of low threshold, low divergence angle, small volume, low power consumption, easiness in two-dimensional integration, capability of on-chip testing and the like.
With the development of information technology, a parallel optical network system with higher speed and wider bandwidth is important, and a two-dimensional integrated optical device is an important technology. The light emitting direction of the traditional edge-emitting laser is parallel to the substrate, only a one-dimensional array can be formed, and two-dimensional integration is difficult to realize due to the difficulty in coupling the light beam with the optical fiber. And the Vertical Cavity Surface Emitting Laser (VCSEL) is easy to realize two-dimensional integration because the light emitting direction of the VCSEL is vertical to the substrate, and meanwhile, the VCSEL can realize on-chip test and reduce the manufacturing cost.
The performance of the VCSEL, such as threshold current, wavelength peak, mode characteristic, etc., is closely related to temperature, and for the VCSEL array, the heat generation of the individual lasers affect each other, which results in inconsistent temperatures of different lasers, and further inconsistent performance of different lasers in the same array, which deteriorates the uniformity of the laser array, and thus an effective measure is needed to improve the thermal distribution in the VCSEL array.
Disclosure of Invention
In view of the above disadvantages of the laser array, the present invention provides a method for fabricating a laser array, which can reduce the temperature better and improve the thermal distribution of the laser array.
The superlattice refrigerator is based on a thermionic exchange principle, after voltage is applied, electrons on one side cross a potential barrier in a mode of thermionic emission, and in order to maintain quasi-Fermi distribution, the electrons on the side can absorb energy from the crystal lattice to realize refrigeration, and meanwhile, the electron dredging mode does not collide with an impurity scattering center, so that little Joule heat is generated. As shown in fig. 12, compared with the conventional structure (a), the two-dimensional electron gas in the new structure (b) superlattice can increase the longitudinal and transverse thermal conductivities of heat in the superlattice, which not only reduces the overall temperature of the laser array, but also makes the temperatures of the individual lasers in the array consistent by the transverse conduction of heat, improves the thermal uniformity, and can effectively inhibit the thermal reflow due to the lower thermal conductivity of the superlattice.
In the structure of the present invention, the superlattice is positioned between the N-type DBR and the substrate by Metal Organic Chemical Vapor Deposition (MOCVD).
The structure of the vertical cavity surface emitting laser array based on the superlattice heterostructure of the invention is shown in fig. 1. The structure mainly comprises a laser array back electrode (1), a semiconductor substrate (2), a superlattice (3), a lower DBR (4), a first limiting layer (5), an active region (6) and a second limiting layer (5 ') from bottom to top, wherein a laser array is distributed on the upper surface of the second limiting layer (5'); the laser array is as follows: an array of oxidation holes (8) is distributed on the upper surface of the second limiting layer (5 '), an oxidation limiting layer (7) is arranged around each oxidation hole (8) on the upper surface of the second limiting layer (5'), and an upper DBR (10) is arranged above each oxidation hole (8) and the oxidation limiting layer (7), namely each upper DBR (10) simultaneously and correspondingly covers the oxidation hole (8) and the oxidation limiting layer (7); and a silicon dioxide passivation layer (9) covers the rest upper surface of the second limiting layer (5'), the side surfaces of the oxidation holes (8), the side surfaces of the oxidation limiting layers (7) and the upper surface of the oxidation limiting layers (7), the silicon dioxide passivation layer (9) is provided with a hole on the upper surface of each oxidation limiting layer (7), the hole structure covers the corresponding oxidation hole (8), a front electrode (11) is arranged on the surface of the oxidation limiting layer (7) corresponding to each oxidation hole (8) array unit, the front electrode (11) is provided with a hole on the upper surface of the oxidation limiting layer (7), the hole of the front electrode (11) covers the oxidation hole (8), the hole of the front electrode (11) is vertically overlapped with the hole of the oxidation limiting layer (7), and the front electrode (11) covers the empty periphery of the oxidation limiting layer (7).
In the structure, the passivation layer (9) is silicon dioxide, the back electrode (1) and the front electrode (11) are gold, the rest structures are made of semiconductor materials, oxidized parts in the oxidation limiting layer become insulating, unoxidized parts are still conductive, and oxidation holes are formed.
The invention also provides a preparation method of the vertical cavity surface emitting laser array based on the superlattice heterostructure, which comprises the following steps: the laser arrays may be distributed in a variety of ways including, but not limited to, circular, square, diamond, etc.
(1) A superlattice is grown on a semiconductor substrate by Metal Organic Chemical Vapor Deposition (MOCVD), and then a corresponding lower DBR, an active region, an oxidation limiting layer and an upper DBR are sequentially grown.
(2) Photoetching a laser array on the epitaxial wafer grown in the step (1), transferring the pattern on the photoetching plate to a photoresist on the surface of the epitaxial wafer, and then selecting a corrosive liquid or a dry etching method to carry out patterning on the epitaxial wafer;
oxidizing the oxidation limiting layer by using wet nitrogen oxidation, and oxidizing the oxidation limiting layer by using a high-temperature oxidation furnace to form an oxidation hole (8);
growing a silicon dioxide passivation layer on the surface by using Plasma Enhanced Chemical Vapor Deposition (PECVD), and photoetching and corroding to obtain a light outlet hole of the laser;
growing a metal electrode by magnetron sputtering, and photoetching and corroding to obtain a laser light-emitting hole;
grinding the back surface of the epitaxial wafer to thin the substrate, and growing a laser array back electrode on the back surface by magnetron sputtering to finish the preparation of the device;
(3) the entire period is annealed.
In the invention, heat can be conducted not only in the vertical direction but also in the horizontal direction in the superlattice layer, so that the temperature of the chip is reduced, the heat distribution of the chip is uniform, and the consistency of the laser array is improved.
Drawings
FIG. 1: schematic diagram of overall structure of vertical cavity surface emitting laser array based on superlattice heterostructure
FIG. 2: schematic diagram of vertical cavity surface emitting laser array epitaxial structure based on superlattice heterostructure
FIG. 3: schematic diagram of upper DBR in laser array etching
FIG. 4: schematic diagram of oxidized hole formed by laser array after wet nitrogen oxidation
FIG. 5: schematic diagram of growing silicon dioxide passivation layer on surface
FIG. 6: schematic diagram of etching silicon dioxide and opening light-emitting hole
FIG. 7: schematic diagram of surface sputtering metal electrode
FIG. 8: etching the surface metal electrode to open the light-emitting hole
FIG. 9: grinding sheet thinning substrate schematic diagram
FIG. 10: schematic of sputtering of backside electrodes
FIG. 11: laser array top view
FIG. 12: comparison of conventional and New Structure thermal profiles
The upper surfaces of the back electrode 1, the semiconductor substrate 2, the superlattice 3, the lower DBR4, the first limiting layer 5, the second limiting layer 5', the active region 6 and the laser array are distributed; an oxide hole 8 formed in the oxide limiting layer 7, a silicon dioxide passivation layer 9, an upper DBR10, and a front electrode 11
Detailed Description
The present invention will be further illustrated with reference to the following examples, but the present invention is not limited to the following examples.
Example 1
The structure of the vertical cavity surface emitting laser array based on the superlattice heterostructure is described in detail below with reference to fig. 2-10, and the preparation method comprises the following steps:
step 1, adopting Metal Organic Chemical Vapor Deposition (MOCVD) to firstly grow GaAs/AlGaAs superlattice on n-type GaAs substrate, and then alternately growing n-Al0.22Ga0.78As and n-Al0.9Ga0.1As in 34 pairs to form a lower DBR, and then 6nm/6nm thick Al is grown0.22Ga0.78As/In0.143Al0.19Ga0.667As As active region, followed by 30nm thick Al growth0.98Ga0.02As As oxidation limiting layer, followed by growth of p-Al0.22Ga0.78As and p-Al0.9Ga0.123 pairs of As are used As the upper DBR, the thicknesses of the As are 57.5nm and 63.1nm respectively, and finally a layer of heavily doped GaAs with the thickness of 6nm is grown to be favorable for forming good ohmic contact with the electrode;
step 2, photoetching a laser array on the epitaxial wafer grown in the step 1, transferring the pattern on the photoetching plate to the photoresist on the surface of the epitaxial wafer, and then selecting corrosive liquid or dry etching until Al is exposed0.98Ga0.02The As oxidation limiting layer is used for completing the imaging of the epitaxial wafer;
and 3, oxidizing the oxidation limiting layer by a high-temperature oxidation furnace by using a wet nitrogen oxidation method, wherein the oxidized part in the oxidation limiting layer forms insulated alumina, and the unoxidized part is still conductive Al0.98Ga0.02As, forming oxidized pores;
step 4, depositing SiO with thickness of 300nm by using Plasma Enhanced Chemical Vapor Deposition (PECVD)2And the passivation layer is used for insulating and protecting the oxidation limiting layer from being oxidized any more.
And 5, photoetching and corroding the silicon dioxide passivation layer in the step 4, and opening a light outlet of the laser.
And 6, sputtering Ti/Au with the thickness of 15/300nm on the surface of the device by utilizing magnetron sputtering to serve as a front electrode.
And 7, photoetching and corroding the front electrode layer in the step 6, and opening a light outlet of the laser.
And 8, lapping the substrate of the device to thin the substrate, wherein the thickness of the whole device is about 120 mu m.
And 9, sputtering the AuGeNi/Au with the thickness of 50/300nm on the back of the device by utilizing magnetron sputtering to serve as a back electrode.
And step 10, performing rapid annealing on the whole device under the condition of 380 ℃/35s so as to form good ohmic contact between the metal electrode and the semiconductor.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structures or equivalent flow transformations made by using the contents of the specification and the drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (5)

1. A vertical cavity surface emitting laser array based on a superlattice heterostructure is characterized in that the structure mainly comprises a laser array back electrode (1), a semiconductor substrate (2), a superlattice (3), a lower DBR (4), a first limiting layer (5), an active region (6) and a second limiting layer (5 ') from bottom to top, and the laser array is distributed on the upper surface of the second limiting layer (5'); the laser array is as follows: an array of oxidation holes (8) is distributed on the upper surface of the second limiting layer (5 '), an oxidation limiting layer (7) is arranged around each oxidation hole (8) on the upper surface of the second limiting layer (5'), and an upper DBR (10) is arranged above each oxidation hole (8) and the oxidation limiting layer (7), namely each upper DBR (10) simultaneously and correspondingly covers the oxidation hole (8) and the oxidation limiting layer (7); and a silicon dioxide passivation layer (9) covers the rest upper surface of the second limiting layer (5'), the side surfaces of the oxidation holes (8), the side surfaces of the oxidation limiting layers (7) and the upper surface of the oxidation limiting layers (7), the silicon dioxide passivation layer (9) is provided with a hole on the upper surface of each oxidation limiting layer (7), the hole structure covers the corresponding oxidation hole (8), a front electrode (11) is arranged on the surface of the oxidation limiting layer (7) corresponding to each oxidation hole (8) array unit, the front electrode (11) is provided with a hole on the upper surface of the oxidation limiting layer (7), the hole of the front electrode (11) covers the oxidation hole (8), the hole of the front electrode (11) is vertically overlapped with the hole of the oxidation limiting layer (7), and the front electrode (11) covers the empty periphery of the oxidation limiting layer (7).
2. A vertical cavity surface emitting laser array based on a superlattice heterostructure as claimed in claim 1, characterized in that the passivation layer (9) in the structure is silicon dioxide, the back electrode (1) and the front electrode (11) are gold, and the remaining structure is made of a semiconductor material.
3. A superlattice heterostructure-based vertical cavity surface emitting laser array as claimed in claim 1, wherein the oxidized portion of the oxide confinement layer becomes insulating and the unoxidized portion remains conductive to form an oxidized via.
4. A superlattice heterostructure based vertical cavity surface emitting laser array as claimed in claim 1, wherein the distribution of the laser array is selected from the group consisting of circular, square, and diamond.
5. A method of fabricating a superlattice heterostructure based vertical cavity surface emitting laser array as recited in claim 1, comprising the steps of:
(1) growing a superlattice on a semiconductor substrate by adopting metal organic chemical vapor deposition, and then sequentially growing a corresponding lower DBR, an active region, an oxidation limiting layer and an upper DBR;
(2) photoetching a laser array on the epitaxial wafer grown in the step (1), transferring the pattern on the photoetching plate to a photoresist on the surface of the epitaxial wafer, and then selecting a corrosive liquid or a dry etching method to carry out patterning on the epitaxial wafer;
oxidizing the oxidation limiting layer by a high-temperature oxidation furnace by using a wet nitrogen oxidation method to form an oxidation hole (8);
growing a silicon dioxide passivation layer on the surface by using plasma enhanced chemical vapor deposition, and photoetching and corroding to obtain a light-emitting hole of the laser;
growing a metal electrode by magnetron sputtering, and photoetching and corroding to obtain a laser light-emitting hole;
grinding the back surface of the epitaxial wafer to thin the substrate, and growing a laser array back electrode on the back surface by magnetron sputtering to finish the preparation of the device;
(3) the entire device is annealed.
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CN111477717B (en) * 2020-04-26 2022-02-11 中国科学院半导体研究所 Self-refrigerating antimonide superlattice infrared detector and preparation method thereof
CN111682402B (en) * 2020-06-19 2021-09-07 北京工业大学 Surface-emitting semiconductor laser chip with symmetrical DBR structure and preparation method thereof
CN112003124B (en) * 2020-09-02 2021-07-02 北京金太光芯科技有限公司 Vertical cavity surface emitting laser with non-cylindrical platform and preparation method thereof

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CN106654857A (en) * 2017-03-05 2017-05-10 北京工业大学 High-beam-quality large-scale VCSEL in-phase coupled array
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