CN109992801B - PCB updating method based on PADS software - Google Patents
PCB updating method based on PADS software Download PDFInfo
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- CN109992801B CN109992801B CN201711483334.9A CN201711483334A CN109992801B CN 109992801 B CN109992801 B CN 109992801B CN 201711483334 A CN201711483334 A CN 201711483334A CN 109992801 B CN109992801 B CN 109992801B
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- 238000000034 method Methods 0.000 title claims abstract description 11
- 238000004806 packaging method and process Methods 0.000 claims abstract description 14
- 238000010586 diagram Methods 0.000 claims abstract description 12
- 238000004519 manufacturing process Methods 0.000 claims abstract description 4
- 238000005538 encapsulation Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000006467 substitution reaction Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Architecture (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
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Abstract
The application discloses a PCB updating method based on PADS software, which comprises the following steps: step 1, manufacturing an element packaging library, and if the new schematic diagram contains devices which are not in the original PCB, filling the packaging of the new devices into the packaging library; step 2, generating an ASC netlist file by utilizing the new principle image file; and step 3, creating a blank PADS format PCB file, designating a library file, and importing ASC netlist information to form a new version PCB file. The application adopts the new packaging library and ASC netlist file to form the new PCB file, which can basically prevent the phenomenon of information loss when the schematic diagram is updated.
Description
Technical Field
The application relates to the field of circuit board layout design, in particular to a PCB updating method based on PADS software.
Background
There are often situations in day-to-day designs where PCB designs are made using PADS software on non-PADS formatted schematics, where ASC formatted netlists must be flowed to ensure that the PCB and the schematics are consistent. When the schematic diagram is updated, the netlist in ASC format is directly imported into the old-version PCB, information loss phenomenon often occurs, and finally design errors are caused.
Disclosure of Invention
In order to solve the technical problems, the application aims to provide a PCB updating method based on PADS software.
The technical scheme adopted by the application is as follows: a method for updating a PCB based on PADS software, the method comprising: step 1, manufacturing an element packaging library, and if the new schematic diagram contains devices which are not in the original PCB, filling the packaging of the new devices into the packaging library; step 2, generating an ASC netlist file by utilizing the new principle image file; and step 3, creating a blank PADS format PCB file, designating a library file, and importing ASC netlist information to form a new version PCB file.
Further, it also includes step 4, which specifically includes: and comparing the difference between the new PCB and the old PCB by using the Compare/ECO function in the PADS layout, generating a difference report in ECO format, importing the ECO format file into the new PCB file, and updating the PCB.
Further, in the step 1, a component package library is created, and the component package library may be created by using the old version of the PCB.
The beneficial effects of the application are as follows: the application adopts the new packaging library and ASC netlist file to form the new PCB file, which can basically prevent the phenomenon of information loss when the schematic diagram is updated.
Drawings
The following is a further description of embodiments of the application, taken in conjunction with the accompanying drawings:
fig. 1 is a flow chart of the present application.
Detailed Description
It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other.
As shown in fig. 1, which shows a flowchart of a method for updating a PCB based on PADS software, the method comprises the steps of:
step 1, manufacturing an element packaging library, and if the new schematic diagram contains devices which are not in the original PCB, filling the packaging of the new devices into the packaging library;
step 2, generating an ASC netlist file by utilizing the new principle image file;
and step 3, creating a blank PADS format PCB file, designating a library file, and importing ASC netlist information to form a new version PCB file.
The application mainly comprises a netlist file and an element encapsulation library, if the new schematic diagram has devices which are not in the original PCB, the encapsulation of the new devices needs to be supplemented to the encapsulation library, so that all the devices of the new schematic diagram have corresponding element encapsulation, the ASC netlist file is generated by utilizing the new schematic diagram file, the ASC netlist file is ensured to comprise a connection network of all the elements in the new schematic diagram, finally, a blank PADS format PCB file is newly established, a library file is appointed, ASC netlist information is imported, all the information is ensured to be imported successfully according to the report, and therefore, the PCB of a new version can be ensured not to miss any information.
Further as a preferred embodiment, it further comprises a step 4, which specifically comprises: and comparing the differences of the new PCB and the old PCB by using the Compare/ECO function in the PADS layout, generating a difference report in ECO format, importing the ECO format file into the PCB file in the old version, and updating the PCB in the old version. The new version of the PCB is produced directly from the new ASC netlist file and the component package library, although the problem of information loss can be avoided. When the PCB needs to be re-laid, when the PCB of the old version is only required to be subjected to small-amplitude modification, the re-layout is quite time-consuming, and at the moment, all information in the new schematic diagram can be ensured to be imported into the PCB of the old version only by importing the ECO format file into the PCB file of the old version, and meanwhile, the PCB does not need to be re-laid, only the updating part is required to be designed, so that the efficiency of small-amplitude upgrading of the PCB can be greatly improved.
Further, in the step 1, a component package library is created, and the component package library may be created by using the old version of the PCB.
While the preferred embodiment of the present application has been described in detail, the application is not limited to the embodiment, and various equivalent modifications and substitutions can be made by those skilled in the art without departing from the spirit of the application, and these equivalent modifications and substitutions are intended to be included in the scope of the present application as defined in the appended claims.
Claims (1)
1. A method for updating a PCB based on PADS software, the method comprising:
step 1, manufacturing an element packaging library, and if the new schematic diagram contains devices which are not in the original PCB, filling the packaging of the new devices into the packaging library;
step 2, generating an ASC netlist file by utilizing the new principle image file;
step 3, creating a blank PADS format PCB file, designating a library file, and importing ASC netlist information to form a new version PCB file;
step 4, comparing the difference between the new PCB and the old PCB by using the Compare/ECO function in the PADS layout, generating a difference report of ECO format, importing the ECO format file into the new-version PCB file, and updating the PCB;
in the step 1, a component package library is manufactured, and the component package library can be generated through the old version of the PCB.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711483334.9A CN109992801B (en) | 2017-12-29 | 2017-12-29 | PCB updating method based on PADS software |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711483334.9A CN109992801B (en) | 2017-12-29 | 2017-12-29 | PCB updating method based on PADS software |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109992801A CN109992801A (en) | 2019-07-09 |
| CN109992801B true CN109992801B (en) | 2023-10-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711483334.9A Active CN109992801B (en) | 2017-12-29 | 2017-12-29 | PCB updating method based on PADS software |
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| Country | Link |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111241777B (en) * | 2019-12-31 | 2023-03-24 | 深圳市亿道数码技术有限公司 | Method for updating and placing package pad in PCB Layout |
| CN113688595B (en) * | 2020-05-19 | 2023-08-18 | 上海复旦微电子集团股份有限公司 | System-in-package circuit schematic design method and device, and readable storage medium |
| CN111830918B (en) * | 2020-07-20 | 2021-08-03 | 北京广利核***工程有限公司 | EPLAN platform-based nuclear power DCS control cabinet complete drawing upgrading method and system |
Citations (4)
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|---|---|---|---|---|
| CN1801154A (en) * | 2004-12-31 | 2006-07-12 | 华为技术有限公司 | Method for creating library file |
| CN102306224A (en) * | 2011-09-05 | 2012-01-04 | 深圳市同洲电子股份有限公司 | Method and device for automatically generating AI (artificial intelligence) component list |
| WO2016192197A1 (en) * | 2015-06-02 | 2016-12-08 | 中兴通讯股份有限公司 | Software upgrade method, apparatus and system of terminal, and computer storage medium |
| CN107025362A (en) * | 2017-04-28 | 2017-08-08 | 无锡市同步电子科技有限公司 | A kind of method for verifying schematic diagram and PCB creation data uniformity |
-
2017
- 2017-12-29 CN CN201711483334.9A patent/CN109992801B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1801154A (en) * | 2004-12-31 | 2006-07-12 | 华为技术有限公司 | Method for creating library file |
| CN102306224A (en) * | 2011-09-05 | 2012-01-04 | 深圳市同洲电子股份有限公司 | Method and device for automatically generating AI (artificial intelligence) component list |
| WO2016192197A1 (en) * | 2015-06-02 | 2016-12-08 | 中兴通讯股份有限公司 | Software upgrade method, apparatus and system of terminal, and computer storage medium |
| CN107025362A (en) * | 2017-04-28 | 2017-08-08 | 无锡市同步电子科技有限公司 | A kind of method for verifying schematic diagram and PCB creation data uniformity |
Non-Patent Citations (1)
| Title |
|---|
| 网络表装入分析;段萍峰;《黑龙江科技信息》;20030215(第04期);全文 * |
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| CN109992801A (en) | 2019-07-09 |
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