CN109962098A - Bidirectional triode thyristor ESD-protection structure and soi structure - Google Patents
Bidirectional triode thyristor ESD-protection structure and soi structure Download PDFInfo
- Publication number
- CN109962098A CN109962098A CN201910138049.6A CN201910138049A CN109962098A CN 109962098 A CN109962098 A CN 109962098A CN 201910138049 A CN201910138049 A CN 201910138049A CN 109962098 A CN109962098 A CN 109962098A
- Authority
- CN
- China
- Prior art keywords
- doped region
- type heavily
- heavily doped
- type
- zone
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000002457 bidirectional effect Effects 0.000 title claims abstract description 29
- 238000000605 extraction Methods 0.000 claims abstract description 72
- 238000002955 isolation Methods 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims description 21
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 9
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- 238000012423 maintenance Methods 0.000 claims description 8
- 230000005611 electricity Effects 0.000 claims description 6
- 230000001681 protective effect Effects 0.000 description 6
- 230000004048 modification Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 230000003068 static effect Effects 0.000 description 4
- 101100365087 Arabidopsis thaliana SCRA gene Proteins 0.000 description 3
- 101000668165 Homo sapiens RNA-binding motif, single-stranded-interacting protein 1 Proteins 0.000 description 3
- 101000668170 Homo sapiens RNA-binding motif, single-stranded-interacting protein 2 Proteins 0.000 description 3
- 102100039692 RNA-binding motif, single-stranded-interacting protein 1 Human genes 0.000 description 3
- 102100039690 RNA-binding motif, single-stranded-interacting protein 2 Human genes 0.000 description 3
- 101150105073 SCR1 gene Proteins 0.000 description 3
- 101100134054 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) NTG1 gene Proteins 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000001012 protector Effects 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Thyristors (AREA)
Abstract
The invention particularly relates to bidirectional triode thyristor ESD-protection structure and soi structures: the first N-doped zone, the second P-doped zone and the second N-doped zone are provided in deep n-type doped region;The first p-type heavily doped region and the first N-type heavily doped region are provided in the first P-doped zone;The second N-type heavily doped region, the second p-type heavily doped region and third N-type heavily doped region are provided in the second P-doped zone;The 4th N-type heavily doped region and third p-type heavily doped region are provided in third P-doped zone;Shallow trench isolation region is provided with above the first N-doped zone and the second N-doped zone;One end of first extraction electrode is connect with the first p-type heavily doped region and the first N-type heavily doped region respectively, one end of second extraction electrode is connect with the second N-type heavily doped region, the second p-type heavily doped region and third N-type heavily doped region respectively, and one end of third extraction electrode is connect with the 4th N-type heavily doped region and third p-type heavily doped region respectively.
Description
Technical field
The present invention relates to Flouride-resistani acid phesphatase technical field more particularly to bidirectional triode thyristor ESD-protection structures and soi structure.
Background technique
Static discharge (ESD, Electron Static Discharge) be when the pin suspension joint of an integrated circuit,
A large amount of electrostatic charges pour into the instantaneous process of integrated circuit, whole process about time-consuming 100ns from outside to inside.In the quiet of integrated circuit
The high pressure that hundreds if not thousands of volts can be generated when discharge of electricity, by the gate oxide breakdown of input stage in integrated circuit.With collection
At the progress of circuit technology, the characteristic size of metal-oxide-semiconductor is smaller and smaller, and the thickness of gate oxide is also more and more thinner, in this trend
Under, carry out static electricity discharge charge using high performance ESD protection device to protect grid oxic horizon to seem particularly significant.
There are mainly four types of the models of ESD event: human body discharge's model (HBM), mechanical discharging model (MM), device charging mould
Type (CDM) and electric field induction model (FIM).For general IC products, generally to pass through human body discharge's model, machine
The test of tool discharging model and device charge model.In order to bear so high static discharge voltage, integrated circuit is produced
Product generally have to using the electrostatic discharge protector with high-performance, high tolerance.Wherein, silicon-controlled device (SCR,
Silicon Controlled Rectifier) it is one of most efficient ESD protective device, very due to its maintenance voltage
Low, so being able to bear very high ESD electric current, therefore, SCR naturally has high ESD robustness.Compare other ESD protectors
The unit area ESD protective capability of part, SCR device is most strong.
General SCR device is one direction ESD protective device, and in order to provide the ESD protective device of twocouese, existing skill
Art is realized that the ESD in another direction is protected by parasitic diode or a diode in parallel.However, using additional two
Pole pipe is protected to carry out the ESD in another direction, not only will increase chip area, moreover, holding in some input ports needs
By in the circuit of negative voltage, when carrying out opposite direction protection using diode, it is easy to produce electric leakage.
Summary of the invention
In view of the above problems, it proposes on the present invention overcomes the above problem or at least be partially solved in order to provide one kind
State the bidirectional triode thyristor ESD-protection structure and soi structure of problem.
The present invention provides a kind of bidirectional triode thyristor ESD-protection structure, including substrate P, deep n-type doped region, the first P
Type doped region, the first N-doped zone, the second P-doped zone, the second N-doped zone, third P-doped zone, the first p-type are heavily doped
Miscellaneous area, the first N-type heavily doped region, the second N-type heavily doped region, the second p-type heavily doped region, third N-type heavily doped region, the 4th N-type
Heavily doped region, third p-type heavily doped region, the first extraction electrode, the second extraction electrode, third extraction electrode and shallow trench isolation region;
The deep n-type doped region is arranged in the substrate P;
First P-doped zone and the third P-doped zone are respectively arranged at the two sides of the deep n-type doped region;
First N-doped zone is set gradually from left to right in the deep n-type doped region, second p-type is mixed
Miscellaneous area and second N-doped zone;
The first p-type heavily doped region and the first N have been set gradually from left to right in first P-doped zone
Type heavily doped region;
The second N-type heavily doped region, the 2nd P have been set gradually from left to right in second P-doped zone
Type heavily doped region and the third N-type heavily doped region;
The 4th N-type heavily doped region and the 3rd P have been set gradually from left to right in the third P-doped zone
Type heavily doped region;
The shallow trench isolation region is provided with above first N-doped zone and second N-doped zone;
One end of first extraction electrode respectively with the first p-type heavily doped region and the first N-type heavily doped region
Connection, one end of second extraction electrode respectively with the second N-type heavily doped region, the second p-type heavily doped region and institute
State the connection of third N-type heavily doped region, one end of the third extraction electrode respectively with the 4th N-type heavily doped region and described the
The connection of three p-type heavily doped regions;
Wherein, from second extraction electrode to first extraction electrode by the second p-type heavily doped region, institute
The second P-doped zone, first N-doped zone, first P-doped zone 1 and the first N-type heavily doped region is stated to be formed
Forward current;From first extraction electrode to second extraction electrode by the first p-type heavily doped region, described
One P-doped zone, first N-doped zone, second P-doped zone and the second p-type heavily doped region are formed reversely
Electric current;From second extraction electrode to the third extraction electrode by the second p-type heavily doped region, the 2nd P
Type doped region, second N-doped zone, the third P-doped zone and the 4th N-type heavily doped region form positive electricity
Stream;From the third extraction electrode to second extraction electrode by the third p-type heavily doped region, the third p-type
Doped region, second N-doped zone, second P-doped zone and the third N-type heavily doped region form reverse current,
To form bi-directional ESD;
Wherein, by adjusting dimension of the width to the bidirectional triode thyristor ESD-protection structure of the shallow trench isolation region
Voltage is held to be controlled.
Preferably, the width of the shallow trench isolation region is 2-10um.
Preferably, the ion concentration of the N-doped zone is 1e15-1e18.
Preferably, the first p-type heavily doped region, the second p-type heavily doped region, the third p-type heavily doped region, institute
State the first N-type heavily doped region, the second N-type heavily doped region, the third N-type heavily doped region and the 4th N-type heavy doping
The ion concentration in area is 1e19-1e20.
Preferably, the substrate P with a thickness of 300-500um.
Based on the same inventive concept, the present invention provides a kind of soi structure, including buried oxide, silicon substrate, isolated area and such as
Bidirectional triode thyristor ESD-protection structure above-mentioned;
The buried oxide setting is on the silicon substrate;
The bidirectional triode thyristor ESD-protection structure is arranged in the buried oxide;
The isolated area is arranged in the buried oxide and is located at the bidirectional triode thyristor ESD-protection structure
Two sides;
Preferably, the buried oxide with a thickness of 1-3um.
Preferably, the isolated area is deep trench isolation area.
Preferably, the isolated area with a thickness of 1-3um.
Bidirectional triode thyristor ESD-protection structure and soi structure according to the present invention, including the doping of substrate P, deep n-type
Area, the first P-doped zone, the first N-doped zone, the second P-doped zone, the second N-doped zone, third P-doped zone, first
P-type heavily doped region, the first N-type heavily doped region, the second N-type heavily doped region, the second p-type heavily doped region, third N-type heavily doped region,
4th N-type heavily doped region, third p-type heavily doped region, the first extraction electrode, the second extraction electrode, third extraction electrode and shallow slot
Isolated area;The deep n-type doped region is arranged in the substrate P;First P-doped zone and the third P-doped zone
It is respectively arranged at the two sides of the deep n-type doped region;Described first has been set gradually from left to right in the deep n-type doped region
N-doped zone, second P-doped zone and second N-doped zone;In first P-doped zone from left to right
It is disposed with the first p-type heavily doped region and the first N-type heavily doped region;From a left side in second P-doped zone
The second N-type heavily doped region, the second p-type heavily doped region and the third N-type heavily doped region are disposed with to the right side;?
The 4th N-type heavily doped region and the third p-type heavy doping have been set gradually from left to right in the third P-doped zone
Area;The shallow trench isolation region is provided with above first N-doped zone and second N-doped zone;Described
One end of one extraction electrode is connect with the first p-type heavily doped region and the first N-type heavily doped region respectively, and described second draws
Out one end of electrode respectively with the second N-type heavily doped region, the second p-type heavily doped region and the third N-type heavy doping
Area's connection, one end of the third extraction electrode connect with the 4th N-type heavily doped region and the third p-type heavily doped region respectively
It connects;Wherein, from second extraction electrode to first extraction electrode by the second p-type heavily doped region, described
Two P-doped zones, first N-doped zone, first P-doped zone 1 and the first N-type heavily doped region form forward direction
Electric current;From first extraction electrode to second extraction electrode by the first p-type heavily doped region, the first P
Type doped region, first N-doped zone, second P-doped zone and the second p-type heavily doped region form reversed electricity
Stream;From second extraction electrode to the third extraction electrode by the second p-type heavily doped region, second p-type
Doped region, second N-doped zone, the third P-doped zone and the 4th N-type heavily doped region form forward current;
It is adulterated from the third extraction electrode to second extraction electrode by the third p-type heavily doped region, the third p-type
Area, second N-doped zone, second P-doped zone and the third N-type heavily doped region form reverse current, thus
The case where formation bi-directional ESD, the electric leakage occurred when avoiding reverse protection, also, the width by adjusting the shallow trench isolation region
Degree controls the maintenance voltage of the bidirectional triode thyristor ESD-protection structure.
The above description is only an overview of the technical scheme of the present invention, in order to better understand the technical means of the present invention,
And it can be implemented in accordance with the contents of the specification, and in order to allow above and other objects of the present invention, feature and advantage can
It is clearer and more comprehensible, the followings are specific embodiments of the present invention.
Detailed description of the invention
By reading the following detailed description of the preferred embodiment, various other advantages and benefits are common for this field
Technical staff will become clear.The drawings are only for the purpose of illustrating a preferred embodiment, and is not considered as to the present invention
Limitation.And throughout the drawings, identical component is indicated with identical reference pattern.In the accompanying drawings:
Fig. 1 shows the structure chart of bidirectional triode thyristor ESD-protection structure in the embodiment of the present invention;
Fig. 2 shows the structure charts of soi structure in the embodiment of the present invention.
Wherein, DNW is deep n-type doped region, and 1 is the first P-doped zone, and 2 be the first N-doped zone, and 3 mix for the second p-type
Miscellaneous area, 4 be the second N-doped zone, and 5 be third P-doped zone, and 6 be the first p-type heavily doped region, and 7 be the first N-type heavily doped region,
8 be the second N-type heavily doped region, and 9 be the second p-type heavily doped region, and 10 be third N-type heavily doped region, and 11 be the 4th N-type heavy doping
Area, 12 be third p-type heavily doped region, and T1 is the first extraction electrode, and T2 is the second extraction electrode, and T3 is third extraction electrode, STI
For shallow trench isolation region, P-sub is substrate P, and BOX is buried oxide, and Si is silicon substrate, and TR is isolated area.
Specific embodiment
Exemplary embodiments of the present disclosure are described in more detail below with reference to accompanying drawings.Although showing the disclosure in attached drawing
Exemplary embodiment, it being understood, however, that may be realized in various forms the disclosure without should be by embodiments set forth here
It is limited.On the contrary, these embodiments are provided to facilitate a more thoroughly understanding of the present invention, and can be by the scope of the present disclosure
It is fully disclosed to those skilled in the art.
The embodiment of the present invention provides a kind of bidirectional triode thyristor ESD-protection structure, as shown in Figure 1, including substrate P (P-
Sub), deep n-type doped region DNW, the first P-doped zone 1, the first N-doped zone 2, the second P-doped zone 3, the second n-type doping
Area 4, third P-doped zone 5, the first p-type heavily doped region 6, the first N-type heavily doped region 7, the second N-type heavily doped region 8, the second p-type
Heavily doped region 9, third N-type heavily doped region 10, the 4th N-type heavily doped region 11, third p-type heavily doped region 12, the first extraction electrode
T1, the second extraction electrode T2 and shallow trench isolation region STI.
Wherein, deep n-type doped region DNW is arranged in substrate P.First P-doped zone 1 and third P-doped zone 5 are set respectively
It is placed in the two sides of deep n-type doped region DNW.Be set gradually from left to right in deep n-type doped region DNW the first N-doped zone 2,
Second P-doped zone 3 and the second N-doped zone 4.The first p-type weight has been set gradually from left to right in the first P-doped zone 1
Doped region 6 and the first N-type heavily doped region 7.The second N-type heavily doped region has been set gradually from left to right in the second P-doped zone 3
8, the second p-type heavily doped region 9 and third N-type heavily doped region 10.Has been set gradually from left to right in third P-doped zone 5
Four N-type heavily doped regions 11 and third p-type heavily doped region 12.It is all provided in the top of the first N-doped zone 2 and the second N-doped zone 4
It is equipped with shallow trench isolation region STI.One end of first extraction electrode T1 respectively with the second N-type heavily doped region 8, the second p-type heavily doped region 9
With third N-type heavily doped region 10 connect, one end of the second extraction electrode T2 respectively with the first p-type heavily doped region 6, the first N-type weight
Doped region 7, the 4th N-type heavily doped region 11 and third p-type heavily doped region 12 connect.
It in embodiments of the present invention, is the second p-type to the path SCR1 of the first extraction electrode T1 from the second extraction electrode T2
Heavily doped region 9- the second P-doped zone 3- the first N-doped zone 2- the first P-doped zone the first N-type of 1- heavily doped region 7, SCR1
Constitute forward direction ESD electric current.It is the first p-type heavily doped region 6- from the first extraction electrode T1 to the path SCR2 of the second extraction electrode T2
First P-doped zone 1- the first N-doped zone 2- the second P-doped zone the second p-type of 3- heavily doped region 9, SCR2 constitute reversed ESD
Electric current is released path.It is the second p-type heavily doped region 9- the from the second extraction electrode T2 to the path SCR3 of third extraction electrode T3
The 4th N-type heavily doped region 11 of two P-doped zone 3- the second N-doped zone 4- third P-doped zone 5-, SCR3 constitute forward direction ESD
Electric current.It is that third p-type heavily doped region 12- third p-type is mixed from third extraction electrode T3 to the path SCR4 of the second extraction electrode T2
Miscellaneous the second N-doped zone of area 5- 4- the second P-doped zone 3- third N-type heavily doped region 10, SCR4 constitute reversed ESD electric current and release
Path.To form the bi-directional ESD based on SCR by SCR1, SCR2, SCR3 and SCR4, appearance when avoiding reverse protection
Electric leakage the case where.
In embodiments of the present invention, by adjust the first N-doped zone 2, the second N-doped zone 4 and corresponding shallow slot every
The control of the maintenance voltage to bidirectional triode thyristor ESD-protection structure may be implemented in width from area STI, wherein N-type is mixed
The equivalent width in miscellaneous area and shallow trench isolation region STI, width is bigger, and maintenance voltage is bigger, and width is smaller, and maintenance voltage is smaller.Shallowly
The width of slot isolated area is 2-10um.
In embodiments of the present invention, the thickness range of substrate P is 300-500um.
In embodiments of the present invention, the first p-type heavily doped region 6, the second p-type heavily doped region 9, third p-type heavily doped region 12,
First N-type heavily doped region 7, the second N-type heavily doped region 8, third N-type heavily doped region 10 and the 4th N-type heavily doped region 11 ion
Concentration is 1e19-1e20.
It should be noted that the first p-type heavily doped region 6, the second p-type heavily doped region 9, third p-type heavily doped region 12, first
N-type heavily doped region 7, the second N-type heavily doped region 8, third N-type heavily doped region 10 and the 4th N-type heavily doped region 11 layout are fixed, and are protected
It is consistent to demonstrate,prove two-way SCR path-length, consistent passage length ensure that two-way SCR characteristic is the same, have identical trigger voltage and
Maintenance voltage.It is designed using the structure of symmetry, ESD electric current is made to release more evenly.
Based on the same inventive concept, the embodiment of the present invention also provides a kind of soi structure, as shown in Fig. 2, including buried oxide
(BOX), silicon substrate (Si), isolated area (TR) and bidirectional triode thyristor ESD-protection structure as in the foregoing embodiment.Its
In, buried oxide is arranged on a silicon substrate, and bidirectional triode thyristor ESD-protection structure is arranged in buried oxide, and isolated area is set
Set in buried oxide and be located at the two sides of bidirectional triode thyristor ESD-protection structure.
Wherein, buried oxide with a thickness of 1-3um, isolated area is deep trench isolation area, deep trench isolation area with a thickness of 1-
3um。
It should be noted that when common unidirectional SCR device is used for SOI power protection using integrated circuit, in positive ESD stress
Under voltage-current characteristic be in similar " S " type snapback;IV characteristic under reversed ESD stress can then be equivalent to diode
Reverse breakdown curve, diode operation is in high voltage, high current region when reversed, it is easy to burn out.It is integrated for SOI power
Circuit, using two-way SCR ESD protective device, it is reversed to promote SCR device for disadvantage that can be weaker to avoid reverse protection ability
ESD protective capability.
In short, bidirectional triode thyristor ESD-protection structure according to the present invention and soi structure, including substrate P, deep n-type
Doped region, the first P-doped zone, the first N-doped zone, the second P-doped zone, the second N-doped zone, third P-doped zone,
First p-type heavily doped region, the first N-type heavily doped region, the second N-type heavily doped region, the second p-type heavily doped region, third N-type heavy doping
Area, the 4th N-type heavily doped region, third p-type heavily doped region, the first extraction electrode, the second extraction electrode, third extraction electrode and shallow
Slot isolated area;The deep n-type doped region is arranged in the substrate P;First P-doped zone and third p-type doping
Area is respectively arranged at the two sides of the deep n-type doped region;Described has been set gradually from left to right in the deep n-type doped region
One N-doped zone, second P-doped zone and second N-doped zone;In first P-doped zone from a left side to
The right side is disposed with the first p-type heavily doped region and the first N-type heavily doped region;In second P-doped zone from
It is left-to-right to be disposed with the second N-type heavily doped region, the second p-type heavily doped region and the third N-type heavily doped region;
The 4th N-type heavily doped region and the third p-type heavy doping have been set gradually from left to right in the third P-doped zone
Area;The shallow trench isolation region is provided with above first N-doped zone and second N-doped zone;Described
One end of one extraction electrode is connect with the first p-type heavily doped region and the first N-type heavily doped region respectively, and described second draws
Out one end of electrode respectively with the second N-type heavily doped region, the second p-type heavily doped region and the third N-type heavy doping
Area's connection, one end of the third extraction electrode connect with the 4th N-type heavily doped region and the third p-type heavily doped region respectively
It connects;Wherein, from second extraction electrode to first extraction electrode by the second p-type heavily doped region, described
Two P-doped zones, first N-doped zone, first P-doped zone 1 and the first N-type heavily doped region form forward direction
Electric current;From first extraction electrode to second extraction electrode by the first p-type heavily doped region, the first P
Type doped region, first N-doped zone, second P-doped zone and the second p-type heavily doped region form reversed electricity
Stream;From second extraction electrode to the third extraction electrode by the second p-type heavily doped region, second p-type
Doped region, second N-doped zone, the third P-doped zone and the 4th N-type heavily doped region form forward current;
It is adulterated from the third extraction electrode to second extraction electrode by the third p-type heavily doped region, the third p-type
Area, second N-doped zone, second P-doped zone and the third N-type heavily doped region form reverse current, thus
The case where formation bi-directional ESD, the electric leakage occurred when avoiding reverse protection, also, the width by adjusting the shallow trench isolation region
Degree controls the maintenance voltage of the bidirectional triode thyristor ESD-protection structure.
Although preferred embodiments of the present invention have been described, it is created once a person skilled in the art knows basic
Property concept, then additional changes and modifications may be made to these embodiments.So it includes excellent that the following claims are intended to be interpreted as
It selects embodiment and falls into all change and modification of the scope of the invention.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (9)
1. a kind of bidirectional triode thyristor ESD-protection structure, which is characterized in that including substrate P, deep n-type doped region, the first p-type
Doped region, the first N-doped zone, the second P-doped zone, the second N-doped zone, third P-doped zone, the first p-type heavy doping
Area, the first N-type heavily doped region, the second N-type heavily doped region, the second p-type heavily doped region, third N-type heavily doped region, the 4th N-type weight
Doped region, third p-type heavily doped region, the first extraction electrode, the second extraction electrode, third extraction electrode and shallow trench isolation region;
The deep n-type doped region is arranged in the substrate P;
First P-doped zone and the third P-doped zone are respectively arranged at the two sides of the deep n-type doped region;
First N-doped zone, second P-doped zone have been set gradually from left to right in the deep n-type doped region
With second N-doped zone;
The first p-type heavily doped region and the first N-type weight have been set gradually from left to right in first P-doped zone
Doped region;
The second N-type heavily doped region, the second p-type weight have been set gradually from left to right in second P-doped zone
Doped region and the third N-type heavily doped region;
The 4th N-type heavily doped region and the third p-type weight have been set gradually from left to right in the third P-doped zone
Doped region;
The shallow trench isolation region is provided with above first N-doped zone and second N-doped zone;
One end of first extraction electrode is connect with the first p-type heavily doped region and the first N-type heavily doped region respectively,
One end of second extraction electrode respectively with the second N-type heavily doped region, the second p-type heavily doped region and the third
N-type heavily doped region connection, one end of the third extraction electrode respectively with the 4th N-type heavily doped region and the third p-type
Heavily doped region connection;
Wherein, from second extraction electrode to first extraction electrode by the second p-type heavily doped region, described
Two P-doped zones, first N-doped zone, first P-doped zone 1 and the first N-type heavily doped region form forward direction
Electric current;From first extraction electrode to second extraction electrode by the first p-type heavily doped region, the first P
Type doped region, first N-doped zone, second P-doped zone and the second p-type heavily doped region form reversed electricity
Stream;From second extraction electrode to the third extraction electrode by the second p-type heavily doped region, second p-type
Doped region, second N-doped zone, the third P-doped zone and the 4th N-type heavily doped region form forward current;
It is adulterated from the third extraction electrode to second extraction electrode by the third p-type heavily doped region, the third p-type
Area, second N-doped zone, second P-doped zone and the third N-type heavily doped region form reverse current, thus
Form bi-directional ESD;
Wherein, electric to the maintenance of the bidirectional triode thyristor ESD-protection structure by adjusting the width of the shallow trench isolation region
Pressure is controlled.
2. bidirectional triode thyristor ESD-protection structure as described in claim 1, which is characterized in that the shallow trench isolation region
Width is 2-10um.
3. bidirectional triode thyristor ESD-protection structure as described in claim 1, which is characterized in that the N-doped zone
Ion concentration is 1e15-1e18.
4. bidirectional triode thyristor ESD-protection structure as described in claim 1, which is characterized in that first p-type is heavily doped
Miscellaneous area, the second p-type heavily doped region, the third p-type heavily doped region, the first N-type heavily doped region, second N-type
The ion concentration of heavily doped region, the third N-type heavily doped region and the 4th N-type heavily doped region is 1e19-1e20.
5. bidirectional triode thyristor ESD-protection structure as described in claim 1, which is characterized in that the thickness of the substrate P
For 300-500um.
6. a kind of soi structure, which is characterized in that including any in buried oxide, silicon substrate, isolated area and such as claim 1-5
Bidirectional triode thyristor ESD-protection structure described in claim;
The buried oxide setting is on the silicon substrate;
The bidirectional triode thyristor ESD-protection structure is arranged in the buried oxide;
The two sides in the buried oxide and being located at the bidirectional triode thyristor ESD-protection structure are arranged in the isolated area.
7. the as claimed in claim 6 soi structure, which is characterized in that the buried oxide with a thickness of 1-3um.
8. the soi structure as claimed in claim 6, which is characterized in that the isolated area is deep trench isolation area.
9. the as claimed in claim 6 soi structure, which is characterized in that the isolated area with a thickness of 1-3um.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910138049.6A CN109962098A (en) | 2019-02-25 | 2019-02-25 | Bidirectional triode thyristor ESD-protection structure and soi structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910138049.6A CN109962098A (en) | 2019-02-25 | 2019-02-25 | Bidirectional triode thyristor ESD-protection structure and soi structure |
Publications (1)
Publication Number | Publication Date |
---|---|
CN109962098A true CN109962098A (en) | 2019-07-02 |
Family
ID=67023878
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910138049.6A Pending CN109962098A (en) | 2019-02-25 | 2019-02-25 | Bidirectional triode thyristor ESD-protection structure and soi structure |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109962098A (en) |
Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020109190A1 (en) * | 2001-02-09 | 2002-08-15 | United Microelectronics Corp. | Method for forming a lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process |
US6960792B1 (en) * | 2003-09-30 | 2005-11-01 | National Semiconductor Corporation | Bi-directional silicon controlled rectifier structure with high holding voltage for latchup prevention |
CN101281899A (en) * | 2008-05-16 | 2008-10-08 | 浙江大学 | PMOS pipe built-in bidirectional thyristor electrostatic protection device |
US20090032837A1 (en) * | 2007-07-31 | 2009-02-05 | Tseng Tang-Kuei | Asymmetric bidirectional silicon-controlled rectifier |
CN102142440A (en) * | 2010-12-30 | 2011-08-03 | 浙江大学 | Thyristor device |
CN102148242A (en) * | 2010-12-30 | 2011-08-10 | 浙江大学 | Silicon controlled device with double-conduction path |
CN102956632A (en) * | 2011-08-31 | 2013-03-06 | 北京中电华大电子设计有限责任公司 | Two-way SCR (Silicon Controlled Rectifier)-based ESD (electrostatic discharge) protection structure with low parasitic capacitance |
CN104969355A (en) * | 2013-01-30 | 2015-10-07 | 密克罗奇普技术公司 | DMOS semiconductor device with ESD self-protection and LIN bus driver comprising the same |
CN105428354A (en) * | 2015-12-17 | 2016-03-23 | 江南大学 | Electronic static discharge (ESD) protection device with bidirectional silicon controlled rectifier (SCR) structure embedded with interdigital N-channel metal oxide semiconductor (NMOS) |
CN106158959A (en) * | 2015-04-15 | 2016-11-23 | 中芯国际集成电路制造(上海)有限公司 | A kind of semiconductor device and electronic installation |
CN106783942A (en) * | 2016-11-30 | 2017-05-31 | 辽宁大学 | A kind of two-way SCR structure for ESD protections |
CN107731812A (en) * | 2017-09-30 | 2018-02-23 | 湘潭大学 | A kind of nested refers to bidirectional thyristor electrostatic protection device more |
CN108630680A (en) * | 2018-07-11 | 2018-10-09 | 湘潭大学 | A kind of interdigital nesting hybrid structure electrostatic dispensing device based on SCR |
CN108899314A (en) * | 2018-05-23 | 2018-11-27 | 湖南大学 | electrostatic protection device |
-
2019
- 2019-02-25 CN CN201910138049.6A patent/CN109962098A/en active Pending
Patent Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020109190A1 (en) * | 2001-02-09 | 2002-08-15 | United Microelectronics Corp. | Method for forming a lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process |
US6960792B1 (en) * | 2003-09-30 | 2005-11-01 | National Semiconductor Corporation | Bi-directional silicon controlled rectifier structure with high holding voltage for latchup prevention |
US20090032837A1 (en) * | 2007-07-31 | 2009-02-05 | Tseng Tang-Kuei | Asymmetric bidirectional silicon-controlled rectifier |
CN101281899A (en) * | 2008-05-16 | 2008-10-08 | 浙江大学 | PMOS pipe built-in bidirectional thyristor electrostatic protection device |
CN102142440A (en) * | 2010-12-30 | 2011-08-03 | 浙江大学 | Thyristor device |
CN102148242A (en) * | 2010-12-30 | 2011-08-10 | 浙江大学 | Silicon controlled device with double-conduction path |
CN102956632A (en) * | 2011-08-31 | 2013-03-06 | 北京中电华大电子设计有限责任公司 | Two-way SCR (Silicon Controlled Rectifier)-based ESD (electrostatic discharge) protection structure with low parasitic capacitance |
CN104969355A (en) * | 2013-01-30 | 2015-10-07 | 密克罗奇普技术公司 | DMOS semiconductor device with ESD self-protection and LIN bus driver comprising the same |
CN106158959A (en) * | 2015-04-15 | 2016-11-23 | 中芯国际集成电路制造(上海)有限公司 | A kind of semiconductor device and electronic installation |
CN105428354A (en) * | 2015-12-17 | 2016-03-23 | 江南大学 | Electronic static discharge (ESD) protection device with bidirectional silicon controlled rectifier (SCR) structure embedded with interdigital N-channel metal oxide semiconductor (NMOS) |
CN106783942A (en) * | 2016-11-30 | 2017-05-31 | 辽宁大学 | A kind of two-way SCR structure for ESD protections |
CN107731812A (en) * | 2017-09-30 | 2018-02-23 | 湘潭大学 | A kind of nested refers to bidirectional thyristor electrostatic protection device more |
CN108899314A (en) * | 2018-05-23 | 2018-11-27 | 湖南大学 | electrostatic protection device |
CN108630680A (en) * | 2018-07-11 | 2018-10-09 | 湘潭大学 | A kind of interdigital nesting hybrid structure electrostatic dispensing device based on SCR |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9431389B2 (en) | ESD transistor for high voltage and ESD protection circuit thereof | |
CN101807598B (en) | PNPNP type triac | |
CN103378092B (en) | Bidirectional ESD (ESD) protection device | |
US8569836B2 (en) | Semiconductor device | |
CN104752417B (en) | Controllable silicon electrostatic protection device and forming method thereof | |
US7384802B2 (en) | ESD protection device for high voltage | |
US20070034956A1 (en) | Embedded silicon-controlled rectifier (SCR) for HVPMOS ESD protection | |
KR101847227B1 (en) | Electrostatic discharge transistor | |
TWI664709B (en) | Electrostatic discharge protection semiconductor device | |
US10504886B1 (en) | Low-capacitance electro-static-discharge (ESD) protection structure with two floating wells | |
CN109742071A (en) | A kind of ESD protective device of SOI power switch | |
EP3451379A1 (en) | Electrostatic discharge protection circuit with a bi-directional silicon controlled rectifier (scr) | |
CN107799517A (en) | ESD devices for semiconductor structure | |
CN108933130A (en) | Suitable for static discharge(ESD)The semiconductor device of protection | |
CN104241274B (en) | A kind of bidirectional ESD protective device based on lateral PNP structure | |
CN109935582A (en) | Bidirectional triode thyristor ESD-protection structure and soi structure | |
CN101017818A (en) | ESD protection circuit for enlarging the valid circulation area of the static current | |
CN104600068A (en) | High-voltage bidirectional ESD protective device based on longitudinal NPN structure | |
CN102034857B (en) | Bidirectional triode thyristor auxiliarily triggered by POMS field effect transistor | |
CN100470804C (en) | A protection circuit for constructing ESD release channel with the polycrystalline silicon | |
US20180145064A1 (en) | Self-biased bidirectional esd protection circuit | |
CN109962099A (en) | Bidirectional triode thyristor ESD-protection structure and soi structure | |
US10249614B2 (en) | Semiconductor device | |
CN100530652C (en) | Controllable silicon used for electrostatic discharge protection | |
CN109962098A (en) | Bidirectional triode thyristor ESD-protection structure and soi structure |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190702 |
|
RJ01 | Rejection of invention patent application after publication |