CN109952709A

CN109952709A - A kind of method and apparatus for channel coding in base station, user equipment

Info

Publication number: CN109952709A
Application number: CN201780069398.6A
Authority: CN
Inventors: 张晓博
Original assignee: Nantong Langheng Communication Technology Co ltd
Current assignee: Shanghai Langbo Communication Technology Co Ltd
Priority date: 2017-02-12
Filing date: 2017-02-12
Publication date: 2019-06-28
Anticipated expiration: 2037-02-12
Also published as: WO2018145306A1; CN116723542A; CN109952709B

Abstract

The invention discloses the method and apparatus for channel coding in a kind of base station, user equipment.Base station successively executes the first channel coding, sends the first wireless signal.Wherein, the first bit block is used for the input of first channel coding.First channel coding is based on polarization code.The output of the channel coding be used to generate first wireless signal.It include the bit in the bit and the second sub-blocks of bits in the first sub-blocks of bits in first bit block.Bit in first bit packet be used to generate first sub-blocks of bits.The quantity of bit in the first bit packet and second sub-blocks of bits is related or the first bit packet is related with the quantity of bit in first bit block.The quantity of bit in first sub-blocks of bits is greater than the quantity of the bit in the first bit packet.The present invention can mitigate user equipment blind examination burden, or support more flexible format transmission message.

Description

A kind of method and apparatus for channel coding in base station, user equipment

Technical field

The present invention relates to the transmission plans of the wireless signal in wireless communication system, more particularly to the method and apparatus of the transmission of channel coding.

Background technique

Polarization code (Polar Codes) is a kind of encoding scheme being put forward for the first time in 2008 by Bi Erken university, Turkey Erdal professor Arikan, the code building method of its capacity that symmetric binary input discrete memoryless channel(DMC) (B-DMC, Binary input Discrete Memoryless Channel) may be implemented.In 3GPP (3rd Generation Partner Project, third generation cooperative partner program) in RAN1#87 meeting, 3GPP has determined the control channel encoding scheme using Polar code scheme as 5G eMBB (enhancing mobile broadband) scene.

Traditional LTE (Long Term Evolution, long term evolution) DCI (Downlink Control Information different in system, Downlink Control Information) format corresponds to different coding bit numbers, UE (User Equipment, user equipment) PDCCH (Physical Downlink Control Channel) progress blind examination of all possible DCI format according to corresponding to current transmission mode to carrying DCI.The blind examination number of the side UE is consequently increased when the method for reseptance of this PDCCH will cause the increase of amount of bits candidate item corresponding to DCI.

Summary of the invention

Inventors discovered through research that, the n times power that the length of the corresponding input bit block of polarization code generator is 2, the N is positive integer, therefore, for the information bit within the scope of certain amount, the length of input bit block corresponding to channel encoder based on polarization code is fixed with used polarization code, and difference is only to freeze the difference of amount of bits.This characteristic of polarization code can be used for by the corresponding bit of instruction information of DCI amount of bits, DCI bit, the bit block composition input bit block for freezing bit composition regular length, for generating polarization code.Receiving end is decoded first using the characteristic of polarization code serial decoding device and obtains the instruction information of the quantity of the DCI bit, the exact amount for freezing bit in input bit block is determined secondly by the instruction information, then the exact amount for freezing bit is used for subsequent decoding and obtains DCI bit, to reduce UE Blind examination number and processing load.The instruction information needs to be guaranteed higher transmission reliability as by the decoded key message of DCI bit for the decoding that takes the lead in.Therefore, error-checking code or error correcting code can be used for carrying out the instruction information the first coding, the output of first coding corresponding bit in the input bit block as the instruction information, to ensure that the transmission reliability of the instruction information.

In view of the above-mentioned problems, the present invention provides solutions.It should be noted that in the absence of conflict, the feature in embodiments herein and embodiment can be arbitrarily combined with each other.For example, the feature in embodiment and embodiment in the first node of the application can be applied in second node, vice versa.

The invention discloses a kind of methods being used in the base station of channel coding, wherein includes the following steps:

Step A. executes the first channel coding；

Step B. sends the first wireless signal.

Wherein, the first bit block is used for the input of first channel coding.First channel coding is based on polarization code.The output of first channel coding be used to generate first wireless signal.It include the bit in the bit and the second sub-blocks of bits in the first sub-blocks of bits in first bit block.Bit in first bit packet be used to generate first sub-blocks of bits.The quantity of bit in the first bit packet and second sub-blocks of bits is related or the first bit packet is related with the quantity of bit in first bit block.Positive integer bit is respectively included in the first bit packet, first sub-blocks of bits and second sub-blocks of bits.The quantity of bit in second sub-blocks of bits is a candidate value in K candidate value.The candidate value is positive integer, and the K is greater than 1 positive integer.The quantity of bit in first sub-blocks of bits is greater than the quantity of the bit in the first bit packet.

As one embodiment, the above method is advantageous in that, the information bit of different number uses identical channel coding, to reduce the blind examination number and time-frequency occupancy resource at the end UE.Bit in first sub-blocks of bits is determined for the other information in addition to the first bit packet, or the transmission reliability for guaranteeing the first bit packet.

As one embodiment, first wireless signal is multicarrier symbol.

As one embodiment, first wireless signal is OFDM (Orthogonal Frequency Division Multiplexing, orthogonal frequency division multiplexing) symbol.

As one embodiment, first wireless signal is DFT-S-OFDM (Discrete Fourier Transform Spread OFDM, discrete fourier change orthogonal frequency division multiplexing) symbol.

As one embodiment, the output of first channel coding generates first wireless signal after ovennodulation.

As one embodiment, the output of first channel coding generates first wireless signal after multiple antennas precoding.

As one embodiment, input of first bit block as first channel coding.

The each section of input as first channel coding as one embodiment, after the first bit block segmentation.

As one embodiment, first bit block corresponds to the partial bit of the first channel coding input.

As one embodiment, first bit block only includes all information bits in the first channel coding input.

As one embodiment, first bit block only includes the corresponding check bit in partial information position and the partial information position in the first channel coding input.

As one embodiment, first bit block corresponds to all bits of the first channel coding input.

As one embodiment, the quantity of the bit in explicit instruction second sub-blocks of bits of the first bit packet.

As one embodiment, the quantity of the bit in implicit instruction second sub-blocks of bits of the first bit packet.

As one embodiment, index of the candidate value in the K candidate value is used for determining the first bit packet.

As one embodiment, the bit in the value of first sub-blocks of bits and second sub-blocks of bits is unrelated.

As one embodiment, position of the bit in first bit block in first sub-blocks of bits is default determination.

It is described default not need downlink signaling configuration it is confirmed that referring to as one embodiment.

It is described default not need the explicit configuration of downlink signaling it is confirmed that referring to as one embodiment.

It is described default it is confirmed that referring to fixed as one embodiment.

Described default it is confirmed that referring to as one embodiment: first sub-blocks of bits for giving bit number, position of first sub-blocks of bits in first bit block is fixed.

Described default it is confirmed that referring to as one embodiment: first bit block for giving bit number, position of first sub-blocks of bits in first bit block is fixed.

Described default it is confirmed that referring to as one embodiment: first bit block for giving running time-frequency resource, position of first sub-blocks of bits in first bit block is fixed.

As one embodiment, position of the bit in first bit block in first sub-blocks of bits is discontinuous.

As one embodiment, position of the bit in first bit block in first sub-blocks of bits is continuous.

As one embodiment, position of the bit in first bit block in second sub-blocks of bits is discontinuous.

As one embodiment, position of the bit in first bit block in second sub-blocks of bits is continuous.

As one embodiment, first sub-blocks of bits is in the forefront of first bit block.First bit and the second bit are any two bits in first bit block, and first bit refers to before second bit: in the coding sequences that receiver is assumed in the base station, first bit is decoded prior to second bit.

As one embodiment, the quantity of the bit in first sub-blocks of bits is fixed constant.

As one embodiment, the quantity of the bit in first sub-blocks of bits is configurable.

As one embodiment, the K candidate value respectively corresponds K kind DCI (Downlink Control Information, Downlink Control Information) format (Format).

As one embodiment, the base station hypothesis receiver probability that mistake decodes first sub-blocks of bits under the premise of assuming based on first is not higher than first threshold, and first hypothesis is the maximum value that the quantity of the bit in second sub-blocks of bits is equal in the K candidate value.

As one embodiment, the recipient of first wireless signal is based on the receiver and calculates the first code rate, and the base station, the base station is notified to be based on first code rate and carry out first channel coding to first bit block first code rate.It is one of the condition that the probability that mistake decodes first sub-blocks of bits under the premise of assuming based on described first is not higher than the first threshold that the corresponding code rate of first bit block, which is less than or equal to first code rate,.

As one embodiment, the recipient of first wireless signal is based on the receiver and calculates the first SNR (Signal-to-Noise Ratio, signal-to-noise ratio), and notify the base station, the base station that the transmission power of first wireless signal is set based on the first SNR the first SNR.Institute It is that the probability that mistake decodes first sub-blocks of bits under the premise of assuming based on described first is not higher than one of the condition of the first threshold that the corresponding SNR of the first wireless signal, which is stated, more than or equal to the first SNR.

As one embodiment, the recipient of first wireless signal is based on the receiver and calculates the first modulation system, and notify the base station, the base station that the modulation system of first wireless signal is set based on first modulation system first modulation system.It is one of condition that the probability that mistake decodes first sub-blocks of bits under the premise of assuming based on described first is not higher than the first threshold that the corresponding modulation system of first wireless signal is higher than the first modulation system reliability.

As one embodiment, at least one of { the corresponding code rate of first bit block, modulation system of first wireless signal, the transmission power of first wireless signal } is the condition for meeting the hypothesis.

As one embodiment, first sub-blocks of bits is the result after the first bit packet encoder.

As one embodiment, first sub-blocks of bits includes redundancy check bits corresponding to bit in bit and the first bit packet in the first bit packet.

As one embodiment, first sub-blocks of bits includes the bit in the first bit packet for repeat X times, and the X is greater than 1.

As one embodiment, the bit in first sub-blocks of bits is used for determining the other information in addition to the first bit packet.

A sub- embodiment as above-described embodiment, second sub-blocks of bits includes the { domain CIF, resource allocation field, MCS (Modulation and Coding Status, modulation coding state) domain, the domain NDI, HARQ process number domain, at least one of the domain TPC is used to indicate the domain of the parameter of DMRS, CRC bit }.

Specifically, according to an aspect of the present invention, which is characterized in that output of the first bit packet after the first coding is used for determining first sub-blocks of bits.

As one embodiment, the above method is advantageous in that, improves the transmission reliability of the first bit packet.

As one embodiment, first coding be used to improve the transmission reliability of the first bit packet.

As one embodiment, first coding is CRC (Circular Redundancy Check, cyclic redundancy check) coding.

As one embodiment, first coding is linear block codes.

As one embodiment, first coding is convolutional code.

As one embodiment, first coding is TBCC (Tail-biting Convolutional Code, tail-biting convolutional code).

As one embodiment, first sub-blocks of bits is the output of first coding.

As one embodiment, the partial bit in first sub-blocks of bits is the output of first coding.

As one embodiment, the bit in first sub-blocks of bits is made of the output of bit and first coding in the first bit packet.

As one embodiment, the output of first coding is the corresponding CRC bit of the first bit packet.

As one embodiment, the output of first coding is the corresponding PC bit of the first bit packet.

Specifically, according to an aspect of the present invention, which is characterized in that the step A further includes following steps:

Step A0. sends the first information.

Wherein, the first information is used for determining at least one of { quantity of the bit in first sub-blocks of bits, described first coding, the K candidate value }.

As one embodiment, the above method is advantageous in that, supports to carry out more flexible configuration to information bit transmission, to improve efficiency of transmission and reliability.

As one embodiment, the first information is semi-statically configured.

As one embodiment, the first information is UE specific.

As one embodiment, the first information includes one or more RRC (Radio Resource Control, wireless heterogeneous networks) IE (Information Element, information particle).

As a sub- embodiment of above-described embodiment, the part RRC IE in the multiple RRC IE is that cell is public, and RRC IE described in the rest part in the multiple RRC IE is UE specific.

As one embodiment, at least one of explicit instruction of the first information { quantity of the bit in first sub-blocks of bits, first coding, the K candidate value }.

As one embodiment, at least one of implicit instruction of the first information { quantity of the bit in first sub-blocks of bits, first coding, the K candidate value }.

As one embodiment, the first information indicates the current transmission setting of the UE, the biography At least one of implicit instruction of defeated setting { quantity of the bit in first sub-blocks of bits, first coding, the K candidate value }.

As one embodiment, the transmission setting includes the relevant parameter of multiple antennas.

As one embodiment, the transmission setting includes that carrier wave polymerize relevant parameter.

Step A1. determines the quantity of the bit in third sub-blocks of bits.

Wherein, first bit block further includes the bit in the third sub-blocks of bits, and the bit in the third sub-blocks of bits is to freeze bit.Maximum value in the K candidate value is related with the quantity of the bit in the third sub-blocks of bits.

As one embodiment, the above method is advantageous in that, further ensures the reliability of the first sub-blocks of bits transmission.

As one embodiment, position of the bit in first bit block in the third sub-blocks of bits is discontinuous.

As one embodiment, position of the bit in first bit block in the third sub-blocks of bits is continuous.

As one embodiment, the quantity of bit in the third sub-blocks of bits ensures that receiver mistake under the premise of assuming based on first decodes the probability of first sub-blocks of bits not higher than the first threshold, and first hypothesis is the maximum value that the quantity of the bit in second sub-blocks of bits is equal in the K candidate value.

As one embodiment, the quantity of the bit in first bit block is L, and the quantity of the bit in first sub-blocks of bits is L1, and the quantity of the bit in second sub-blocks of bits is L2.The quantity of bit in the third sub-blocks of bits is equal to L-L1-L2.The L, the L1 and the L2 are positive integers, wherein the L is greater than L1+L2.

As one embodiment, the quantity of the bit in first bit block is L, and the quantity of the bit in first sub-blocks of bits is L1, and the maximum value in the K candidate value is K1, and the quantity of the bit in the third sub-blocks of bits is greater than L-L1-K1.

As one embodiment, the base station is based on the first threshold and is assigned with P1 CCE (Control Channel Element to first bit block, control channel particle), the quantity of the bit in code word carried on the P1 CCE is the L.

As one embodiment, the quantity of the bit in the third sub-blocks of bits ensures receiver in base The probability that mistake decodes first bit block under the premise of assuming in second is not higher than second threshold, second hypothesis is: according to the quantity for the bit that first sub-blocks of bits that first hypothesis receives is properly decoded, and is used for determining in second sub-blocks of bits.

As one embodiment, the first threshold is less than the second threshold.

As one embodiment, the first threshold is equal to the second threshold.

As one embodiment, first sub-blocks of bits that first sub-blocks of bits received and the base station are sent is identical (i.e. described first sub-blocks of bits is properly decoded).

As one embodiment, first sub-blocks of bits that first sub-blocks of bits received and the base station are sent is different (i.e. described first sub-blocks of bits is decoded by mistake).

As one embodiment, { UCI (the Uplink Control Information of recipient's feedback of first wireless signal, ascending control information), the modulation system of first wireless signal, the transmission power of first wireless signal } at least one of be used for determining the quantity of bit in the third sub-blocks of bits.

As one embodiment, the third sub-blocks of bits freezes bit set and second including first and freezes bit set.Maximum value in the K candidate value is used for determining the described first quantity for freezing the bit in bit set.The quantity of bit in second sub-blocks of bits is used for determining the described second quantity for freezing the bit in bit set.

As one embodiment, the quantity of the bit in first bit block is L, and the quantity of the bit in first sub-blocks of bits is L1, and the quantity of the bit in second sub-blocks of bits is L2, and the maximum value in the K candidate value is K1.Described first quantity for freezing the bit in bit set is equal to L-L1-K1.Described second quantity for freezing the bit in bit set is equal to K1-L2.The L, the L1, the L2 and the K1 are positive integers.

Specifically, according to an aspect of the present invention, which is characterized in that first coding is based on error-detecting code (error-detecting code).

As one embodiment, the above method is advantageous in that, error-detecting code can be used for detecting the correctness of instruction information transmission, to improve the transmission reliability of detection instruction information.

As one embodiment, the error-detecting code is CRC (Circular Redundancy Check, cyclic redundancy check) code.

As one embodiment, the error-detecting code is PC (Parity Check, even-odd check) code.

Specifically, according to an aspect of the present invention, which is characterized in that first coding is based on mistake Accidentally correction code (error-correcting code).

As one embodiment, the above method is advantageous in that, error correcting code can correct the erroneous transmissions of instruction information, to improve the transmission reliability of detection instruction information.

As one embodiment, the error correcting code is TBCC (Tail-biting Block Convolutional Code, tail-biting convolutional code).

As one embodiment, the error correcting code is Turbo code.

As one embodiment, first coding includes first order coding and second level coding, and the output of the first order coding is used for the input of the second level coding.First coding uses error-detecting code, and the second level coding uses error correcting code.

Specifically, according to an aspect of the present invention, which is characterized in that the ergodic capacity of the bit mapped subchannel in first sub-blocks of bits is less than the ergodic capacity of the bit mapped subchannel in second sub-blocks of bits.

As one embodiment, the above method is advantageous in that, the corresponding relatively described preferable subchannel of first sub-blocks of bits of second sub-blocks of bits, to improve the transmission reliability of second sub-blocks of bits.

As one embodiment, the channel capacity for the subchannel (Sub-channel) that any bit in second sub-blocks of bits is mapped is greater than the channel capacity for the subchannel that any bit in first sub-blocks of bits is mapped.

As one embodiment, it is less than there are channel capacity corresponding at least one subchannel channel capacity corresponding at least one subchannel in the bit mapped subchannel in first sub-blocks of bits in bit mapped subchannel in second sub-blocks of bits, the average value of the channel capacity of the bit mapped subchannel in second sub-blocks of bits is greater than the average value of the channel capacity of the bit mapped subchannel in first sub-blocks of bits.

As one embodiment, the base station assumes that the coding sequences of the receiver of the first reception of wireless signals person are from the corresponding bit of the low subchannel of channel capacity to the corresponding bit of the high subchannel of channel capacity.

Specifically, according to an aspect of the present invention, which is characterized in that any bit in first sub-blocks of bits is decoded before any bit in second sub-blocks of bits.

As one embodiment, the above method is advantageous in that, first sub-blocks of bits can take the lead on coding sequences, to improve decoding efficiency.

As one embodiment, the third sub-blocks of bits is freezed bit set and second including first and is frozen Tie bit set.Maximum value in the K candidate value is used for determining the described first quantity for freezing the bit in bit set.The quantity of bit in second sub-blocks of bits is used for determining the described second quantity for freezing the bit in bit set.Receiver executes the serial channel based on first channel coding to first bit block that receives and decodes: 1) freezing bit in bit set as known bits for described first, serial decoding is executed to the output of the subchannel where the bit in first sub-blocks of bits, obtains the estimated value of first sub-blocks of bits；2) the first bit packet is obtained using the estimated value of first sub-blocks of bits as the input of the decoder based on first coding；3) the first bit packet is used to determine the quantity of the bit in second sub-blocks of bits, so that it is determined that described second freezes bit set；4) the first bit packet is used to restore the bit in first sub-blocks of bits, described second is freezed the bit in the bit and first sub-blocks of bits in bit set as known bits, serial decoding is executed to the output of the subchannel where the bit in second sub-blocks of bits, obtains the bit (restoring first bit block) in second sub-blocks of bits.

As one embodiment, the sequence of serial channel decoding based on first channel coding is that the capacity of subchannel corresponding to any bit from the corresponding bit of the low subchannel of channel capacity to the corresponding bit of the high subchannel of channel capacity, in first sub-blocks of bits will be lower than the capacity of subchannel corresponding to any bit in second sub-blocks of bits.

As one embodiment, described first capacity for freezing subchannel corresponding to any bit in bit set will be lower than the capacity of subchannel corresponding to any bit in first sub-blocks of bits, and the capacity of subchannel corresponding to any bit in first sub-blocks of bits will freeze the capacity of subchannel corresponding to any bit in bit set lower than described second.

As one embodiment, the sequence of serial channel decoding based on first channel coding is the capacity of subchannel corresponding to any bit that the capacity of subchannel corresponding to any bit from the corresponding bit of the high subchannel of channel capacity to the corresponding bit of the low subchannel of channel capacity, in first sub-blocks of bits will be higher than in second sub-blocks of bits.

As one embodiment, the first bit block described in first channel coding obtains the output bit block multiplied by the generator matrix based on polarization code.Any one ratio in first sub-blocks of bits The row serial number of the special corresponding generator matrix is less than the row serial number of the corresponding generator matrix of any one bit in second sub-blocks of bits.Assume receiver to the incremental order that the coding sequences of the bit block received are according to the row serial number of the corresponding generator matrix of bit in the bit block received in the base station.

As one embodiment, the generator matrix is Kronecker matrix.

As one embodiment, the generator matrix is the matrix that the row serial number of Kronecker matrix obtains after bit reversal.

Specifically, according to an aspect of the present invention, which is characterized in that second sub-blocks of bits includes the first bit set and the second bit set.The bit in bit and first bit set in first sub-blocks of bits be used to generate second bit set.

As one embodiment, the above method is advantageous in that, second bit set is as the redundancy check to first sub-blocks of bits and first bit set, to improve the reliability of transmission.

As one embodiment, the bit in second bit set is CRC (Circular Redundancy Check, cyclic redundancy check) bit corresponding to bit in bit and second sub-blocks of bits in first sub-blocks of bits.

As one embodiment, the bit in second bit set is PC (Parity Check, even-odd check) bit corresponding to bit in bit and second sub-blocks of bits in first sub-blocks of bits.

As one embodiment, the bit in second bit set corresponds to a CRC generator polynomial, and the input of the CRC generator polynomial is the bit in bit and second sub-blocks of bits in first sub-blocks of bits.

Specifically, according to an aspect of the present invention, it is characterized in that, bit in the first bit packet is also used for determining { position of the bit in first bit block in second sub-blocks of bits, at least one of the information format of second sub-blocks of bits, multinomial corresponding to the redundancy check bit of first bit block }.

As one embodiment, the above method is advantageous in that, more flexible configuration can be carried out to second sub-blocks of bits, saves additional signaling overhead.

Position of the bit in instruction second sub-blocks of bits of bit explicitly in first bit block as one embodiment, in the first bit packet.

Position of the bit in instruction second sub-blocks of bits of bit implicitly in first bit block as one embodiment, in the first bit packet.

As one embodiment, bit indication in the first bit packet relative position of second sub-blocks of bits and first sub-blocks of bits.

As one embodiment, the bit in the first bit packet explicitly indicates the information format of second sub-blocks of bits.

As one embodiment, the bit in the first bit packet implicitly indicates the information format of second sub-blocks of bits.

As one embodiment, the quantity of the bit in bit indication in the first bit packet second sub-blocks of bits, the quantity of bit and the information format of second sub-blocks of bits in two sub-blocks of bits are corresponded.

As one embodiment, the bit in the first bit packet is used for the information format that part determines second sub-blocks of bits.

As one embodiment, bit and other configurations parameter in the first bit packet determine the information format of second sub-blocks of bits together.

As one embodiment, the bit in the first bit packet explicitly indicates multinomial corresponding to the redundancy check bit in first bit block.

As one embodiment, the bit in the first bit packet implicitly indicates multinomial corresponding to the redundancy check bit in first bit block.

As one embodiment, the quantity of the quantity of the bit in bit indication in the first bit packet second sub-blocks of bits, the bit in two sub-blocks of bits determines multinomial corresponding to the redundancy check bit in first bit block.

Specifically, according to an aspect of the present invention, which is characterized in that first wireless signal transmits on physical layer control channel or first sub-blocks of bits and second sub-blocks of bits belong to the same Downlink Control Information (DCI).

As one embodiment, the above method is advantageous in that, reduces the side UE to the blind examination number of physical layer control channel.

As one embodiment, the physical layer control channel is the physical layer channel that can only carry physical layer signaling.

As one embodiment, the DCI is UE specific.

As one embodiment, the physical layer control channel is PDCCH.

As one embodiment, the physical layer control channel is ePDCCH (enhanced PDCCH enhances physical layer down control channel).

As one embodiment, the physical layer control channel is sPDCCH (short PDCCH, short physical layer descending control channel).

As one embodiment, the physical layer control channel is NR-PDCCH (New Radio PDCCH, new radio physical layer down control channel).

A kind of method being used in the user equipment of channel coding of the present invention, wherein include the following steps:

Step A. receives the first wireless signal；

Step B. executes the first channel decoding.

Wherein, corresponding first channel coding of first channel decoding, first channel coding are based on polarization code, and the first bit block is used for the input of first channel coding.The output of first channel coding be used to generate first wireless signal.It include the bit in the bit and the second sub-blocks of bits in the first sub-blocks of bits in first bit block.Bit in first bit packet be used to generate first sub-blocks of bits.The quantity of bit in the first bit packet and second sub-blocks of bits is related or the first bit packet is related with the quantity of bit in first bit block.Positive integer bit is respectively included in the first bit packet, first sub-blocks of bits and second sub-blocks of bits.The quantity of bit in second sub-blocks of bits is a candidate value in K candidate value.The candidate value is positive integer, and the K is greater than 1 positive integer.The quantity of bit in first sub-blocks of bits is greater than the quantity of the bit in the first bit packet.

As one embodiment, first channel decoding be used to restore first bit block.

As one embodiment, first channel decoding be used to restore second sub-blocks of bits.

As one embodiment, first channel decoding be used to restore the partial bit in second sub-blocks of bits.

As one embodiment, first wireless signal carries the corresponding check information of first bit block, and the channel decoding is based on the check information and judges whether correctly to restore first bit block.

It include the corresponding check information of information bit in first bit block as one embodiment, in first bit block, the channel decoding is based on the check information and judges whether correctly to restore first bit block.

Specifically, according to an aspect of the present invention, output of the first bit packet after the first coding is used for determining first sub-blocks of bits.

Specifically, according to an aspect of the present invention, the step A further includes following steps:

Step A0. receives the first information.

Specifically, according to an aspect of the present invention, which is characterized in that the step B further includes following steps:

Step B0. determines the quantity of the bit in third sub-blocks of bits.

As one embodiment, the quantity of the bit in the third sub-blocks of bits ensures that receiver mistake under the premise of assuming based on described first decodes the probability of first sub-blocks of bits not higher than the first threshold.

As one embodiment, the quantity of the bit in first sub-blocks of bits is L1.The quantity of bit in second sub-blocks of bits is L2.The quantity of bit in the third sub-blocks of bits is equal to L-L1-L2.The L, the L1 and the L2 are positive integers, wherein the L is greater than L1+L2.

Specifically, according to an aspect of the present invention, it is characterised in that, first coding is based on error-detecting code (error-detecting code).

Specifically, according to an aspect of the present invention, which is characterized in that first coding is based on error correcting code (error-correcting code).

As one embodiment, first channel decoding is serial channel decoding.First sub-blocks of bits is first restored than second sub-blocks of bits.

As one embodiment, first channel decoding is used during after restoring first sub-blocks of bits in subsequent decoding using first sub-blocks of bits as known bits.

As one embodiment, bit composition of first bit block by the bit in first sub-blocks of bits, in the bit and the third sub-blocks of bits in second sub-blocks of bits.The third sub-blocks of bits freezes bit set and second including first and freezes bit set.In the K candidate value Maximum value is used for determining the described first quantity for freezing the bit in bit set.The quantity of bit in second sub-blocks of bits is used for determining the described second quantity for freezing the bit in bit set.The process of first channel decoding is: 1) freezing bit in bit set as known bits for described first, serial decoding is executed to the output of the subchannel where the bit in first sub-blocks of bits, obtains the estimated value of first sub-blocks of bits；2) the first bit packet is obtained using the estimated value of first sub-blocks of bits as the input of the decoder based on first coding；3) the first bit packet is used to determine the quantity of the bit in second sub-blocks of bits, so that it is determined that described second freezes bit set；4) the first bit packet is used to restore the bit in first sub-blocks of bits, bit and described second in first sub-blocks of bits is freezed into bit in bit set as known bits, serial decoding is executed to the output of the subchannel where the bit in second sub-blocks of bits, obtains the bit (restoring first bit block) in second sub-blocks of bits.

As one embodiment, whether the bit in second bit set be used to verify the bit in the bit and the first set in first sub-blocks of bits correct to judge to receive.

As one embodiment, the verification is PC (Parity Check, even-odd check).

As one embodiment, the verification is CRC (Circular Redundancy Check, cyclic redundancy check).

Specifically, according to an aspect of the present invention, first wireless signal transmits on physical layer control channel or first sub-blocks of bits and second sub-blocks of bits belong to the same Downlink Control Information (DCI).

The invention discloses a kind of base station equipments for being used for channel coding, wherein including following module:

- the first execution module: for executing the first channel coding；

- the first sending module: for sending the first wireless signal.

Wherein, the first bit block is used for the input of first channel coding.First channel is compiled Code is based on polarization code.The output of first channel coding be used to generate first wireless signal.It include the bit in the bit and the second sub-blocks of bits in the first sub-blocks of bits in first bit block.Bit in first bit packet be used to generate first sub-blocks of bits.The quantity of bit in the first bit packet and second sub-blocks of bits is related or the first bit packet is related with the quantity of bit in first bit block.Positive integer bit is respectively included in the first bit packet, first sub-blocks of bits and second sub-blocks of bits.The quantity of bit in second sub-blocks of bits is a candidate value in K candidate value.The candidate value is positive integer, and the K is greater than 1 positive integer.The quantity of bit in first sub-blocks of bits is greater than the quantity of the bit in the first bit packet.

As one embodiment, above-mentioned base station equipment is characterized in that, output of the first bit packet after the first coding is used for determining first sub-blocks of bits.

As one embodiment, above-mentioned base station equipment is characterized in that, first execution module also be used to send the first information.Wherein, the first information is used for determining at least one of { quantity of the bit in first sub-blocks of bits, described first coding, the K candidate value }.

As one embodiment, above-mentioned base station equipment is characterized in that, first execution module is also used for determining the quantity of the bit in third sub-blocks of bits.Wherein, first bit block further includes the bit in the third sub-blocks of bits, and the bit in the third sub-blocks of bits is to freeze bit.Maximum value in the K candidate value is related with the quantity of the bit in the third sub-blocks of bits.

As one embodiment, above-mentioned base station equipment is characterized in that, first coding is based on error-detecting code (error-detecting code).

As one embodiment, above-mentioned base station equipment is characterized in that, first coding is based on error correcting code (error-correcting code).

As one embodiment, above-mentioned base station equipment is characterized in that, the ergodic capacity of the bit mapped subchannel in first sub-blocks of bits is less than the ergodic capacity of the bit mapped subchannel in second sub-blocks of bits.

As one embodiment, above-mentioned base station equipment is characterized in that, any bit in first sub-blocks of bits is decoded before any bit in second sub-blocks of bits.

As one embodiment, above-mentioned base station equipment is characterized in that, second sub-blocks of bits includes the first bit set and the second bit set.The bit in bit and first bit set in first sub-blocks of bits be used to generate second bit set.

As one embodiment, above-mentioned base station equipment is characterized in that, the ratio in the first bit packet Spy is also used for determining at least one of { position of the bit in first bit block in second sub-blocks of bits, the information format of second sub-blocks of bits, multinomial corresponding to the redundancy check bit of first bit block }.

As one embodiment, above-mentioned base station equipment is characterized in that, first wireless signal transmits on physical layer control channel or first sub-blocks of bits and second sub-blocks of bits belong to the same Downlink Control Information (DCI).

The invention discloses a kind of methods being used in the user equipment of channel coding, wherein includes the following steps:

Step A. receives the first wireless signal；

Step B. executes the first channel decoding.

As one embodiment, above-mentioned user equipment is characterized in that, output of the first bit packet after the first coding is used for determining first sub-blocks of bits.

As one embodiment, above-mentioned user equipment is characterized in that, first receiving module also be used to receive the first information.Wherein, the first information is used for determining at least one of { quantity of the bit in first sub-blocks of bits, described first coding, the K candidate value }.

As one embodiment, above-mentioned user equipment is characterized in that, second execution module is also used for determining the quantity of the bit in third sub-blocks of bits.Wherein, first bit block further includes the bit in the third sub-blocks of bits, and the bit in the third sub-blocks of bits is to freeze bit.Maximum value in the K candidate value is related with the quantity of the bit in the third sub-blocks of bits.

As one embodiment, above-mentioned user equipment is characterized in that, first coding is based on error-detecting code (error-detecting code).

As one embodiment, above-mentioned user equipment is characterized in that, first coding is based on error correcting code (error-correcting code).

As one embodiment, above-mentioned user equipment is characterized in that, the ergodic capacity of the bit mapped subchannel in first sub-blocks of bits is less than the ergodic capacity of the bit mapped subchannel in second sub-blocks of bits.

As one embodiment, above-mentioned user equipment is characterized in that, any bit in first sub-blocks of bits is decoded before any bit in second sub-blocks of bits.

As one embodiment, above-mentioned user equipment is characterized in that, second sub-blocks of bits includes the first bit set and the second bit set.The bit in bit and first bit set in first sub-blocks of bits be used to generate second bit set.

As one embodiment, above-mentioned user equipment is characterized in that, bit in the first bit packet is also used for determining { position of the bit in first bit block in second sub-blocks of bits, at least one of the information format of second sub-blocks of bits, multinomial corresponding to the redundancy check bit of first bit block }.

As one embodiment, above-mentioned user equipment is characterized in that, first wireless signal transmits on physical layer control channel or first sub-blocks of bits and second sub-blocks of bits belong to the same Downlink Control Information (DCI).

It is compared as one embodiment with traditional scheme, the present invention has following advantage:

The characteristic of Polar code serial decoding is utilized, by indicating inside code block, reduces the blind examination number of the side UE；

By the additional coding to instruction information, the reliability of instruction information transmission is increased；

Support more flexible more diverse DCI format；

It ensure that the reliability of DCI transmission.

Detailed description of the invention

By reading referring to the detailed description of non-limiting embodiments in the following drawings, other features, objects, and advantages of the present invention be will become more apparent:

Fig. 1 shows the flow chart of wireless transmission according to an embodiment of the invention；

Fig. 2 shows the schematic diagrames of first bit block of construction according to an embodiment of the invention；

Fig. 3 show the first bit block and the first wireless signal according to an embodiment of the invention it Between relationship schematic diagram；

Fig. 4 shows the schematic diagram of the first coding according to an embodiment of the invention；

Fig. 5 shows the schematic diagram of { the first sub-blocks of bits, the first bit set in the second sub-blocks of bits } according to an embodiment of the invention with the relationship of the second bit set in the second sub-blocks of bits；

Fig. 6 shows the schematic diagram of the first channel coding according to an embodiment of the invention；

Fig. 7 shows the schematic diagram of the first channel decoding according to an embodiment of the invention；

Fig. 8 shows the schematic diagram of the mapping relations of the first sub-blocks of bits and the second sub-blocks of bits according to an embodiment of the invention on sub-channels；

Fig. 9 shows the schematic diagram of the first sub-blocks of bits and the second sub-blocks of bits according to an embodiment of the invention on coding sequences；

Figure 10 shows the structural block diagram according to an embodiment of the invention for the processing unit in base station；

Figure 11 shows the structural block diagram according to an embodiment of the invention for the processing unit in user equipment.

Embodiment 1

Embodiment 1 illustrates the flow chart of wireless transmission, as shown in Fig. 1.In attached drawing 1, base station N1 is that the serving cell of UE U2 maintains base station.In attached drawing 1, the step in box F1, box F2 and box F3 is optional respectively.

For N1, the first information is sent in step s 11；The quantity of bit in third sub-blocks of bits is determined in step s 12；The first channel coding is executed in step s 13；The first wireless signal is sent in step S14.

For U2, the first information is received in the step s 21；The first wireless signal is received in step S22；The quantity of the bit in third sub-blocks of bits is determined in step S23；The first channel decoding is executed in step s 24.

In embodiment 1, the first bit block is used for the input of the first channel coding by N1.First channel coding is based on polarization code.First channel decoding corresponds to the first channel coding.The output of first channel coding is by N1 for generating first wireless signal.It include the bit in the bit and the second sub-blocks of bits in the first sub-blocks of bits in first bit block.Bit in first bit packet is by N1 for generating first sub-blocks of bits.The first bit packet is related with the quantity of bit in second sub-blocks of bits.Divide in the first bit packet, first sub-blocks of bits and second sub-blocks of bits It Bao Kuo not positive integer bit.The quantity of bit in second sub-blocks of bits is a candidate value in K candidate value.The candidate value is positive integer, and the K is greater than 1 positive integer.The quantity of bit in first sub-blocks of bits is greater than the quantity of the bit in the first bit packet.

As the sub- embodiment 1 of embodiment 1, output of the first bit packet after the first coding is used for determining first sub-blocks of bits.

As the sub- embodiment 2 of embodiment 1, the step in box F1 is selected, the first information is used for determining at least one of { quantity of the bit in first sub-blocks of bits, described first coding, the K candidate value }.

As the sub- embodiment 3 of embodiment 1, box F2 is selected, first bit block further includes the bit in third sub-blocks of bits, and the bit in the third sub-blocks of bits is to freeze bit.Maximum value in the K candidate value is related with the quantity of the bit in the third sub-blocks of bits.

As the sub- embodiment 4 of embodiment 1, first coding is based on error-detecting code (error-detecting code).

As the sub- embodiment 5 of embodiment 1, first coding is based on error correcting code (error-correcting code).

As the sub- embodiment 6 of embodiment 1, the ergodic capacity of the bit mapped subchannel in first sub-blocks of bits is less than the ergodic capacity of the bit mapped subchannel in second sub-blocks of bits.

As the sub- embodiment 7 of embodiment 1, any bit in first sub-blocks of bits is decoded before any bit in second sub-blocks of bits.

As the sub- embodiment 8 of embodiment 1, second sub-blocks of bits includes the first bit set and the second bit set.The bit in bit and first bit set in first sub-blocks of bits be used to generate second bit set.

Sub- embodiment 9 as embodiment 1, bit in the first bit packet is also used for determining { position of the bit in first bit block in second sub-blocks of bits, at least one of the information format of second sub-blocks of bits, multinomial corresponding to the redundancy check bit of first bit block }.

As the sub- embodiment 10 of embodiment 1, first wireless signal transmits on physical layer control channel or first sub-blocks of bits and second sub-blocks of bits belong to the same Downlink Control Information (DCI).

As the sub- embodiment 11 of embodiment 1, the step in box F3 exists, first bit Block further includes the bit in the third sub-blocks of bits, and the bit in the third sub-blocks of bits is to freeze bit.Maximum value in the K candidate value is related with the quantity of the bit in the third sub-blocks of bits.

As the sub- embodiment 12 of embodiment 1, the first bit packet indicates the format of the corresponding physical layer signaling of first bit block.

As the sub- embodiment 13 of embodiment 1, quantity of the first bit packet from the bit indicated in the K candidate value in second sub-blocks of bits.

As the sub- embodiment 14 of embodiment 1, each bit in the first bit packet occurs X times in first sub-blocks of bits, and the X is greater than 1 positive integer.

As the sub- embodiment 15 of embodiment 1, the quantity of bit is equal to ceil (log2 (K)) in the first bit packet, and wherein ceil expression rounds up.

As the sub- embodiment 16 of embodiment 1, the channel capacity for the subchannel (Sub-channel) that any bit in second sub-blocks of bits is mapped is greater than the channel capacity for the subchannel that any bit in first sub-blocks of bits is mapped.

As the sub- embodiment 17 of embodiment 1, the corresponding sub-channel index of any bit in first sub-blocks of bits is less than the index of the corresponding subchannel of any bit in second sub-blocks of bits.

In the absence of conflict, above-mentioned sub- embodiment 1-11 being capable of any combination.

Embodiment 2

Embodiment 2 illustrates the schematic diagram of the first bit block of construction, as shown in Fig. 2.

In example 2, the first bit block is used for the input of the first channel coding by base station, bit composition in bit and third sub-blocks of bits of the bit in first bit block by the bit in the first sub-blocks of bits, in the second sub-blocks of bits.The quantity of bit in first bit block is L, and the quantity of the bit in first sub-blocks of bits is L1, and the quantity of the bit in second sub-blocks of bits is L2.The quantity that the bit in the third sub-blocks of bits is calculated according to the L, the L1 and the L2 for the base station is L-L1-L2.Bit in the third sub-blocks of bits is to freeze bit.The bit that freezes is the bit with default value.The base station construction line number and columns are all switching matrix (Permutation Matrix) P of L, first sub-blocks of bits, second sub-blocks of bits and the third sub-blocks of bits are cascaded to obtain the bit sequence that length is L, then the bit sequence is obtained into first bit block multiplied by the switching matrix P.The switching matrix refers to: any a line of matrix or a column only include one 1, remaining is 0。

As the sub- embodiment 1 of embodiment 2, the bit in first sub-blocks of bits is continuous in first bit block.

As the sub- embodiment 2 of embodiment 2, the bit in first sub-blocks of bits is discontinuous in first bit block.

As the sub- embodiment 3 of embodiment 2, the bit in second sub-blocks of bits is continuous in first bit block.

As the sub- embodiment 4 of embodiment 2, the bit in second sub-blocks of bits is discontinuous in first bit block.

As the sub- embodiment 5 of embodiment 2, the bit in the third sub-blocks of bits is continuous in first bit block.

As the sub- embodiment 6 of embodiment 2, the bit in the third sub-blocks of bits is discontinuous in first bit block.

Embodiment 3

Embodiment 3 illustrates the schematic diagram of the relationship between the first bit block and the first wireless signal, as shown in Fig. 3.

In embodiment 3, in base station end, the first bit block is used for the input of the first channel coding module, and the output of first channel coding module obtains the first wireless signal after module after post treatment.At the end UE, first wireless signal is used for the input of the first channel decoding module in the output after preprocessing module, and first bit block is the output of the first channel decoding module.First channel coding module and the first channel decoding module are coding module and decoding module based on polarization code respectively.

Sub- embodiment 1 as embodiment 3, first wireless signal is the OFDM symbol for carrying first bit block, post-processing operation in the post-processing module includes the operation that modulation mapping, multiple antennas precoding, RE (Resource Element, resource particle) mapping and ofdm signal generate.

Sub- embodiment 2 as embodiment 3, first wireless signal is the OFDM symbol for carrying first bit block, and the pretreatment operation in the preprocessing module includes the operation of ofdm signal demodulation, channel estimation, channel equalization, RE demapping, demodulation mapping.

As the sub- embodiment 3 of embodiment 3, the output of first channel coding is described first The result of bit block and a Kronecker matrix multiple.

As the sub- embodiment 4 of embodiment 3, the output of first channel coding is that bit sequence in first bit block is done to the result of the bit sequence formed after bit reversal and a Kronecker matrix multiple.

As the sub- embodiment 5 of embodiment 3, the first channel decoding module is SC (Successive Cancelation Decoding, serial to eliminate) decoder based on polarization code.

As the sub- embodiment 6 of embodiment 3, the first channel decoding module is SCL (Successive Cancellation List, serially eliminate inventory) decoder based on polarization code.

As the sub- embodiment 7 of embodiment 3, the first channel decoding module is based on SCS (Successive Cancellation Stack) decoder.

Embodiment 4

Embodiment 4 illustrates the schematic diagram of the first coding, as shown in Fig. 4.

In example 4, the first coding includes error-detecting code generation module and error correcting code generation module.First bit coating is used for the input of the error-detecting code generation module, with the first bit packet together as the input of the error correcting code generation module, the first sub-blocks of bits is the output of the error correcting code generation module for the output of the error-detecting code generation module.

As the sub- embodiment 1 of embodiment 4, the error-detecting code is cyclic redundancy check code.

As the sub- embodiment 2 of embodiment 4, the error-detecting code is parity check code.

As the sub- embodiment 3 of embodiment 4, the error correcting code is forward error correction (FEC, Forward Error Correction) code.

As the sub- embodiment 4 of embodiment 4, the error correcting code is linear block codes.

As the sub- embodiment 5 of embodiment 4, the error correcting code is tail-biting convolutional code.

As the sub- embodiment 6 of embodiment 4, the error correcting code is Turbo code.

Embodiment 5

Embodiment 5 illustrates the schematic diagram of { the first sub-blocks of bits, the first bit set in the second sub-blocks of bits } with the relationship of the second bit set in the second sub-blocks of bits, as shown in Fig. 5.

In embodiment 5, the first bit set in the first sub-blocks of bits and the second sub-blocks of bits is the input of check bit generation module, and the second bit set in second sub-blocks of bits is the output of the check bit generation module.

As the sub- embodiment 1 of embodiment 5, the check bit generation module is CRC code generator, and second bit set is the CRC code of first sub-blocks of bits and first bit set.

As the sub- embodiment 2 of embodiment 5, the check bit generation module is parity check code generator, and second bit set is the parity check code of first sub-blocks of bits and first bit set.

Embodiment 6

Embodiment 6 illustrates the schematic diagram of the first channel coding, as shown in Fig. 6.

In embodiment 6, the first channel coding includes the first bit packet generation module, the first coding module, the first bit block generation module and polarization code generation module.The quantity of bit in second sub-blocks of bits is used for the input of the first bit packet generation module, and the output of the first bit packet generation module is the first bit packet.The first bit coating is used for the input of first coding module, and the output of the first coding module is the first sub-blocks of bits.Second sub-blocks of bits includes the first bit set and the second bit set.First sub-blocks of bits and first bit set are used for the input of the first bit block generation module, and the output of the first bit block generation module is the first bit block.It include the bit in the bit and second sub-blocks of bits in first sub-blocks of bits in first bit block.First bit block is used for the polarization code generation module.The output of the polarization code generation module is the output of first channel coding.

As the sub- embodiment 1 of embodiment 6, the bit in the first bit packet is used for determining the quantity of the bit in second sub-blocks of bits.

As the sub- embodiment 2 of embodiment 6, the value of the first bit packet is equal to the quantity of bit in second sub-blocks of bits.

As the sub- embodiment 3 of embodiment 6, the value of a sub-blocks of bits in the first bit packet is equal to the quantity of the bit in second sub-blocks of bits.

As the sub- embodiment 4 of embodiment 6, first coding module is as described in Example 4.

Sub- embodiment 5 as embodiment 6, the first bit block generation module calculates the quantity of bit in the third sub-blocks of bits according to the quantity of bit in the quantity of bit in first sub-blocks of bits and second sub-blocks of bits, then executes operation as described in Example 2 and generates first bit block.

As the sub- embodiment 6 of embodiment 6, the length of first bit block is 2 n times power, The N is positive integer.

It include the check bit generation module in the embodiment 5 as the sub- embodiment 7 of embodiment 6, in the first bit block generation module.

Embodiment 7

Embodiment 7 illustrates the schematic diagram of the first channel decoding according to an embodiment of the invention, as shown in Fig. 7.

In embodiment 7, the first channel decoding includes polarization code decoding I module, the first decoding module, the first coding module, information bit quantity determining module, polarization code decoding II module and bit check module.

Polarization code generation module in embodiment 7, in the polarization code decoding I module and polarization code decoding II module all corresponding embodiments 6.The length of the polarization code generation module and the first bit block is related.The check bit generation module in the bit check module corresponding embodiment 5.First bit block is made of the bit in the first sub-blocks of bits, the bit in the bit and third sub-blocks of bits in the second sub-blocks of bits.Bit in the third sub-blocks of bits is to freeze bit.The third sub-blocks of bits freezes bit set and second including first and freezes bit set.Bit in first sub-blocks of bits is used for determining the quantity of the bit in second sub-blocks of bits.The quantity of bit in second sub-blocks of bits is a candidate value in K candidate value.Maximum value in the K candidate value is used for determining that described first freezes bit set.The quantity of bit in second sub-blocks of bits is used for determining that described second freezes bit set.Second sub-blocks of bits includes the first bit set and the second bit set.Second bit set is the corresponding check bit of bit in bit and first bit set in first sub-blocks of bits.

In embodiment 7, the described first demodulation result for freezing bit set and the first wireless signal is used for the input of polarization code decoding I module, and the estimated value of first sub-blocks of bits is the output of the polarization code decoding I module.The estimated value of first sub-blocks of bits is used for the input of first decoding module, and the first bit packet is the output of first decoding module.First decoding module corresponds to first coding module.The first bit coating is used for the input of first coding module, and the output of first coding module is first sub-blocks of bits.The first bit packet is also used for the input of the information bit quantity determining module, and the output of the information bit quantity determining module is that the quantity of bit and described second freezes bit set in second sub-blocks of bits.First sub-blocks of bits, the quantity of the bit in second sub-blocks of bits and described Second freezes the input that bit set is used for the polarization code decoding II module, and the output of the polarization code decoding II module is second sub-blocks of bits.First sub-blocks of bits and second sub-blocks of bits are used for the input of the bit check module, and the output of the bit check module is the first bit set in the second sub-blocks of bits.

As the sub- embodiment 1 of embodiment 7, the quantity of the bit in first bit block is L, and the quantity of bit is L1 in first sub-blocks of bits, and the quantity of bit is L2 in second sub-blocks of bits, and the maximum value in the K candidate value is K1.The quantity of bit is L-L1-L2 in the third sub-blocks of bits, wherein the described first quantity for freezing the bit in bit set is L-L1-K1, the described second quantity for freezing the bit in bit set is K1-L2.

As the sub- embodiment 2 of embodiment 7, the polarization code decoding I module and polarization code decoding II module are based on identical polarization code generator matrix.The polarization code generator matrix is used for the polarization code generation module.Described first bit freezed in bit set uses in polarization code decoding I module as known bits.The polarization code decoding I module only decodes the output of the corresponding subchannel of bit in first sub-blocks of bits.Bit in first sub-blocks of bits uses in polarization code decoding II module as known bits.

As the sub- embodiment 3 of embodiment 7, the polarization code decoding I module and polarization code decoding II module use SC (Successive Cancellation) decoder.

As the sub- embodiment 4 of embodiment 7, first coding module is as described in Example 4.

As the sub- embodiment 5 of embodiment 7, second bit set is the corresponding CRC check bit of bit in bit and first bit set in first sub-blocks of bits.

Embodiment 8

Embodiment 8 illustrates the schematic diagram of the mapping relations of the first sub-blocks of bits and the second sub-blocks of bits on sub-channels, as shown in Fig. 8.

The quantity of bit in first sub-blocks of bits is L1, and the quantity of the bit in the second sub-blocks of bits is L2.Bit and L1 sub-channels in first sub-blocks of bits correspond, and the bit and L2 sub-channels in second sub-blocks of bits correspond.Channel capacity corresponding to any one subchannel in the L1 sub-channels is higher than channel capacity corresponding to any one subchannel in the L2 sub-channels.

Embodiment 9

Embodiment 9 illustrates the schematic diagram of the first sub-blocks of bits and the second sub-blocks of bits on coding sequences, as shown in Fig. 9.

In embodiment 9, any bit in first sub-blocks of bits is decoded before any bit in second sub-blocks of bits

As the sub- embodiment 1 of embodiment 9, SC decoder is used for the decoding.

As the sub- embodiment 2 of embodiment 9, SCL decoder is used for the decoding.

As the sub- embodiment 3 of embodiment 9, SCS decoder is used for the decoding.

Embodiment 10

Embodiment 10 illustrates the structural block diagram for the processing unit in base station, as shown in Fig. 10.In fig. 10, base station apparatus 200 is mainly made of the first execution module 201 and the first sending module 202.

In embodiment 10, the first execution module 201 is for executing the first channel coding, and the first sending module 202 is for sending the first wireless signal.

In embodiment 10, the first bit block is used for the input of first channel coding.First channel coding is based on polarization code.The output of first channel coding be used to generate first wireless signal.It include the bit in the bit and the second sub-blocks of bits in the first sub-blocks of bits in first bit block.Bit in first bit packet be used to generate first sub-blocks of bits.The quantity of bit in second sub-blocks of bits and first bit are surrounded by pass.Positive integer bit is respectively included in the first bit packet, first sub-blocks of bits and second sub-blocks of bits.The quantity of bit in second sub-blocks of bits is a candidate value in K candidate value.The candidate value is positive integer, and the K is greater than 1 positive integer.The quantity of bit in first sub-blocks of bits is greater than the quantity of the bit in the first bit packet.

As the sub- embodiment 1 of embodiment 10, output of the first bit packet after the first coding is used for determining first sub-blocks of bits.

As the sub- embodiment 2 of embodiment 10, first execution module 201 also be used to send the first information.Wherein, the first information is used for determining at least one of { quantity of the bit in first sub-blocks of bits, described first coding, the K candidate value }.

As the sub- embodiment 3 of embodiment 10, first execution module 201 is also used for determining the quantity of the bit in third sub-blocks of bits.Wherein, first bit block further includes the bit in the third sub-blocks of bits, and the bit in the third sub-blocks of bits is to freeze bit.The K candidate value In maximum value it is related with the quantity of the bit in the third sub-blocks of bits.

As the sub- embodiment 4 of embodiment 10, first coding is based on error-detecting code (error-detecting code).

As the sub- embodiment 5 of embodiment 10, first coding is based on error correcting code (error-correcting code).

As the sub- embodiment 6 of embodiment 10, the ergodic capacity of the bit mapped subchannel in first sub-blocks of bits is less than the ergodic capacity of the bit mapped subchannel in second sub-blocks of bits.

As the sub- embodiment 7 of embodiment 10, any bit in first sub-blocks of bits is decoded before any bit in second sub-blocks of bits.

As the sub- embodiment 8 of embodiment 10, second sub-blocks of bits includes the first bit set and the second bit set.The bit in bit and first bit set in first sub-blocks of bits be used to generate second bit set.

Sub- embodiment 9 as embodiment 10, bit in the first bit packet is also used for determining { position of the bit in first bit block in second sub-blocks of bits, at least one of the information format of second sub-blocks of bits, multinomial corresponding to the redundancy check bit of first bit block }.

As the sub- embodiment 10 of embodiment 10, first wireless signal transmits on physical layer control channel or first sub-blocks of bits and second sub-blocks of bits belong to the same Downlink Control Information (DCI).

Embodiment 11

Embodiment 11 illustrates the structural block diagram for the processing unit in user equipment, as shown in Fig. 10.In fig. 10, user apparatus 300 is mainly made of the first receiving module 301 and the second execution module 302.

In embodiment 11, the first receiving module 301 is for receiving the first wireless signal；Second execution module 302 is for executing the first channel decoding.

In embodiment 11, corresponding first channel coding of first channel decoding, first channel coding is based on polarization code, and the first bit block is used for the input of first channel coding.The output of first channel coding be used to generate first wireless signal.It include the bit in the bit and the second sub-blocks of bits in the first sub-blocks of bits in first bit block.Bit in first bit packet by with In generation first sub-blocks of bits.The quantity of bit in second sub-blocks of bits and first bit are surrounded by pass.Positive integer bit is respectively included in the first bit packet, first sub-blocks of bits and second sub-blocks of bits.The quantity of bit in second sub-blocks of bits is a candidate value in K candidate value.The candidate value is positive integer, and the K is greater than 1 positive integer.The quantity of bit in first sub-blocks of bits is greater than the quantity of the bit in the first bit packet.

As the sub- embodiment 1 of embodiment 11, output of the first bit packet after the first coding is used for determining first sub-blocks of bits.

As the sub- embodiment 2 of embodiment 11, first receiving module 301 also be used to receive the first information.Wherein, the first information is used for determining at least one of { quantity of the bit in first sub-blocks of bits, described first coding, the K candidate value }.

As the sub- embodiment 3 of embodiment 11, second execution module 302 is also used for determining the quantity of the bit in third sub-blocks of bits.Wherein, first bit block further includes the bit in the third sub-blocks of bits, and the bit in the third sub-blocks of bits is to freeze bit.Maximum value in the K candidate value is related with the quantity of the bit in the third sub-blocks of bits.

As the sub- embodiment 4 of embodiment 11, first coding is based on error-detecting code (error-detecting code).

As the sub- embodiment 5 of embodiment 11, first coding is based on error correcting code (error-correcting code).

As the sub- embodiment 6 of embodiment 11, the ergodic capacity of the bit mapped subchannel in first sub-blocks of bits is less than the ergodic capacity of the bit mapped subchannel in second sub-blocks of bits.

As the sub- embodiment 7 of embodiment 11, any bit in first sub-blocks of bits is decoded before any bit in second sub-blocks of bits.

As the sub- embodiment 8 of embodiment 11, second sub-blocks of bits includes the first bit set and the second bit set.The bit in bit and first bit set in first sub-blocks of bits be used to generate second bit set.

Sub- embodiment 9 as embodiment 11, bit in the first bit packet is also used for determining { position of the bit in first bit block in second sub-blocks of bits, at least one of the information format of second sub-blocks of bits, multinomial corresponding to the redundancy check bit of first bit block }.

As the sub- embodiment 10 of embodiment 11, first wireless signal is in physical layer control channel Upper transmission or first sub-blocks of bits and second sub-blocks of bits belong to the same Downlink Control Information (DCI).

Those of ordinary skill in the art will appreciate that all or part of the steps in the above method can instruct related hardware to complete by program, described program be can store in computer readable storage medium, such as read-only memory, hard disk or CD etc..Optionally, one or more integrated circuit can be used also to realize in all or part of the steps of above-described embodiment.Correspondingly, each modular unit in above-described embodiment, can be realized using example, in hardware, can also realize that the application is not limited to the combination of the software and hardware of any particular form by the form of software function module.UE or terminal in the present invention include but is not limited to mobile phone, tablet computer, notebook, card of surfing Internet, NB-IOT terminal, the wireless telecom equipments such as eMTC terminal.Base station or system equipment in the present invention include but is not limited to macrocell base stations, microcell base station, Home eNodeB, the wireless telecom equipments such as relay base station.

The foregoing is only a preferred embodiment of the present invention, is not intended to limit the scope of the present invention.All within the spirits and principles of the present invention, any modification made, equivalent replacement, improve etc., it should all be included in the protection scope of the present invention.

Claims

A method of it is used in the base station of channel coding, wherein include the following steps:

Step A. executes the first channel coding；

Step B. sends the first wireless signal.

Wherein, the first bit block is used for the input of first channel coding.First channel coding is based on polarization code.The output of first channel coding be used to generate first wireless signal.It include the bit in the bit and the second sub-blocks of bits in the first sub-blocks of bits in first bit block.Bit in first bit packet be used to generate first sub-blocks of bits.The quantity of bit in the first bit packet and second sub-blocks of bits is related or the first bit packet is related with the quantity of bit in first bit block.Positive integer bit is respectively included in the first bit packet, first sub-blocks of bits and second sub-blocks of bits.The quantity of bit in second sub-blocks of bits is a candidate value in K candidate value.The candidate value is positive integer, and the K is greater than 1 positive integer.The quantity of bit in first sub-blocks of bits is greater than the quantity of the bit in the first bit packet.
The method according to claim 1, wherein output of the first bit packet after the first coding is used for determining first sub-blocks of bits.
According to claim 1, method described in 2, which is characterized in that the step A further includes following steps:

Step A0. sends the first information.

Wherein, the first information is used for determining at least one of { quantity of the bit in first sub-blocks of bits, described first coding, the K candidate value }.
Method according to claim 1 to 3, which is characterized in that the step A further includes following steps:

Step A1. determines the quantity of the bit in third sub-blocks of bits.

Wherein, first bit block further includes the bit in the third sub-blocks of bits, and the bit in the third sub-blocks of bits is to freeze bit.Maximum value in the K candidate value is related with the quantity of the bit in the third sub-blocks of bits.
According to method described in claim 2-4, which is characterized in that first coding is based on error-detecting code (error-detecting code)；Or first coding is based on error correcting code (error-correcting code).
Method described in -5 according to claim 1, which is characterized in that the ergodic capacity of the bit mapped subchannel in first sub-blocks of bits is less than the bit institute in second sub-blocks of bits The ergodic capacity of the subchannel of mapping；Or any bit in first sub-blocks of bits is decoded before any bit in second sub-blocks of bits.
Method described in -6 according to claim 1, which is characterized in that second sub-blocks of bits includes the first bit set and the second bit set.The bit in bit and first bit set in first sub-blocks of bits be used to generate second bit set.
Method described in -7 according to claim 1, it is characterized in that, bit in the first bit packet is also used for determining { position of the bit in first bit block in second sub-blocks of bits, at least one of the information format of second sub-blocks of bits, multinomial corresponding to the redundancy check bit of first bit block }.
Method described in -8 according to claim 1, which is characterized in that first wireless signal transmits on physical layer control channel or first sub-blocks of bits and second sub-blocks of bits belong to the same Downlink Control Information (DCI).
A method of it is used in the user equipment of channel coding, wherein include the following steps:

Step A. receives the first wireless signal；

Step B. executes the first channel decoding.

Wherein, corresponding first channel coding of first channel decoding, first channel coding are based on polarization code, and the first bit block is used for the input of first channel coding.The output of first channel coding be used to generate first wireless signal.It include the bit in the bit and the second sub-blocks of bits in the first sub-blocks of bits in first bit block.Bit in first bit packet be used to generate first sub-blocks of bits.The quantity of bit in the first bit packet and second sub-blocks of bits is related or the first bit packet is related with the quantity of bit in first bit block.Positive integer bit is respectively included in the first bit packet, first sub-blocks of bits and second sub-blocks of bits.The quantity of bit in second sub-blocks of bits is a candidate value in K candidate value.The candidate value is positive integer, and the K is greater than 1 positive integer.The quantity of bit in first sub-blocks of bits is greater than the quantity of the bit in the first bit packet.
According to the method described in claim 10, it is characterized in that, output of the first bit packet after the first coding is used for determining first sub-blocks of bits.
Method described in 0,11 according to claim 1, which is characterized in that the step A further includes following steps:

Step A0. receives the first information.

Wherein, the first information be used for determining the quantity of the bit in first sub-blocks of bits, At least one of first coding, the K candidate value }.
Method described in 0-12 according to claim 1, which is characterized in that the step B further includes following steps:

Step B0. determines the quantity of the bit in third sub-blocks of bits.

Wherein, first bit block further includes the bit in the third sub-blocks of bits, and the bit in the third sub-blocks of bits is to freeze bit.Maximum value in the K candidate value is related with the quantity of the bit in the third sub-blocks of bits.
Method described in 1-13 according to claim 1, which is characterized in that first coding is based on error-detecting code (error-detecting code)；Or first coding is based on error correcting code (error-correcting code).
Method described in 0-14 according to claim 1, which is characterized in that the ergodic capacity of the bit mapped subchannel in first sub-blocks of bits is less than the ergodic capacity of the bit mapped subchannel in second sub-blocks of bits；Or any bit in first sub-blocks of bits is decoded before any bit in second sub-blocks of bits.
Method described in 0-15 according to claim 1, which is characterized in that second sub-blocks of bits includes the first bit set and the second bit set.The bit in bit and first bit set in first sub-blocks of bits be used to generate second bit set.
Method described in 0-16 according to claim 1, it is characterized in that, bit in the first bit packet is also used for determining { position of the bit in first bit block in second sub-blocks of bits, at least one of the information format of second sub-blocks of bits, multinomial corresponding to the redundancy check bit of first bit block }.
Method described in 0-17 according to claim 1, which is characterized in that first wireless signal transmits on physical layer control channel or first sub-blocks of bits and second sub-blocks of bits belong to the same Downlink Control Information (DCI).
A kind of base station equipment being used for channel coding, wherein including following module:

- the first execution module: for executing the first channel coding；

- the first sending module: for sending the first wireless signal.

Wherein, the first bit block is used for the input of first channel coding.First channel coding is based on polarization code.The output of first channel coding be used to generate first wireless signal.It include the bit in the bit and the second sub-blocks of bits in the first sub-blocks of bits in first bit block.Bit in first bit packet be used to generate first sub-blocks of bits.The first bit packet and institute The quantity for stating the bit in the second sub-blocks of bits is related or the first bit packet is related with the quantity of bit in first bit block.Positive integer bit is respectively included in the first bit packet, first sub-blocks of bits and second sub-blocks of bits.The quantity of bit in second sub-blocks of bits is a candidate value in K candidate value.The candidate value is positive integer, and the K is greater than 1 positive integer.The quantity of bit in first sub-blocks of bits is greater than the quantity of the bit in the first bit packet.
A kind of user equipment being used for channel coding, wherein including following module:

- the first receiving module: for receiving the first wireless signal；

- the second execution module: for executing the first channel decoding；

Wherein, corresponding first channel coding of first channel decoding, first channel coding are based on polarization code, and the first bit block is used for the input of first channel coding.The output of first channel coding be used to generate first wireless signal.It include the bit in the bit and the second sub-blocks of bits in the first sub-blocks of bits in first bit block.Bit in first bit packet be used to generate first sub-blocks of bits.The quantity of bit in the first bit packet and second sub-blocks of bits is related or the first bit packet is related with the quantity of bit in first bit block.Positive integer bit is respectively included in the first bit packet, first sub-blocks of bits and second sub-blocks of bits.The quantity of bit in second sub-blocks of bits is a candidate value in K candidate value.The candidate value is positive integer, and the K is greater than 1 positive integer.The quantity of bit in first sub-blocks of bits is greater than the quantity of the bit in the first bit packet.