CN109951176B - System and method for detecting acquisition capacity of waveform acquisition device - Google Patents
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Abstract
The invention relates to the technical field of electronic circuits, in particular to a system and a method for detecting the acquisition capacity of a waveform acquisition device. The beneficial effects are that: by changing the duty ratio of the digital output signal, the waveform change of the digital output signal is observed to acquire the waveform parameters of the digital output signal until the acquisition software cannot identify the waveform of the digital output signal, so that the problem that the duty ratio cannot be determined in a window of the acquisition software is effectively solved, the stability and the reliability of a system are ensured, the allowance of the acquisition software can be well known under the condition that a register of the acquisition software cannot be changed, the stability of the acquisition software is ensured, and the cost is not increased.
Description
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a system and a method for detecting the acquisition capacity of a waveform acquisition device.
Background
SPDIF is short for SONY and PHILIPS digital audio interface. SPDIF is divided into two types, that is, output (SPDIF OUT) and input (SPDIF IN) IN terms of transmission. Most sound card chips are capable of supporting SPDIF OUT at present, but we need to note that not every product will provide a digital interface. As for transmission carriers, SPDIF is divided into coaxial and optical fiber, and the signals they can transmit are the same, but the carriers are different, and the interfaces and the connecting wires have different appearances. However, optical signal transmission is a popular trend in the future, and the main advantages of the optical signal transmission are that interface level and impedance problems do not need to be considered, the interface is flexible, and the anti-interference capability is stronger. The transmission of digital sound signals through the SPDIF interface has become a feature commonly owned by the PCI sound card of the new generation.
In the prior art, for an SPDIF digital input signal, the pulse width duty ratio of a digital signal in actual application acquisition software deviates, and the minimum value and the maximum value of the pulse width duty ratio of the digital signal need to be measured. The currently adopted method is to directly measure the SPDIF digital signal waveform through an oscilloscope, but cannot measure the minimum and maximum pulse width waveforms of software which can identify and process the signal waveform.
Disclosure of Invention
In view of the above problems in the prior art, a system and method for detecting the acquisition capability of a waveform acquisition device are provided.
The specific technical scheme is as follows:
a system for detecting the acquisition capabilities of a waveform acquisition device, comprising:
the digital signal generating circuit comprises a regulating unit and an acquisition unit, wherein the regulating unit is used for regulating the duty ratio of a digital input signal, and the acquisition unit is used for acquiring the waveform of the digital input signal so as to output a digital output signal;
the input end of the waveform display device is connected with the output end of the digital signal generating circuit, and the waveform display device is used for displaying the waveform of the digital output signal;
the input end of the waveform acquisition device is connected with the output end of the digital signal generation circuit, and acquisition software is installed in the waveform acquisition device and used for acquiring waveform parameters of the digital output signal;
and changing the duty ratio of the digital input signal through the digital signal generating circuit, observing the waveform change of the digital output signal displayed by the waveform display device, and acquiring the waveform parameters of the digital output signal through the acquisition software until the acquisition software cannot identify the waveform of the digital output signal.
Preferably, the adjusting unit includes:
the first capacitor is connected between the digital input signal and the grounding terminal through a first resistor;
and the second resistor is connected between the first capacitor and the grounding terminal through a second capacitor.
Preferably, the collecting unit includes:
a comparator, a positive phase input terminal of which is connected to the second resistor, an inverse phase input terminal of which is connected to a power supply voltage through a third resistor, a power supply terminal of which is connected to the power supply voltage, a ground terminal of which is connected to the ground terminal, an output terminal of which outputs a digital output signal, and which is used for comparing the digital input signal with a reference signal to output the digital signal output signal;
the fourth resistor is connected between the inverting input end of the comparator and the grounding end;
and the third capacitor is connected between the power supply voltage and the grounding terminal.
Preferably, the third resistor and the fourth resistor form a voltage dividing resistor circuit, the reference signal is formed by the resistor voltage dividing circuit, a point connected between the third resistor and the fourth resistor forms a voltage dividing node, and the reference signal is led out from the voltage dividing node.
Preferably, the resistance voltage-dividing circuit includes a predetermined number of voltage-dividing resistors connected in series with each other, the voltage-dividing resistors are connected between a power supply voltage and a ground terminal, a point connected between the voltage-dividing resistors forms a voltage-dividing node, and the reference signal is led out from the voltage-dividing node.
Preferably, the second resistor is an adjustable variable resistor;
the adjusting unit slidably adjusts the resistance value of the adjustable variable resistor, so that the rising edge time of the digital input signal changes, and the duty ratio of the digital output signal is adjusted after the digital input signal passes through the acquisition unit.
Preferably, the adjusting unit increases the resistance of the adjustable variable resistor in a sliding manner, so that the rising edge time of the digital input signal is increased, and after the digital input signal passes through the collecting unit, the duty ratio of the digital output signal is increased.
Preferably, the adjusting unit adjusts the resistance of the adjustable variable resistor in a sliding manner, so that the rising edge time of the digital input signal is reduced, and after the rising edge time passes through the collecting unit, the duty ratio of the digital output signal is reduced.
The present invention also includes a method for detecting the acquisition capability of a waveform acquisition device, characterized in that, for use in the system for detecting the acquisition capability of a waveform acquisition device according to any of the above, the method for detecting the acquisition capability of a waveform acquisition device comprises the steps of:
step S1, providing a digital signal generating circuit for adjusting the duty ratio of a digital input signal to output a digital output signal;
s2, providing a waveform display device for displaying the waveform of the digital output signal;
s3, providing a waveform acquisition device, wherein the waveform acquisition device acquires waveform parameters of the digital output signal through acquisition software;
and S4, observing the waveform of the digital output signal by changing the duty ratio of the digital input signal, and recording the waveform parameters of the digital output signal until the acquisition software cannot identify the waveform of the digital output signal.
Preferably, in step S1, the digital signal generating circuit includes a regulating unit and an acquiring unit, the regulating unit is configured to regulate a duty ratio of a digital input signal, and the acquiring unit is configured to acquire a waveform of the digital input signal to output a digital output signal.
The technical scheme of the invention has the beneficial effects that: the system and the method for detecting the collecting capacity of the waveform collecting device are characterized in that the duty ratio of a digital output signal is changed, and the waveform change of the digital output signal is observed so as to collect the waveform parameters of the digital output signal until collecting software cannot identify the waveform of the digital output signal, thereby effectively solving the problem that the duty ratio cannot be determined in a window of the collecting software, ensuring the stability and the reliability of the system, well knowing the margin of the collecting software under the condition that a register of the collecting software cannot be changed, ensuring the stability of the collecting software and not increasing the cost.
Drawings
Embodiments of the present invention will now be described more fully hereinafter with reference to the accompanying drawings. The drawings are, however, to be regarded as illustrative and explanatory only and are not restrictive of the scope of the invention.
FIG. 1 is a functional block diagram of a system for detecting the acquisition capabilities of a waveform acquisition device according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of a digital signal generating circuit of a system for detecting the acquisition capabilities of a waveform acquisition device according to an embodiment of the present invention;
fig. 3 is an adjustment waveform diagram of acquisition software of a system for detecting acquisition capabilities of a waveform acquisition device according to an embodiment of the present invention.
Fig. 4 is a flowchart of steps of a method for detecting the acquisition capability of a waveform acquisition device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive efforts based on the embodiments of the present invention, shall fall within the scope of protection of the present invention.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.
The invention comprises a system for detecting the acquisition capabilities of a waveform acquisition device, comprising:
the digital signal generating circuit 1 comprises a regulating unit 10 and an acquisition unit 11, wherein the regulating unit 10 is used for regulating the duty ratio of a digital input signal SPDIF _ IN, and the acquisition unit 11 is used for acquiring the waveform of the digital input signal SPDIF _ IN so as to output a digital output signal SPDIF _ OUT;
the input end of the waveform display device 2 is connected with the output end of the digital signal generating circuit 1, and the waveform display device 2 is used for displaying the waveform of the digital output signal SPDIF _ OUT;
the input end of the waveform acquisition device 3 is connected with the output end of the digital signal generation circuit 1, and acquisition software (not shown in the figure) is installed in the waveform acquisition device 3 and is used for acquiring waveform parameters of a digital output signal SPDIF _ OUT;
the digital signal generating circuit 1 changes the duty ratio of the digital input signal SPDIF _ IN, observes the waveform change of the digital output signal SPDIF _ OUT displayed by the waveform display device 2, and collects the waveform parameters of the digital output signal SPDIF _ OUT through the collection software (not shown IN the figure) until the collection software (not shown IN the figure) can not identify the waveform of the digital output signal SPDIF _ OUT.
Through the technical solution of the system for detecting the acquisition capability of the waveform acquisition device, as shown IN fig. 1 and 3, the digital input signal SPDIF _ IN is adjusted by the adjusting unit 10 to obtain the minimum pulse width waveform duty ratio of the digital input signal SPDIF _ IN, then the digital adjusting signal (not shown IN the figure) is output, the digital adjusting signal (not shown IN the figure) is compared with the reference signal Vref by the acquisition unit 11 to output the digital output signal SPDIF _ OUT, and finally the waveform of the digital output signal SPDIF _ OUT is displayed by the waveform display device 2, wherein the waveform display device 2 may be an oscilloscope, and at the same time, the duty ratio of the digital input signal SPDIF _ IN is changed by the digital signal generating circuit 1, the waveform change of the digital output signal SPDIF _ OUT displayed by the waveform display device 2 is observed, so as to acquire the waveform parameters of the digital output signal SPDIF _ OUT by the acquisition software (not shown IN the figure) until the acquisition software (not able to identify the waveform of the digital output signal SPDIF _ OUT.
Further, as shown in FIG. 3, the data collected by the collection software (not shown in the figure) is as follows, at time t1, the maximum pulse width is tested, and at time t2, the maximum pulse width is testedMeasuring the minimum pulse width, t 1 = 26.4ns, maximum pulse width V 1 ＝908.4mV，t 2 = 163.4ps, minimum pulse width V 2 =1.6mV, calculated as Δ V = V 2 -V 1 ＝-906.8mV，Δt＝t 2 -t 1 ＝26.2ns，ΔV/Δt＝-36.8mV/s，1/Δt＝38.11MHZ。
Further, the duty ratio of the digital output signal SPDIF _ OUT is changed, and the waveform change of the digital output signal SPDIF _ OUT is observed, so as to acquire the waveform parameters of the digital output signal SPDIF _ OUT, until the acquisition software (not shown in the figure) cannot identify the waveform of the digital output signal SPDIF _ OUT, thereby effectively solving the problem that the duty ratio cannot be determined in a window of the acquisition software (not shown in the figure), ensuring the stability and reliability of the system, and well knowing the margin of the acquisition software under the condition that a register of the acquisition software (not shown in the figure) cannot be changed, ensuring the stability of the acquisition software, and not increasing the cost.
In a preferred embodiment, the adjustment unit 10 comprises:
a first capacitor C1 connected between the digital input signal SPDIF _ IN and the ground GND through a first resistor R1;
a second resistor R2 is connected between the first capacitor C1 and the ground GND through a second capacitor C2.
Specifically, as shown IN fig. 2, the RC adjusting circuit is constructed by the first capacitor C1 and the second resistor R2 IN the adjusting unit 10, and when the RC adjusting circuit adjusts the digital input signal SPDIF _ IN, the rising edge time of the digital input signal SPDIF _ IN is proportional to the resistance value of the second resistor R2, for example, when the resistance value of the second resistor R2 is smaller, the rising edge time is shorter, and the rising edge is steeper, and conversely, when the resistance value of the second resistor R2 is larger, the rising edge time is longer, and the rising edge is slower.
Further, the duty ratio of the digital output signal SPDIF _ OUT is changed, and the waveform change of the digital output signal SPDIF _ OUT is observed, so as to acquire the waveform parameters of the digital output signal SPDIF _ OUT, until the acquisition software (not shown in the figure) cannot identify the waveform of the digital output signal SPDIF _ OUT, thereby effectively solving the problem that the duty ratio cannot be determined in a window of the acquisition software (not shown in the figure), ensuring the stability and reliability of the system, and well knowing the margin of the acquisition software under the condition that a register of the acquisition software (not shown in the figure) cannot be changed, ensuring the stability of the acquisition software, and not increasing the cost.
In a preferred embodiment, the acquisition unit 11 comprises:
the comparator U1 is used for comparing the digital input signal SPDIF _ IN with a reference signal Vref to output a digital signal output signal SPDIF _ OUT, wherein the positive phase input end IN + of the comparator U1 is connected with the second resistor R2, the negative phase input end IN-of the comparator U1 is connected with a power supply voltage VDDIO through a third resistor R3, the power supply end V + of the comparator U1 is connected with the power supply voltage VDDIO, the grounding end VS of the comparator U1 is connected with the grounding end GND, the output end VOUT of the comparator U1 outputs the digital output signal SPDIF _ OUT, and the comparator U1 is used for comparing the digital input signal SPDIF _ IN with the reference signal Vref;
a fourth resistor R4 connected between the inverting input terminal IN-of the comparator U1 and the ground terminal GND;
a third capacitor C3 connected between the power voltage VDDIO and the ground GND.
Specifically, as shown in fig. 2, the supply voltage VDDIO provides a 3.3V band source voltage, when the resistance value of the second resistor R2 is smaller, the rising edge time is shorter, the rising edge is steeper, the pulse width duty ratio of the digital output signal SPDIF _ OUT becomes smaller after passing through the comparator U1, and conversely, when the resistance value of the second resistor R2 is larger, the rising edge time is longer, the rising edge is slower, and the pulse width duty ratio of the digital output signal SPDIF _ OUT becomes larger after passing through the comparator U1.
In the above technical solution, the third resistor R3 and the fourth resistor R4 form a voltage dividing resistor circuit, the reference signal Vref is formed by the resistor voltage dividing circuit, a voltage dividing node is formed at a point connected between the third resistor R3 and the fourth resistor R4, and the reference signal Vref is led out from the voltage dividing node.
The resistance voltage dividing circuit comprises a preset number of voltage dividing resistors which are connected in series, the voltage dividing resistors are connected between a power supply voltage and a grounding terminal, a voltage dividing node is formed by a point connected between the voltage dividing resistors, and a reference signal is led out from the voltage dividing node.
In a preferred embodiment, the second resistor R2 is an adjustable variable resistor;
the adjusting unit 10 slidably adjusts the resistance of the adjustable variable resistor, so that the rising edge time of the digital input signal SPDIF _ IN changes, and after passing through the collecting unit 11, the duty ratio of the digital output signal SPDIF _ OUT is adjusted to change.
Specifically, the adjusting unit 10 adjusts the resistance value of the adjustable variable resistor to be high, so that the rising edge time of the digital input signal SPDIF _ IN is increased, after passing through the collecting unit 11, to increase the duty ratio of the digital output signal SPDIF _ OUT.
The adjusting unit 10 may be extended to adjust the resistance of the adjustable variable resistor to be lower, so that the rising edge time of the digital input signal SPDIF _ IN is reduced, and after passing through the collecting unit 11, the duty ratio of the digital output signal SPDIF _ OUT is reduced.
Further, the duty ratio of the digital output signal SPDIF _ OUT is changed, and the waveform change of the digital output signal SPDIF _ OUT is observed, so as to acquire the waveform parameter of the digital output signal SPDIF _ OUT, until the acquisition software (not shown in the figure) cannot identify the waveform of the digital output signal SPDIF _ OUT, thereby effectively solving the problem that the duty ratio cannot be determined in the window of the acquisition software (not shown in the figure), ensuring the stable reliability of the system, and under the condition that the register of the acquisition software (not shown in the figure) cannot be changed, the margin of the acquisition software can be well known, ensuring the stability of the acquisition software, and not increasing the cost.
The present invention also includes a method for detecting the acquisition capability of a waveform acquisition device, as shown in fig. 3, wherein the system for detecting the acquisition capability of a waveform acquisition device for use in any of the above, the method for detecting the acquisition capability of a waveform acquisition device comprises the steps of:
step S1, providing a digital signal generating circuit 1 for adjusting the duty ratio of a digital input signal SPDIF _ IN to output a digital output signal SPDIF _ OUT;
step S2, providing a waveform display device 2 for displaying the waveform of the digital output signal SPDIF _ OUT;
step S3, providing a waveform acquisition device 3, wherein the waveform acquisition device 3 acquires waveform parameters of the digital output signal SPDIF _ OUT through acquisition software (not shown in the figure);
and S4, observing the waveform of the digital output signal SPDIF _ OUT by changing the duty ratio of the digital input signal SPDIF _ IN, and recording the waveform parameters of the digital output signal SPDIF _ OUT until the acquisition software (not shown IN the figure) cannot identify the waveform of the digital output signal SPDIF _ OUT.
IN the above technical solution, the digital signal generating circuit 1 includes a regulating unit 10 and an acquiring unit 11, where the regulating unit 10 is configured to regulate a duty ratio of the digital input signal SPDIF _ IN, and the acquiring unit 11 is configured to acquire a waveform of the digital input signal SPDIF _ IN to output the digital output signal SPDIF _ OUT.
Further, the duty ratio of the digital output signal SPDIF _ OUT is changed, and the waveform change of the digital output signal SPDIF _ OUT is observed, so as to acquire the waveform parameters of the digital output signal SPDIF _ OUT, until the acquisition software (not shown in the figure) cannot identify the waveform of the digital output signal SPDIF _ OUT, thereby effectively solving the problem that the duty ratio cannot be determined in a window of the acquisition software (not shown in the figure), ensuring the stability and reliability of the system, and well knowing the margin of the acquisition software under the condition that a register of the acquisition software (not shown in the figure) cannot be changed, ensuring the stability of the acquisition software, and not increasing the cost.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the invention.
Claims (10)
1. A system for detecting the acquisition capabilities of a waveform acquisition device, comprising:
the digital signal generating circuit comprises a regulating unit and an acquisition unit, wherein the regulating unit is used for regulating the duty ratio of a digital input signal, and the acquisition unit is used for acquiring the waveform of the digital input signal so as to output a digital output signal;
the input end of the waveform display device is connected with the output end of the digital signal generating circuit, and the waveform display device is used for displaying the waveform of the digital output signal;
the input end of the waveform acquisition device is connected with the output end of the digital signal generation circuit, and acquisition software is installed in the waveform acquisition device and used for acquiring waveform parameters of the digital output signal;
and changing the duty ratio of the digital input signal through the digital signal generating circuit, observing the waveform change of the digital output signal displayed by the waveform display device, and acquiring the waveform parameters of the digital output signal through the acquisition software until the acquisition software cannot identify the waveform of the digital output signal.
2. The system for detecting the acquisition capability of a waveform acquisition device of claim 1, wherein the adjustment unit comprises:
the first capacitor is connected between the digital input signal and the grounding terminal through a first resistor;
and the second resistor is connected between the first capacitor and the grounding terminal through a second capacitor.
3. The system for detecting the acquisition capability of a waveform acquisition device according to claim 2, wherein the acquisition unit comprises:
a comparator, a positive phase input terminal of which is connected to a connection point between the second resistor and the second capacitor, an negative phase input terminal of which is connected to a power supply voltage through a third resistor, a power supply terminal of which is connected to the power supply voltage, a ground terminal of which is connected to the ground terminal, an output terminal of which outputs a digital output signal, the comparator being configured to compare the digital input signal with a reference signal to output the digital output signal;
the fourth resistor is connected between the inverting input end of the comparator and the grounding end;
and the third capacitor is connected between the power supply voltage and the grounding end.
4. The system according to claim 3, wherein the third resistor and the fourth resistor form a resistor divider circuit, the reference signal is formed by the resistor divider circuit, a point connecting the third resistor and the fourth resistor forms a voltage dividing node, and the reference signal is led out from the voltage dividing node.
5. The system according to claim 4, wherein the resistor divider circuit comprises a predetermined number of divider resistors connected in series, the divider resistors are connected between a power voltage and a ground terminal, a point of connection between the divider resistors forms a divider node, and the reference signal is derived from the divider node.
6. The system for detecting the acquisition capability of a waveform acquisition device of claim 2 wherein the second resistance is an adjustable variable resistance;
the adjusting unit slidably adjusts the resistance value of the adjustable variable resistor, so that the rising edge time of the digital input signal changes, and the duty ratio of the digital output signal changes after the rising edge time of the digital input signal passes through the acquisition unit.
7. The system for detecting the acquisition capability of a waveform acquisition device according to claim 6, wherein the adjusting unit slidingly increases the resistance of the adjustable variable resistor so that the rising edge time of the digital input signal is increased after passing through the acquiring unit to increase the duty cycle of the digital output signal.
8. The system for detecting the acquisition capability of a waveform acquisition device according to claim 6, wherein the adjusting unit slidingly decreases the resistance of the adjustable variable resistor so that the rising edge time of the digital input signal is decreased after the acquisition unit to decrease the duty cycle of the digital output signal.
9. A method for detecting the acquisition capability of a waveform acquisition apparatus, characterized in that, for the system for detecting the acquisition capability of a waveform acquisition apparatus of any one of the above claims 1 to 8, the method for detecting the acquisition capability of a waveform acquisition apparatus comprises the steps of:
step S1, providing a digital signal generating circuit for adjusting the duty ratio of a digital input signal to output a digital output signal;
s2, providing a waveform display device for displaying the waveform of the digital output signal;
s3, providing a waveform acquisition device, wherein the waveform acquisition device acquires waveform parameters of the digital output signal through acquisition software;
and S4, observing the waveform of the digital output signal by changing the duty ratio of the digital input signal, and recording the waveform parameters of the digital output signal until the acquisition software cannot identify the waveform of the digital output signal.
10. The method according to claim 9, wherein in the step S1, the digital signal generating circuit comprises a regulating unit and a collecting unit, the regulating unit is used for regulating a duty ratio of a digital input signal, and the collecting unit is used for collecting a waveform of the digital input signal to output a digital output signal.
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| CN201315646Y (en) * | 2008-12-23 | 2009-09-23 | 深圳创维－Rgb电子有限公司 | Digital audio interface circuit for TV |
| CN105071652A (en) * | 2015-09-22 | 2015-11-18 | 广东志高暖通设备股份有限公司 | Control Boost PFC circuit |
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| WO2006043511A1 (en) * | 2004-10-18 | 2006-04-27 | Nsk Ltd. | Abnormality diagnosis system for machinery |
| US7863910B2 (en) * | 2005-08-29 | 2011-01-04 | Nec Corporation | Insulation resistance detecting apparatus |
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| CN201315646Y (en) * | 2008-12-23 | 2009-09-23 | 深圳创维－Rgb电子有限公司 | Digital audio interface circuit for TV |
| CN105071652A (en) * | 2015-09-22 | 2015-11-18 | 广东志高暖通设备股份有限公司 | Control Boost PFC circuit |
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