CN109936374B - Error correction performance evaluation method based on information transfer outside original model graph - Google Patents
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Abstract
The application discloses an error correction performance evaluation method based on information transfer outside an original model image, which can acquire inter-unit coupling strength factors of a NAND flash memory channel, determine channel mutual information corresponding to the inter-unit coupling strength factors, determine channel likelihood information variance according to the channel mutual information and a target relational expression, finally judge whether the variance meets a convergence condition, and determine an error correction performance evaluation result if the variance meets the convergence condition. Therefore, the method aims at the problems that the flash memory channel has various noise interferences and the output likelihood information does not meet the symmetrical Gaussian distribution, selects the coupling strength factor between units as the channel noise measurement index, determines the likelihood information variance by using the target relational expression and the channel mutual information, determines the error correction performance evaluation result through the improvement, and finally achieves the purpose of accurately evaluating the error correction performance. In addition, the application also provides an error correction performance evaluation device, equipment and a computer readable storage medium based on the information transfer outside the original pattern, and the function of the device corresponds to the method.
Description
Technical Field
The present application relates to the field of computers, and in particular, to a method, an apparatus, a device, and a computer-readable storage medium for evaluating error correction performance based on information transfer outside an original template.
Background
In the era of information explosion today, vast amounts of information need to be stored. The flash memory is one of mainstream data storage media, has the characteristics of high storage density, high read-write speed, low power consumption and the like, gradually replaces other semiconductor memories due to the advantages, and is widely applied to the fields of electronic consumer products, cloud service storage, large-scale enterprise data application and the like. By category, the most widely used are NAND flash memory and NOR flash memory. Both types of flash memory differ in density, performance, and operating characteristics. The memory density of NOR flash is smaller than that of NAND flash, but the erase time of NOR flash is 350 times that of NAND flash. NAND flash memories have higher storage density and faster writing speed than NOR flash memories, and are therefore often used in data memories.
However, the NAND flash memory channel has random telegraph noise, data retention noise, inter-cell interference and other noises, and because the existence of several noises greatly reduces the reliability and erasing life of the data storage of the NAND flash memory, the NAND flash memory needs to apply an error correction code to ensure the reliability of the data storage.
An LDPC (Low-density Parity-check) code is a linear block code with a sparse check matrix, has excellent error correction performance, and has the characteristics of Low decoding complexity, parallel decoding, and detectability of decoding errors. However, most of the conventional LDPC codes belong to irregular codes, and these irregular codes often have high encoding complexity and are difficult to implement in hardware, and for the conventional LDPC codes, in the codeword construction process, the existence of variable nodes with a degree of 1 may cause unsuccessful convergence of iterative decoding. Therefore, some researchers have proposed a Protograph (Protograph) LDPC code, which is obtained by a "repeat-interleave" operation of a Tanner graph composed of a small number of variable nodes and check nodes, and a check matrix constructed by this construction method inherits the code rate, degree distribution, and computational complexity of the Protograph. Compared with the traditional LDPC code, the structure of the original pattern determines the performance of the LDPC code of the original pattern, so that a density evolution algorithm, an Extrinsic information transfer (EXIT) algorithm and progressive weight analysis can be directly applied to the original pattern, and the design and analysis of a code pattern are facilitated.
In the design and analysis of the LDPC code, a density evolution algorithm and an extrinsic information transfer algorithm are effective tools for calculating an iterative decoding threshold value and predicting the error performance of a low signal-to-noise ratio region. The basic idea of the density evolution algorithm is to track the evolution of the probability density of the log-likelihood ratios in an iterative decoder to obtain an iterative decoding threshold. The extrinsic information transfer algorithm analyzes the convergence of the decoder from the perspective of mutual information, and can be regarded as a simplified algorithm of the density evolution algorithm. The external information transfer algorithm can not only obtain the iterative decoding threshold value with high accuracy, but also has the advantages of low computational complexity, visualization, easy programming and the like.
However, the conventional Extrinsic information transfer algorithm is not suitable for the original-pattern LDPC code, and in order to solve this problem, another scholars have proposed a Protograph Extrinsic information transfer (PEXIT) algorithm, which takes into account the characteristics of different edge connections and calculates mutual information of each variable node and check node instead of mutual information of degree distribution pairs. In order to solve the problem of the variable point with the degree of 1, the PEXIT algorithm is to calculate the a posteriori mutual information between each variable point and the corresponding code word, and when the a posteriori mutual information reaches 1, the decoder converges successfully.
Currently, a scholars proposes a scheme for evaluating an original pattern LDPC code based on an additive white gaussian noise channel by using an out-of-original pattern information transfer algorithm, however, the scheme is not suitable for a NAND flash memory channel for the following reasons:
first, in the NAND flash memory, the amount of charge stored in the flash memory cell is detected by a preset reference voltage, and under this quantization scheme, the NAND flash memory channel is equivalent to a discrete memoryless channel with discrete input and discrete output. Due to the non-linear nature of the quantizer, the probability density distribution of likelihood information output by the NAND flash channel is no longer a symmetric gaussian distribution.
Secondly, the algorithm for transferring the information outside the original pattern based on the additive white gaussian noise channel measures the performance of the LDPC code of the original pattern by using the signal-to-noise ratio as an index, however, in the NAND flash memory channel, there are various noise interferences such as random telegraph noise, data retention noise, and inter-cell interference, and therefore these noises cannot be measured by the signal-to-noise ratio in the NAND flash memory.
In summary, the existing algorithm for transferring the information outside the original pattern based on the additive white gaussian noise is not suitable for the NAND flash memory channel, so that the error correction performance of the LDPC code of the original pattern based on the NAND flash memory channel cannot be accurately evaluated by using the algorithm.
Disclosure of Invention
The application aims to provide a method, a device and equipment for evaluating the error correction performance based on the transfer of the information outside the original pattern and a computer readable storage medium, which are used for solving the problem that the error correction performance of the LDPC code of the original pattern cannot be accurately evaluated because the existing algorithm for transferring the information outside the original pattern is not suitable for a NAND flash memory channel.
In order to solve the above technical problem, the present application provides an error correction performance evaluation method based on information transfer outside an original template, including:
acquiring inter-unit coupling strength factors of the NAND flash memory channel;
determining channel mutual information corresponding to the coupling strength factor between the units, and determining channel likelihood information variance according to the channel mutual information and a target relation, wherein the target relation is
Is the variance of the channel likelihood information, IchFor said channel mutual information, J-1(Ich) As an inverse function of the mutual information of said channels, PjA deletion flag bit of a target variable node;
judging whether the channel likelihood information variance meets the convergence condition of information transfer outside the original model image;
and if so, determining an error correction performance evaluation result according to the coupling strength factor between the units.
Optionally, the determining channel mutual information corresponding to the inter-unit coupling strength factor specifically includes:
determining a sequence of channel likelihood information corresponding to the inter-cell coupling strength factor;
and carrying out Monte Carlo simulation on the channel likelihood information sequence to obtain channel mutual information.
Optionally, the sequence length of the channel likelihood information sequence is a preset length.
Optionally, the determining whether the channel likelihood information variance meets a convergence condition of information transfer outside the original model image specifically includes:
and determining the posterior mutual information of the target variable node according to the channel likelihood information variance, judging whether the posterior mutual information is equal to a preset threshold value, and if so, judging that the channel likelihood information variance meets the convergence condition of information transfer outside the original pattern diagram.
Optionally, after determining whether the posterior mutual information is equal to a preset threshold, the method further includes:
if the posterior mutual information is not equal to the preset threshold, judging whether the current iteration times exceed the maximum iteration times;
if the current iteration number exceeds the preset value, updating the coupling strength factor between the units according to a preset rule, and resetting the current iteration number;
if not, repeating the process of determining the posterior mutual information of the target variable node according to the channel likelihood information variance.
Optionally, the preset rule is to subtract a preset step length from the inter-cell coupling strength factor.
The application also provides an error correction performance evaluation device based on the information transfer outside the original model image, which comprises:
an acquisition module: the method comprises the steps of obtaining an inter-cell coupling strength factor of a NAND flash memory channel;
a variance determination module: used for determining the channel mutual information corresponding to the coupling strength factor between the units and determining the variance of the channel likelihood information according to the channel mutual information and a target relation, wherein the target relation is
For the variance of the channel likelihood information,Ichfor said channel mutual information, J-1(Ich) As an inverse function of the mutual information of said channels, PjA deletion flag bit of a target variable node;
a judging module: the convergence condition is used for judging whether the channel likelihood information variance meets the information transfer outside the original model image;
an evaluation result determination module: and determining an error correction performance evaluation result according to the coupling strength factor between the units when the channel likelihood information variance meets the convergence condition of the information transfer outside the original model.
Optionally, the variance determining module specifically includes:
likelihood information sequence determination unit: for determining a sequence of channel likelihood information corresponding to the inter-cell coupling strength factor;
a channel mutual information determination unit: and the channel likelihood information sequence is subjected to Monte Carlo simulation to obtain channel mutual information.
In addition, the present application also provides an error correction performance evaluation device based on the information transfer outside the original model, including:
a memory: for storing a computer program;
a processor: for executing the computer program to implement the steps of a method for evaluating error correction performance based on off-master information transfer as described in any one of the above.
Finally, the present application also provides a computer-readable storage medium having stored thereon a computer program for implementing the steps of a method for error correction performance evaluation based on off-master information transfer as described in any one of the above when being executed by a processor.
The method for evaluating the error correction performance based on the transfer of the information outside the original model image can acquire the inter-unit coupling strength factor of the NAND flash memory channel, determine the channel mutual information corresponding to the inter-unit coupling strength factor, determine the variance of the channel likelihood information according to the channel mutual information and the target relational expression, finally judge whether the variance of the channel likelihood information meets the convergence condition of the transfer of the information outside the original model image, and if so, determine the evaluation result of the error correction performance according to the inter-unit coupling strength factor. The method is suitable for the NAND flash memory channel by improving the transfer of the information outside the original pattern diagram, and determining the error correction performance evaluation result, thereby finally realizing the purpose of accurately evaluating the error correction performance of the LDPC code of the original pattern diagram.
In addition, the application also provides an error correction performance evaluation device, equipment and a computer readable storage medium based on the information transfer outside the original pattern, and the functions of the device and the equipment correspond to the method, and are not repeated herein.
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For a clearer explanation of the embodiments or technical solutions of the prior art of the present application, the drawings needed for the description of the embodiments or prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a diagram illustrating simulation experiment results of three types of noise in a NAND flash memory channel provided in the present application;
fig. 2 is a flowchart illustrating a first implementation of an error correction performance evaluation method based on information transfer outside a template graph according to an embodiment of the present disclosure;
fig. 3 is a flowchart illustrating an implementation of a second embodiment of an error correction performance evaluation method based on information transfer outside a template graph according to the present application;
FIG. 4 is a functional block diagram of an embodiment of an apparatus for evaluating error correction performance based on information transfer outside a template graph provided in the present application;
fig. 5 is a schematic structural diagram of an error correction performance evaluation apparatus based on information transfer outside a template graph according to the present application.
Detailed Description
The core of the application is to provide an error correction performance evaluation method, device, equipment and computer readable storage medium based on the transfer of the information outside the original pattern, and the method is applied to a NAND flash memory channel by improving the traditional transfer method of the information outside the original pattern, so that the error correction performance evaluation result is determined, and the purpose of accurately evaluating the error correction performance of the LDPC code of the original pattern is realized.
In order that those skilled in the art will better understand the disclosure, the following detailed description will be given with reference to the accompanying drawings. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
As described in the background art, the existing off-prototype information transfer algorithm based on the additive white gaussian noise channel requires that the likelihood information output by the channel obeys the gaussian normal distribution, and in addition, the algorithm uses the signal-to-noise ratio as the measurement index. However, in the NAND flash memory, the output likelihood information is not subjected to gaussian distribution due to the nonlinearity of the quantizer, and the noise in the flash memory is not measured by the signal-to-noise ratio, so that the existing off-original-pattern information transfer algorithm is not suitable for evaluating the error correction performance of the original-pattern LDPC code based on the NAND flash memory. In order to solve the above problems, the present application provides an error correction performance evaluation method, apparatus, device and computer readable storage medium based on the information transfer outside the original model. The embodiments provided in the present application will be described below, and for the convenience of understanding the embodiments to be described below, the related background and concepts will be described first, and the following two aspects will be mainly distinguished:
in the first aspect, as mentioned above, the noise of the NAND flash memory channel cannot be measured by the signal-to-noise ratio, and a brief description is given below of several noises involved in the NAND flash memory channel, and a simulation experiment result shows how to select an appropriate parameter as a measurement index of the noise of the NAND flash memory channel. Specifically, the NAND flash memory channel mainly includes three types of noise, namely, random telegraph noise, data retention noise, and inter-cell interference, which are introduced as follows:
in NAND flash memory, random telegraph noise is a non-stationary noise component that is related to the number of erasures of the flash memory. As the number of times of erasing increases, the fluctuation of the threshold voltage of the cell, which is called random telegraph noise, is caused; data retention noise is also a non-stationary noise component, which is related to the erase time of the flash memory, and to the time of data retention; in a flash memory, a change in the threshold voltage of one cell affects the threshold voltage of an adjacent cell, which is inter-cell interference, and as the manufacturing process advances, the chip size becomes smaller and smaller, and the inter-cell interference becomes more and more serious.
The following description is about the simulation experiment of the above three kinds of noise, as shown in fig. 1, fig. 1 illustrates the distribution of threshold voltages of the NAND flash memory unit after being subjected to programming, random telegraph noise, inter-unit interference and data retention noise interference, and it can be known from the simulation result that one of the threshold voltage distributions of the programmed flash memory unit is gaussian distribution and the others are uniformly distributed; after random telegraph noise, the threshold voltage distribution is only slightly distorted; after the interference among the units, the threshold voltage distribution has serious distortion and aliasing; finally, after data retention noise interference, aliasing between threshold voltage distributions of different states is more serious. It can be seen that the intercell interference is one of the most serious noises in the NAND flash memory channel, and the greater the coupling factor s between cells, the greater the intercell interference, and the more serious the distortion and aliasing of the threshold voltage distribution. Therefore, the inter-cell strength coupling factor s is selected as a measure of the noise of the NAND flash memory channel.
In the second aspect, as described above, the output likelihood information in the NAND flash memory does not follow the gaussian distribution due to the nonlinearity of the quantizer, and therefore, the channel likelihood information variance cannot be obtained according to the formula in the existing off-prototype information transfer algorithm based on the additive white gaussian noise channel. In order to solve the above problems, the present application first briefly introduces the process of the prior information transfer algorithm outside the original template diagram:
the existing external information transfer algorithm of the master pattern mainly comprises the following steps: initializing, and setting an initial value of a signal-to-noise ratio and the maximum iteration number; determining a channel likelihood information variance according to the signal-to-noise ratio; and then entering an iteration process, specifically, calculating external mutual information transmitted from the variable node to the check node according to the channel likelihood information variance, calculating external mutual information transmitted from the check node to the variable node according to the previous calculation result, calculating posterior mutual information of the variable node according to the previous calculation result, finally judging whether the posterior mutual information meets a convergence condition, if so, ending the iteration and outputting the current signal-to-noise ratio, otherwise, repeating the iteration process until the maximum iteration frequency is reached, and updating the value of the signal-to-noise ratio when the maximum iteration frequency is reached. And finally obtaining a signal-to-noise ratio value which meets the convergence condition and is the iterative decoding threshold value.
Therefore, the prior algorithm for transferring information outside the prototype graph only tracks mutual information but is insensitive to likelihood information, so that the distribution of the initial likelihood information of the channel corresponding to the initial mutual information of the channel can be regarded as obeying symmetric Gaussian distribution, and the variance of the channel likelihood information of the channel can be obtained by using the inverse function of the mutual information of the channel. The following describes the functions and inverse functions of channel mutual information:
in an additive white gaussian noise channel, assuming that X represents an equi-probability distribution of binary random variables (i.e., p (X-1) ═ 1/2 and p (X-1) ═ 1/2), and Y represents likelihood information of channel output, then Y follows a mean value, μ variance, σ, and Y follows a variance2Let J (σ) represent the mutual information between X and Y, then J (σ) is the channel capacity of the binary input white gaussian noise channel, which can be expressed as:
the inverse function is:
wherein, η1＝1.09542，η2＝0.214217，η3＝2.33737，η4＝-0.706692，η5＝0.386013，η6＝1.75017。
Referring to fig. 2, a first embodiment of an error correction performance evaluation method based on information transfer outside a template diagram provided by the present application is described below, where the first embodiment includes:
step S101: an inter-cell coupling strength factor for the NAND flash memory channel is obtained.
As described above, the extrinsic information transfer algorithm based on the additive white gaussian noise channel uses the signal-to-noise ratio as a metric, and the noise in the NAND flash memory is not measured by the signal-to-noise ratio. The inter-cell interference is the most serious noise in the NAND flash memory, and has the greatest influence on the performance of the flash memory, and the larger the inter-cell coupling strength factor is, the stronger the inter-cell coupling effect is, and the more serious the corresponding inter-cell interference is, so the influence of the inter-cell coupling strength factor on the generation of the flash memory channel is similar to the influence of the signal-to-noise ratio on the generation of the additive white gaussian noise channel. Therefore, the present embodiment selects the coupling strength factor between the cells as the metric of the NAND flash memory channel.
Specifically, the method for transferring the information outside the original model image includes an iterative process, and the value of the noise measure index needs to be updated in the iterative process, that is, the inter-unit coupling strength factor in this embodiment needs to be updated, so the inter-unit coupling strength factor obtained in this embodiment may be the automatically updated inter-unit coupling strength factor in the calculation process, or may be an initial value of the inter-unit coupling strength factor set in the initialization process. The initialized value of the coupling strength factor between the units is not specifically limited in this embodiment, and may be set according to actual requirements. For the updating mode of the inter-cell coupling strength factor in the updating process, the preset step length may be subtracted from the inter-cell coupling strength factor each time, wherein the specific value of the preset step length is set according to the actual requirement, and this embodiment is not limited specifically.
Step S102: and determining channel mutual information corresponding to the coupling strength factors among the units, and determining the variance of the channel likelihood information according to the channel mutual information and the target relation.
For convenience of subsequent description, an original model graph is introduced, and the original model graph is composed of a plurality of variable nodes, a plurality of check nodes and edges connecting the variable nodes and the check nodes. Assuming that there is now a prototype graph consisting of M check nodes and N variable nodes, for ease of description, the following symbols are introduced: ciRepresenting check nodes, VjRepresents variable nodes, where I is 1,2, … M, j is 1,2, …, N, IchRepresents VjReceived channel mutual information, when VjWhen the variable node is punctured, Ich＝0。
As mentioned above, the non-linearity of the quantizer in the NAND flash memory makes the likelihood information of the channel output not subject to gaussian distribution, and therefore, the channel likelihood information variance cannot be directly found from the formula in the existing off-original model information transfer algorithm based on the additive white gaussian noise channel. Therefore, in this embodiment, the channel mutual information is first obtained, and then the inverse function of the channel mutual information is used to obtain the channel likelihood information variance of the channel, where the target relation is a formula for obtaining the channel likelihood information variance according to the channel mutual information, and specifically:
wherein
Is the variance of the channel likelihood information, IchFor said channel mutual information, J-1(Ich) As an inverse function of the mutual information of said channels, PjAnd the deleted flag bit of the target variable node.
Specifically, the process of determining the channel mutual information according to the coupling strength factor between the units is divided into two steps, which are respectively: and determining a corresponding channel likelihood sequence according to the coupling strength factor between the units, and determining channel mutual information according to the channel likelihood sequence. As a specific implementation manner, the channel mutual information may be determined by performing monte carlo simulation on the channel likelihood information sequence. It should be noted that, in order to ensure the accuracy of the channel mutual information, the length of the channel likelihood information sequence needs to be ensured to be long enough, and therefore, the sequence length range of the channel likelihood information sequence can be set in advance.
Step S103: and judging whether the channel likelihood information variance meets the convergence condition of the information transfer outside the original model image, and if so, entering the step S104.
Specifically, the posterior mutual information of the variable node is determined according to the variance of the channel likelihood information, and then whether the posterior mutual information satisfies the convergence condition is determined, as a specific implementation manner, where the convergence condition is that the posterior mutual information is equal to 1. The process of determining the posterior mutual information of the variable nodes according to the channel likelihood information variance comprises the following steps: determining external mutual information transmitted to the check node by the variable node according to the channel likelihood information variance; determining external mutual information transmitted to the variable node by the check node according to the external mutual information of the check node; and finally, determining the posterior mutual information of the variable nodes according to the external mutual information of the variable nodes.
It should be noted that the above process of determining the posterior mutual information of the variable node according to the channel likelihood information variance is actually an iterative process, and when it is determined that the posterior mutual information of the variable node does not satisfy the convergence condition, the process needs to be repeated until the convergence condition is satisfied or the maximum iteration number is reached. When the maximum iteration number is reached, the current iteration number needs to be reset and the coupling strength factor between the units needs to be updated, and then the step S102 is performed.
Step S104: and determining an error correction performance evaluation result according to the coupling strength factor between the units.
Specifically, an evaluation rule may be preset, and after the final inter-unit coupling strength factor is obtained, the final error correction performance evaluation result is obtained by combining the inter-unit coupling strength factor and the preset evaluation rule.
It is worth mentioning that, for NAND flash memory, the flash memory can be divided into three types according to the state that can be stored in the flash memory cell, which are respectively: Single-Level-Cell (SLC) type, Multi-Level-Cell (MLC) type, and Three-Level-Cell (TLC) type. The present embodiment can be applied to MLC type NAND flash memory channels, and also to triple-level cell TLC type NAND flash memory channels. In addition, the bit line structure of the NAND flash memory may be divided into a parity bit line structure and a full bit line structure, wherein, in the parity bit line structure, for the same word line, the cells on the even bit line are programmed first, and the cells on the odd bit line are programmed later, so that the flash memory cells on the even bit line are interfered by 5 adjacent flash memory cells, and the cells on the odd bit line are interfered by 3 adjacent flash memory cells; in the all-bit line structure, all flash memory cells on the same word line are programmed simultaneously, so one cell of the all-bit line structure is affected by 3 adjacent cells, and therefore, it can be seen that the inter-cell interference is also related to the structure of the NAND flash bit line, wherein the all-bit line structure causes less inter-cell interference than the odd-even bit line structure, and therefore, as a preferred embodiment, the embodiment can be applied to the NAND flash memory channel of the all-bit line structure.
In summary, the error correction performance evaluation method based on the off-die information transfer provided by this embodiment can obtain the inter-cell coupling strength factor of the NAND flash memory channel, determine the channel mutual information corresponding to the inter-cell coupling strength factor, determine the channel likelihood information variance according to the channel mutual information and the target relational expression, finally determine whether the channel likelihood information variance meets the convergence condition of the off-die information transfer, and if so, determine the error correction performance evaluation result according to the inter-cell coupling strength factor. The method is suitable for the NAND flash memory channel by improving the transfer of the information outside the original pattern diagram, and finally achieves the purpose of accurately evaluating the error correction performance of the LDPC code of the original pattern diagram.
The second embodiment of the error correction performance evaluation method based on the off-template information transfer provided by the present application is described in detail below, and is described in more detail in comparison with the first embodiment and the second embodiment.
Referring to fig. 3, the second embodiment specifically includes:
step S201: parameters set for the NAND flash channel are acquired.
Specifically, the parameter μ of the threshold voltage distribution in the erase state is seteAnd σe1.15 and 0.3, respectively, incremental programming step voltage Δ VappThe determination voltage was 2.55, 3.0, and 3.45, respectively, at 0.3. For random telegraph noise, let λrEqual to 0.025. For intercell interference, γ is setxy、γy0.006s and 0.08s, respectively, which refer to coupling strength factors between cells and employ an all bit line architecture. For data retention noise, a parameter K is sets＝0.38，x0＝1.4，Km＝4×10-6，Kd＝4×10-4. And initializing the initial value of a coupling strength factor s between units, wherein the initialization iteration number T is 0, the maximum iteration number is set as T.
Step S202: a sequence of channel likelihood information is determined.
Since the change of the coupling strength factor between the cells causes the change of the threshold voltage of the flash memory, it is necessary to obtain 6 reference voltages by maximizing the mutual information of the channel input and output to match the state of the current threshold voltage for each given coupling strength factor between the cells. Then randomly generating a binary information bit sequence, and coding the information bit sequence by using an original pattern LDPC code coder to obtain a coded bit sequence c ═ c0,c1,...,cn-1]The coding sequence c is modulated to form a modulation symbol sequence x ═ x0,x1,...,xm-1，]Where m is n/2, and sending the modulation symbol sequence x to the NAND flash memory channel to generate a data storage symbol sequence y1,y2,...,ym-1]Finally, the detector detects the data storage symbol sequence y by using 6 reference voltages and generates a channel initial likelihood signalInformation sequence { Lch}。
In order to ensure the accuracy of calculating the channel mutual information, the length of the channel likelihood information sequence is long enough, and as a preferred implementation, it is desirable to set a proper sequence length, and in particular, the sequence length is set to 100000 in this embodiment.
Step S203: channel mutual information is determined.
Specifically, the second embodiment is implemented based on an original graph composed of M check nodes and N variable nodes, and for convenience of subsequent understanding, the parameters of the original graph related to the second embodiment are introduced: ciRepresenting check nodes, VjRepresents variable nodes, where I is 1,2, … M, j is 1,2, …, N, IchRepresents VjReceived channel mutual information, when VjWhen the variable node is punctured, Ich＝0。
Specifically, the embodiment is implemented by initializing a likelihood information sequence { L } for the channelchPerforming Monte Carlo simulation to obtain initial mutual information I of channelschThe expression is as follows:
where E denotes desired and c denotes the code word.
Step S204: a channel likelihood information variance is determined.
For j ═ 1,2, …, N, variable node VjInitial mutual information ofchThe corresponding variance, i.e., the channel likelihood information variance, is:
wherein
Is the variance of the channel likelihood information, IchFor said channel mutual information, J-1(Ich) As an inverse function of the mutual information of said channels, PjIs a target variable nodeIn particular, when VjFor deleting variable nodes PjNot equal to 0, otherwise Pj＝1。
Step S205: and judging whether the current iteration time T is less than the maximum iteration time T, if so, entering step S207, otherwise, entering step S206.
Step S206: s is updated by S-0.001, the current iteration number t is reset, and the process proceeds to step S202.
Step S207: and determining external mutual information transmitted to the check nodes by the variable nodes.
For j 1,2, …, N and i 1,2i,jNot equal to 0, then the variable node to the external mutual information I of the check nodeEvThe expression of (i, j) is:
wherein, bi,jRepresents VjAnd CiConnected edge when bi,jWhen equal to 0, IEv(i, j) ═ 0; for j 1,2, …, N and I1, 2Ac(i,j)＝IEv(i, j); in the above formula, k represents a value different from i, and for example, when i is 1, k is 2,3 …, N. I isAv(i, j) represents VjAnd CiEach edge of the link passes to VjLikelihood information of and VjPrior mutual information between corresponding codewords; i isEv(i, j) represents VjIs transmitted to CiLikelihood information of and VjExternal mutual information between corresponding codewords; in fact, during each iteration, I is satisfiedAc(i,j)＝IEv(I, j) and IAv(i,j)＝IEc(i,j)。
Step S208: and determining external mutual information transmitted to the variable nodes by the check nodes.
For j 1,2, …, N and i 1,2i,jNot equal to 0, checking external mutual information I from the node to the variable nodeEc(i, j) the expression is:
wherein, when bi,jWhen equal to 0, IEc(i, j) ═ 0; for j 1,2, …, N and I1, 2Av(i,j)＝IEc(i, j); the meaning of k is the same as that of k in formula (5). I isAc(i, j) represents CiAnd VjEach edge connected is passed to CiLikelihood information of and VjPrior mutual information between corresponding codewords; i isEc(i, j) represents CiIs transmitted to VjLikelihood information of (1) and (C)iExtrinsic mutual information between corresponding codewords.
Step S209: and determining the posterior mutual information of the variable nodes.
For j ═ 1,2, …, N, the a posteriori mutual information expression is:
wherein, IappRepresents VjA posteriori likelihood information ofjPosterior mutual information between corresponding codewords; the meaning of k is the same as that of k in formula (5). If for any j ═ 1,2, …, N, there is Iapp(j) If 1, the iteration ends.
Step S210: and judging whether the posterior mutual information is equal to 1, if so, entering step S212, and otherwise, entering step S211.
Step S211: t is updated as t +1, and the process proceeds to step S205.
Step S212: and outputting the current coupling strength factor between the units.
The final output result is the maximum inter-unit coupling strength factor which can make the posterior mutual information of all variable nodes converge to 1, the maximum inter-unit coupling strength factor is the iterative decoding threshold value, and the iterative decoding threshold value is an important parameter for evaluating the error correction performance.
Step S213: and determining an error correction performance evaluation result according to the coupling strength factor between the units.
It can be seen that, in the error correction performance evaluation method based on the off-template information transfer provided by this embodiment, under the condition that the dynamic change of the threshold voltage is considered, the initial mutual information of the channel is obtained by using the monte carlo simulation, and the inter-unit coupling strength factor is selected as the metric index of the improved off-template information transfer algorithm. Therefore, the method fully considers the characteristics of the MLC type NAND flash memory, is suitable for the MLC type NAND flash memory, and is beneficial to theoretical analysis and code pattern design of the original pattern LDPC code under the MLC type NAND flash memory channel.
In the following, an embodiment of an error correction performance evaluation apparatus based on the transfer of the information outside the original template diagram provided by the embodiment of the present application is introduced, and a reference may be made between the error correction performance evaluation apparatus based on the transfer of the information outside the original template diagram and the error correction performance evaluation method based on the transfer of the information outside the original template diagram described above.
As shown in fig. 4, the apparatus includes:
the acquisition module 401: the method comprises the steps of obtaining an inter-cell coupling strength factor of a NAND flash memory channel;
the variance determination module 402: used for determining the channel mutual information corresponding to the coupling strength factor between the units and determining the variance of the channel likelihood information according to the channel mutual information and a target relation, wherein the target relation is
Is the variance of the channel likelihood information, IchFor said channel mutual information, J-1(Ich) As an inverse function of the mutual information of said channels, PjA deletion flag bit of a target variable node;
the judging module 403: the convergence condition is used for judging whether the channel likelihood information variance meets the information transfer outside the original model image;
evaluation result determination module 404: and determining an error correction performance evaluation result according to the coupling strength factor between the units when the channel likelihood information variance meets the convergence condition of the information transfer outside the original model.
As an optional implementation manner, the variance determining module 402 specifically includes:
likelihood information sequence determination unit: for determining a sequence of channel likelihood information corresponding to the inter-cell coupling strength factor;
a channel mutual information determination unit: and the channel likelihood information sequence is subjected to Monte Carlo simulation to obtain channel mutual information.
An error correction performance evaluation apparatus based on the information transfer outside the original model diagram of this embodiment is used to implement the aforementioned error correction performance evaluation method based on the information transfer outside the original model diagram, and therefore a specific implementation manner in the apparatus can be seen in the foregoing embodiment parts of an error correction performance evaluation method based on the information transfer outside the original model diagram, for example, the obtaining module 401, the variance determining module 402, the judging module 403, and the evaluation result determining module 404 are respectively used to implement steps S101, S102, S103, and S104 in the aforementioned error correction performance evaluation method based on the information transfer outside the original model diagram. Therefore, specific embodiments thereof may be referred to in the description of the corresponding respective partial embodiments, and will not be described herein.
In addition, since the error correction performance evaluation device based on the information transfer outside the original pattern is used for implementing the error correction performance evaluation method based on the information transfer outside the original pattern, the function of the error correction performance evaluation device corresponds to that of the method, and details are not described here.
In addition, the present application also provides an error correction performance evaluation apparatus based on information transfer outside a master pattern, as shown in fig. 5, the apparatus includes:
the memory 501: for storing a computer program;
the processor 502: for executing the computer program to implement the steps of a method for evaluating error correction performance based on off-master information transfer as described in any one of the above.
Finally, the present application also provides a computer-readable storage medium having stored thereon a computer program for implementing the steps of a method for error correction performance evaluation based on off-master information transfer as described in any one of the above when being executed by a processor.
An error correction performance evaluation device and a computer-readable storage medium based on the information transfer outside the original model diagram in this embodiment are used to implement the aforementioned error correction performance evaluation method based on the information transfer outside the original model diagram, so the specific implementation of the device and the computer-readable storage medium can be found in the foregoing embodiment of an error correction performance evaluation method based on the information transfer outside the original model diagram, and the functions of the device and the computer-readable storage medium correspond to the above-mentioned methods, and are not described here again.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The method, the apparatus, the device and the computer readable storage medium for evaluating error correction performance based on the information transfer outside the original image provided by the present application are described in detail above. The principles and embodiments of the present application are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present application. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
Claims (10)
1. An error correction performance evaluation method based on information transfer outside a prototype graph is characterized by comprising the following steps:
acquiring inter-unit coupling strength factors of the NAND flash memory channel;
determining channel mutual information corresponding to the coupling strength factor between the units, and determining channel likelihood information variance according to the channel mutual information and a target relation, wherein the target relation is
Is the variance of the channel likelihood information, IchFor said channel mutual information, J-1(Ich) As an inverse function of the mutual information of said channels, PjA deletion flag bit of a target variable node;
judging whether the channel likelihood information variance meets the convergence condition of information transfer outside the original model image;
and if so, determining an error correction performance evaluation result according to the coupling strength factor between the units.
2. The method according to claim 1, wherein the determining the channel mutual information corresponding to the inter-unit coupling strength factor specifically comprises:
determining a sequence of channel likelihood information corresponding to the inter-cell coupling strength factor;
and carrying out Monte Carlo simulation on the channel likelihood information sequence to obtain channel mutual information.
3. The method of claim 2, wherein the sequence length of the channel likelihood information sequence is a predetermined length.
4. The method according to claim 1, wherein the determining whether the channel likelihood information variance satisfies a convergence condition of the off-prototype information transfer specifically comprises:
and determining the posterior mutual information of the target variable node according to the channel likelihood information variance, judging whether the posterior mutual information is equal to a preset threshold value, and if so, judging that the channel likelihood information variance meets the convergence condition of information transfer outside the original pattern diagram.
5. The method according to claim 4, wherein after said determining whether said posterior mutual information is equal to a predetermined threshold, further comprising:
if the posterior mutual information is not equal to the preset threshold, judging whether the current iteration times exceed the maximum iteration times;
if the current iteration number exceeds the preset value, updating the coupling strength factor between the units according to a preset rule, and resetting the current iteration number;
if not, repeating the process of determining the posterior mutual information of the target variable node according to the channel likelihood information variance.
6. The method according to claim 5, wherein the predetermined rule is to subtract a predetermined step size from the inter-cell coupling strength factor.
7. An error correction performance evaluation apparatus based on information transfer outside a prototype diagram, comprising:
an acquisition module: the method comprises the steps of obtaining an inter-cell coupling strength factor of a NAND flash memory channel;
a variance determination module: used for determining the channel mutual information corresponding to the coupling strength factor between the units and determining the variance of the channel likelihood information according to the channel mutual information and a target relation, wherein the target relation is
Is the variance of the channel likelihood information, IchFor said channel mutual information, J-1(Ich) As an inverse function of the mutual information of said channels, PjA deletion flag bit of a target variable node;
a judging module: the convergence condition is used for judging whether the channel likelihood information variance meets the information transfer outside the original model image;
an evaluation result determination module: and determining an error correction performance evaluation result according to the coupling strength factor between the units when the channel likelihood information variance meets the convergence condition of the information transfer outside the original model.
8. The apparatus according to claim 7, wherein the variance determining module specifically comprises:
likelihood information sequence determination unit: for determining a sequence of channel likelihood information corresponding to the inter-cell coupling strength factor;
a channel mutual information determination unit: and the channel likelihood information sequence is subjected to Monte Carlo simulation to obtain channel mutual information.
9. An error correction performance evaluation apparatus based on information transfer outside a prototype diagram, comprising:
a memory: for storing a computer program;
a processor: for executing the computer program to implement a method of error correction performance evaluation based on off-master information transfer as claimed in any of claims 1-6.
10. A computer-readable storage medium, having stored thereon a computer program for implementing the steps of a method of error correction performance evaluation based on off-master information transfer according to any one of claims 1-6, when being executed by a processor.
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