CN109935190A - Electrifying timing sequence control unit, power-on time sequence control method and display module - Google Patents
Electrifying timing sequence control unit, power-on time sequence control method and display module Download PDFInfo
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- CN109935190A CN109935190A CN201910242628.5A CN201910242628A CN109935190A CN 109935190 A CN109935190 A CN 109935190A CN 201910242628 A CN201910242628 A CN 201910242628A CN 109935190 A CN109935190 A CN 109935190A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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Abstract
The present invention provides a kind of electrifying timing sequence control unit, power-on time sequence control method and display module.The electrifying timing sequence control unit includes N number of power-on time sequence control circuit；N is positive integer；N-th power-on time sequence control circuit includes 2n-1 control circuit and 2n control circuit；N is the positive integer less than or equal to N；The 2n-1 control circuit is used under the control for the 2n-1 voltage that 2n-1 voltage input end inputs, and is controlled and is connected between the n-th control terminal and the n-th reference voltage terminal；The 2n control circuit is used under the control for the 2n voltage that 2n voltage input end inputs, and when being connected between n-th control terminal and n-th reference voltage terminal, the connection between the 2n voltage input end and the n-th voltage output end is connected in control.The present invention can control electrifying timing sequence when lighting display module, avoid blank screen bad.
Description
Technical field
The present invention relates to field of display technology more particularly to a kind of electrifying timing sequence control units, power-on time sequence control method
And display module.
Background technique
In the prior art, will appear exception when lighting display module to power on, illegal electrifying timing sequence can generate high current
Phenomenon, to generate high fever, display module can be made ACF occur, and (Anisotropy Conducting Film, anisotropy are led
Electrolemma) it is layered, backlight of burning causes blank screen.
When lighting display module, legal electrifying timing sequence are as follows: VDDI first power on (VDDI be logical integrated circuit provide
Operating voltage, AVDD is powered on (AVDD is positive gamma principal voltage) later, then AVEE powers on (AVEE be negative gamma principal voltage), with true
Analog circuit after protecting shift register can work normally, so that IC (Integrated Circuit, integrated circuit) will not
There is the abnormal current due to caused by electrifying timing sequence entanglement.However, in the prior art, when lighting display module, can go out
Now illegal electrifying timing sequence is as follows: AVEE is first powered on, and AVDD is powered on later, then VDDI is powered on, it may appear that high current and reason
It is before VDDI is powered on, AVEE and AVDD have already powered on, and there is no latch (latch) correctly to set for shift register, because
This can not confirm output condition, and it is all Unknown (unknown) state that then IC, which controls analog signal, be easy to cause IC out of control, lead
It causes analog circuit to generate abnormal current, causes generation blank screen bad.
Summary of the invention
The main purpose of the present invention is to provide a kind of electrifying timing sequence control unit, power-on time sequence control method and display moulds
Group solves the electrifying timing sequence entanglement when lighting display module in the prior art, so as to cause the bad problem of blank screen.
In order to achieve the above object, the present invention provides a kind of electrifying timing sequence control units, including N number of electrifying timing sequence to control
Circuit；N is positive integer；N-th power-on time sequence control circuit includes 2n-1 control circuit and 2n control circuit；N be less than or
Positive integer equal to N；
The 2n-1 control circuit is used under the control for the 2n-1 voltage that 2n-1 voltage input end inputs, control
It is connected between n-th control terminal and the n-th reference voltage terminal；
The 2n control circuit is used under the control for the 2n voltage that 2n voltage input end inputs, described n-th
When being connected between control terminal and n-th reference voltage terminal, the 2n voltage input end and the n-th voltage output end is connected in control
Between connection.
When implementation, N is greater than 1；N-th voltage output end is connect with 2n+1 voltage input end.
When implementation, N is greater than 1, and first voltage input terminal is used to provide operating voltage for logical integrated circuit, and second voltage is defeated
Enter end for providing positive gamma principal voltage, tertiary voltage input terminal is connect with first voltage output end, and the 4th voltage input end is used
In the negative gamma principal voltage of offer；Alternatively,
N is equal to 1, and first voltage input terminal is used to provide operating voltage for logical integrated circuit, and second voltage input terminal is used
In the positive gamma principal voltage of offer；Alternatively,
N is equal to 1, and first voltage input terminal is for providing positive gamma principal voltage, and second voltage input terminal is for providing negative gal
Horse owner's voltage.
When implementation, the 2n-1 control circuit includes 2n-1 control transistor, 4n-3 resistance and 4n-2 resistance；
The control electrode of the 2n-1 control transistor passes through the 4n-3 resistance and the 2n-1 voltage input end
First pole of connection, 2n-1 control transistor is connect with n-th control terminal, and the 2n-1 controls the of transistor
Two poles are connect with n-th reference voltage terminal；
The first end of the 4n-2 resistance is connect with the control electrode of 2n-1 control transistor, the 4n-2 electricity
The second end of resistance is connect with n-th reference voltage terminal.
When implementation, the 2n-1 voltage is greater than the n-th reference voltage of n-th reference voltage terminal input, the 2n-
1 control transistor is n-type transistor；Alternatively,
The 2n-1 voltage is less than or equal to the n-th reference voltage of n-th reference voltage terminal input, the 2n-1
Control transistor is p-type transistor.
When implementation, the 2n-1 control circuit further includes 4n-1 resistance；
First pole of the 2n-1 control transistor is connect by the 4n-1 resistance with n-th control terminal.
When implementation, the 2n control circuit includes 2n control transistor and 4n resistance；
The control electrode of 2n control transistor is connect with n-th control terminal, and the 2n controls the of transistor
One pole is connect with the 2n voltage input end, and the second pole of the 2n control transistor and n-th voltage output end connect
It connects；
The first end of the 4n resistance is connect with the 2n voltage input end, the second end of the 4n resistance and institute
State the connection of the n-th control terminal.
When implementation, the 2n voltage is less than the n-th reference voltage of n-th reference voltage terminal input, the 2n control
Transistor processed is n-type transistor；Alternatively,
The 2n voltage is greater than or equal to the n-th reference voltage of n-th reference voltage terminal input, the 2n control
Transistor is p-type transistor.
The present invention also provides a kind of power-on time sequence control methods, described applied to above-mentioned electrifying timing sequence control unit
Power-on time sequence control method includes:
2n-1 control circuit is under the control for the 2n-1 voltage that 2n-1 voltage input end inputs, the n-th control of control
It holds and is connected between the n-th reference voltage terminal；
The 2n control circuit is under the control for the 2n voltage that 2n voltage input end inputs, in n-th control
When end between n-th reference voltage terminal with being connected to, control is connected between the 2n voltage input end and the n-th voltage output end
Connection；
N is positive integer, and n is the positive integer less than or equal to N.
The present invention also provides a kind of display modules, including above-mentioned electrifying timing sequence control unit.
Compared with prior art, electrifying timing sequence control unit of the present invention, power-on time sequence control method and display mould
Group can control electrifying timing sequence when lighting display module, to guarantee that IC (Integrated Circuit, integrated circuit) exists
Be not in abnormal current when work, avoid blank screen bad.
Detailed description of the invention
Fig. 1 is the structure chart of electrifying timing sequence control unit described in the embodiment of the present invention；
Fig. 2 is the structure chart of electrifying timing sequence control unit described in another embodiment of the present invention；
Fig. 3 is the circuit diagram of the first specific embodiment of electrifying timing sequence control unit of the present invention；
Fig. 4 is the circuit diagram of the second specific embodiment of electrifying timing sequence control unit of the present invention；
Fig. 5 is the circuit diagram of the third specific embodiment of electrifying timing sequence control unit of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
The transistor used in all embodiments of the invention all can be triode, thin film transistor (TFT) or field-effect tube or its
The identical device of his characteristic.In embodiments of the present invention, to distinguish the two poles of the earth of transistor in addition to control electrode, will wherein claim a pole
For the first pole, another pole is known as the second pole.
In practical operation, when the transistor is triode, the control electrode can be base stage, and first pole can
Think collector, second pole can be with emitter；Alternatively, the control electrode can be base stage, described first can be extremely hair
Emitter-base bandgap grading, second pole can be with collector.
In practical operation, when the transistor is thin film transistor (TFT) or field-effect tube, the control electrode can be grid
Pole, described first can be extremely drain electrode, and described second extremely can be source electrode；Alternatively, the control electrode can be grid, described the
One extremely can be source electrode, and described second can be extremely drain electrode.
Electrifying timing sequence control unit described in the embodiment of the present invention includes N number of power-on time sequence control circuit；N is positive integer；
N-th power-on time sequence control circuit includes 2n-1 control circuit and 2n control circuit；N is the positive integer less than or equal to N；
The 2n-1 control circuit is used under the control for the 2n-1 voltage that 2n-1 voltage input end inputs, control
It is connected between n-th control terminal and the n-th reference voltage terminal；
The 2n control circuit is used under the control for the 2n voltage that 2n voltage input end inputs, described n-th
When being connected between control terminal and n-th reference voltage terminal, the 2n voltage input end and the n-th voltage output end is connected in control
Between connection.
Electrifying timing sequence control unit described in the embodiment of the present invention at work, in 2n-1 voltage input end input the
After 2n-1 voltage, 2n-1 control circuit controls to be connected between the n-th reference voltage terminal and the n-th control terminal；It is controlled in 2n-1
After being connected between the n-th reference voltage terminal of circuit control and the n-th control terminal, if 2n voltage input end inputs 2n voltage,
Then for 2n control circuit under the control of the 2n voltage, the 2n voltage input end and the n-th voltage output end is connected in control
Between connection, to export the 2n voltage by the n-th voltage output end, so as to control electrifying timing sequence.
In practical operation, N can be equal to 1,2, or any integer greater than 2.
As shown in Figure 1, electrifying timing sequence control unit described in the embodiment of the present invention includes the first power-on time sequence control circuit
11；
First power-on time sequence control circuit 11 includes first control circuit 111 and second control circuit 112；
The first control circuit 111 connects with first voltage input terminal, the first control terminal and the first reference voltage terminal respectively
It connects, for controlling the first control terminal Ctrl1 and the first benchmark under the control for the first voltage V1 that first voltage input terminal inputs
It is connected between voltage end；First reference voltage terminal is for inputting the first reference voltage V01；
The second control circuit 112 respectively with second voltage input terminal, the first control terminal Ctrl1 and first voltage
Output end VO1 connection, under the control for the second voltage V2 that second voltage input terminal inputs, in first control terminal
When being connected between Ctrl1 and first reference voltage terminal, the second voltage input terminal is connected in control and first voltage exports
Hold the connection between VO1.
In the specific implementation, first reference voltage terminal can be ground terminal or low-voltage end, and but not limited to this.
The embodiment of present invention electrifying timing sequence control unit as shown in Figure 1 at work, the first electrifying timing sequence control
Circuit 11 processed may include first control circuit 111 and second control circuit 112, input first voltage in first voltage input terminal
After V1, first control circuit 111 controls to be connected between the first reference voltage terminal and the first control terminal Ctrl1, to control described the
One control terminal Ctrl1 accesses the first reference voltage V01；The first reference voltage terminal and the first control are controlled in first control circuit 111
After being connected between end Ctrl1 processed, if second voltage input terminal inputs second voltage V2, then second control circuit 112 is at this
Under the control of second voltage V2, the connection between the second voltage input terminal and first voltage output end VO1 is connected in control, with
The second voltage V2 is exported by first voltage output end VO1.
At work, electrifying timing sequence is as follows to the embodiment of present invention electrifying timing sequence control unit as shown in Figure 1: first the
One voltage V1 is powered on, then second voltage V2 is powered on.
Specifically, n-th voltage output end is connect with 2n+1 voltage input end, that is, passing through institute when N is greater than 1
It states the n-th voltage output end and provides input voltage for adjacent next power-on time sequence control circuit.
In the specific implementation, when N is equal to 2, first voltage output end is connect with tertiary voltage input terminal namely the first electricity
Output end is pressed to provide tertiary voltage for tertiary voltage input terminal.
As shown in Fig. 2, electrifying timing sequence control unit described in the embodiment of the present invention includes the first power-on time sequence control circuit
11 and second power-on time sequence control circuit 12；
First power-on time sequence control circuit 11 includes first control circuit 111 and second control circuit 112；
The first control circuit 111 connects with first voltage input terminal, the first control terminal and the first reference voltage terminal respectively
It connects, for controlling the first control terminal Ctrl1 and the first benchmark under the control for the first voltage V1 that first voltage input terminal inputs
It is connected between voltage end；First reference voltage terminal is for inputting the first reference voltage V01；
The second control circuit 112 respectively with second voltage input terminal, the first control terminal Ctrl1 and first voltage
Output end VO1 connection, under the control for the second voltage V2 that second voltage input terminal inputs, in first control terminal
When being connected between Ctrl1 and first reference voltage terminal, the second voltage input terminal is connected in control and first voltage exports
Hold the connection between VO1；
First voltage output end VO1 is connect with tertiary voltage input terminal；
Second power-on time sequence control circuit 12 includes third control circuit 121 and the 4th control circuit 122；
The third control circuit 121 respectively with tertiary voltage input terminal, the second control terminal Ctrl2 and the second reference voltage
End connection, for controlling the second control terminal Ctrl2 and second under the control for the tertiary voltage V3 that tertiary voltage input terminal inputs
It is connected between reference voltage terminal；Second reference voltage terminal is for inputting the second reference voltage V02；
4th control circuit 122 respectively with the 4th voltage input end, the second control terminal Ctrl2 and second voltage
Output end VO2 connection, under the control for the 4th voltage V4 that the 4th voltage input end inputs, in second control terminal
When being connected between Ctrl2 and second reference voltage terminal, the 4th voltage input end is connected in control and second voltage exports
Hold the connection between VO2.
In the embodiment shown in Figure 2, the tertiary voltage V3 of tertiary voltage input terminal input is first voltage output end
The second voltage V2 of VO1 output.
In the specific implementation, first reference voltage terminal and second reference voltage terminal can be ground terminal or low-voltage
End, but not limited to this.
The embodiment of present invention electrifying timing sequence control unit as shown in Figure 2 is at work, defeated in first voltage input terminal
After entering first voltage V1, second voltage input terminal could input second voltage V2 to first voltage output end VO1, in tertiary voltage
Input terminal inputs after second voltage V2, and the 4th voltage input end could input the 4th voltage V4 to second voltage output end
VO2 namely electrifying timing sequence are only capable of being as follows: first first voltage V1 is powered on, then second voltage V2 is powered on, later the 4th voltage V4 again
It powers on.
According to a kind of specific embodiment, N can be greater than 1, and first voltage input terminal for logical integrated circuit for providing
Operating voltage VDDI, second voltage input terminal is for providing positive gamma principal voltage AVDD, tertiary voltage input terminal and first voltage
Output end connection, the 4th voltage input end is for providing negative gamma principal voltage AVEE；Alternatively,
According to another specific embodiment, N can be equal to 1, and first voltage input terminal for logical integrated circuit for mentioning
For operating voltage VDDI, second voltage input terminal is for providing positive gamma principal voltage AVDD；Alternatively,
According to another specific embodiment, N can be equal to 1, and first voltage input terminal is for providing positive gamma principal voltage
AVDD, second voltage input terminal is for providing negative gamma principal voltage AVEE.
In the specific implementation, VDDI can in 3.3V between 5V, AVDD can in 5V between 16V, AVEE can-
Between 16V to -5V, but not limited to this.
In practical operation, reasonable electrifying timing sequence are as follows: first VDDI is powered on, then AVDD is powered on, then AVEE is powered on, and in this way may be used
To ensure that IC (Integrated Circuit, integrated circuit) is not in abnormal current at work, avoid blank screen bad.
Specifically, the 2n-1 control circuit may include 2n-1 control transistor, 4n-3 resistance and 4n-2
Resistance；
The control electrode of the 2n-1 control transistor passes through the 4n-3 resistance and the 2n-1 voltage input end
First pole of connection, 2n-1 control transistor is connect with n-th control terminal, and the 2n-1 controls the of transistor
Two poles are connect with n-th reference voltage terminal；
The first end of the 4n-2 resistance is connect with the control electrode of 2n-1 control transistor, the 4n-2 electricity
The second end of resistance is connect with n-th reference voltage terminal.
According to a kind of specific embodiment, the 2n-1 voltage is greater than the n-th benchmark of n-th reference voltage terminal input
Voltage, the 2n-1 control transistor is n-type transistor；Alternatively,
According to another specific embodiment, the 2n-1 voltage is inputted less than or equal to n-th reference voltage terminal
The n-th reference voltage, 2n-1 control transistor is p-type transistor.
Specifically, the 2n-1 control circuit can also include 4n-1 resistance；
First pole of the 2n-1 control transistor is connect by the 4n-1 resistance with n-th control terminal.
Specifically, the 2n control circuit may include 2n control transistor and 4n resistance；
The control electrode of 2n control transistor is connect with n-th control terminal, and the 2n controls the of transistor
One pole is connect with the 2n voltage input end, and the second pole of the 2n control transistor and n-th voltage output end connect
It connects；
The first end of the 4n resistance is connect with the 2n voltage input end, the second end of the 4n resistance and institute
State the connection of the n-th control terminal.
According to a kind of specific embodiment, the 2n voltage is less than the n-th benchmark electricity of n-th reference voltage terminal input
Pressure, the 2n control transistor is n-type transistor；Alternatively,
According to another specific embodiment, the 2n voltage is greater than or equal to n-th reference voltage terminal input
N-th reference voltage, the 2n control transistor is p-type transistor.
Illustrate electrifying timing sequence control unit of the present invention below by three specific embodiments.
As shown in figure 3, when the first specific embodiment of electrifying timing sequence control unit of the present invention is powered on including first
Sequence control circuit 11；
First power-on time sequence control circuit 11 includes first control circuit 111 and second control circuit 112；
The first control circuit 111 includes the first control transistor Q1, first resistor R1, second resistance R2 and third electricity
Hinder R3；
The base stage of the first control transistor Q1 is connect by the first resistor R1 with the first voltage input terminal,
The collector of the first control transistor Q1 is connect by the 3rd resistor R3 with the first control terminal Ctrl1, described
The emitter of first control transistor Q1 is connect with ground terminal GND；
The first end of the second resistance R2 is connect with the base stage of the first control transistor Q1, the second resistance R2
Second end connect with ground terminal GND；
The second control circuit 112 includes the second control transistor Q2 and the 4th resistance R4；
The grid of the second control transistor Q2 is connect with the first control terminal Ctrl1, the second control transistor Q2
Source electrode connect with second voltage input terminal, it is described second control transistor Q2 drain electrode and the first voltage output end VO1
Connection；
The first end of the 4th resistance R4 is connect with the second voltage input terminal, the second end of the 4th resistance R4
It is connect with the first control terminal Ctrl1；
First voltage input terminal is used to provide operating voltage VDDI for logical integrated circuit, and second voltage input terminal is for mentioning
For positive gamma principal voltage AVDD.
In first specific embodiment of electrifying timing sequence control unit shown in Fig. 3, the first reference voltage terminal and the second base
Quasi- voltage end is all ground terminal, and but not limited to this.
In first specific embodiment of electrifying timing sequence control unit shown in Fig. 3, the first control transistor Q1 is NPN type
Triode, the second control transistor Q2 is PMOS tube (p-type metal-oxide semiconductor transistor), and but not limited to this.
First specific embodiment of present invention electrifying timing sequence control unit as shown in Figure 3 at work, due to R2 exist,
When VDDI is powered on, there are certain pressure differences between the base stage of Q1 and the emitter of Q1, by adjusting the resistance value of R1 and the electricity of R2
The ratio of resistance value, VDDI, which is powered on, to make Q1 be connected；When Q1 conducting, the grid of Q2 is grounded by R3, when AVDD is powered on,
Q2 is opened, then AVDD is exported by VO1.
First specific embodiment of present invention electrifying timing sequence control unit as shown in Figure 3 at work, when VDDI not on
When electric, Q1 is disconnected, and the current potential of the source electrode of the current potential and Q2 of the grid of Q2 is equal, then Q2 is disconnected, therefore AVDD can not be powered on, only
Have in the case where VDDI is powered on, AVDD can just be powered on.
As shown in figure 4, when the second specific embodiment of electrifying timing sequence control unit of the present invention is powered on including first
Sequence control circuit 11；
First power-on time sequence control circuit 11 includes first control circuit 111 and second control circuit 112；
The first control circuit 111 includes the first control transistor Q1, first resistor R1, second resistance R2 and third electricity
Hinder R3；
The base stage of the first control transistor Q1 is connect by the first resistor R1 with the first voltage input terminal,
The collector of the first control transistor Q1 is connect by the 3rd resistor R3 with the first control terminal Ctrl1, described
The emitter of first control transistor Q1 is connect with ground terminal GND；
The first end of the second resistance R2 is connect with the base stage of the first control transistor Q1, the second resistance R2
Second end connect with ground terminal GND；
The second control circuit 112 includes the second control transistor Q2 and the 4th resistance R4；
The grid of the second control transistor Q2 is connect with the first control terminal Ctrl1, the second control transistor Q2
Source electrode connect with second voltage input terminal, it is described second control transistor Q2 drain electrode and the first voltage output end VO1
Connection；
The first end of the 4th resistance R4 is connect with the second voltage input terminal, the second end of the 4th resistance R4
It is connect with the first control terminal Ctrl1；
First voltage input terminal is used for positive gamma principal voltage AVDD, and second voltage input terminal is for providing negative gamma principal voltage
AVEE。
In second specific embodiment of electrifying timing sequence control unit shown in Fig. 4, the first reference voltage terminal and the second base
Quasi- voltage end is all ground terminal, and but not limited to this.
In second specific embodiment of electrifying timing sequence control unit shown in Fig. 4, the first control transistor Q1 is NPN type
Triode, the second control transistor Q2 is NMOS tube (N-type metal-oxide semiconductor transistor), and but not limited to this.
Second specific embodiment of present invention electrifying timing sequence control unit as shown in Figure 4 at work, due to R2 exist,
When AVDD is powered on, there are certain pressure differences between the base stage of Q1 and the emitter of Q1, by adjusting the resistance value of R1 and the electricity of R2
The ratio of resistance value, AVDD, which is powered on, to make Q1 be connected；When Q1 conducting, the grid of Q2 is grounded by R3, when AVEE is powered on,
Q2 is opened, then AVEE is exported by VO1.
Second specific embodiment of present invention electrifying timing sequence control unit as shown in Figure 4 at work, when AVDD not on
When electric, Q1 is disconnected, and the current potential of the source electrode of the current potential and Q2 of the grid of Q2 is equal, then Q2 is disconnected, therefore AVEE can not be powered on, only
Have in the case where AVDD is powered on, AVEE can just be powered on.
As shown in figure 5, when the third specific embodiment of electrifying timing sequence control unit of the present invention is powered on including first
Sequence control circuit and the second power-on time sequence control circuit；
First power-on time sequence control circuit includes first control circuit 111 and second control circuit 112；
The first control circuit 111 includes the first control transistor Q1, first resistor R1, second resistance R2 and third electricity
Hinder R3；
The base stage of the first control transistor Q1 is connect by the first resistor R1 with the first voltage input terminal,
The collector of the first control transistor Q1 is connect by the 3rd resistor R3 with the first control terminal Ctrl1, described
The emitter of first control transistor Q1 is connect with ground terminal GND；
The first end of the second resistance R2 is connect with the base stage of the first control transistor Q1, the second resistance R2
Second end connect with ground terminal GND；
The second control circuit 112 includes the second control transistor Q2 and the 4th resistance R4；
The grid of the second control transistor Q2 is connect with the first control terminal Ctrl1, the second control transistor Q2
Source electrode connect with second voltage input terminal, it is described second control transistor Q2 drain electrode and the first voltage output end VO1
Connection；
The first end of the 4th resistance R4 is connect with the second voltage input terminal, the second end of the 4th resistance R4
It is connect with the first control terminal Ctrl1；
First voltage input terminal is used to provide operating voltage VDDI for logical integrated circuit, and second voltage input terminal is for mentioning
For positive gamma principal voltage AVDD；
Second power-on time sequence control circuit includes third control circuit 121 and the 4th control circuit 122；
The third control circuit 121 includes third control transistor Q3, the 5th resistance R5, the electricity of the 6th resistance R6 and the 7th
Hinder R7；
The base stage of the third control transistor Q3 is connect by the 5th resistance R5 with the tertiary voltage input terminal,
The collector of the third control transistor Q3 is connect by the 7th resistance R7 with the second control terminal Ctrl2, described
The emitter of third control transistor Q3 is connect with ground terminal GND；
The first end of the 6th resistance R6 is connect with the base stage of third control transistor Q3, the 6th resistance R2
Second end connect with ground terminal GND；
4th control circuit 122 includes the 4th control transistor Q4 and the 8th resistance R8；
The grid of the 4th control transistor Q4 is connect with the second control terminal Ctrl2, the 4th control transistor Q4
Source electrode connect with the 4th voltage input end, it is described 4th control transistor Q4 drain electrode and the second voltage output end VO2
Connection；
The first end of the 8th resistance R4 is connect with the 4th voltage input end, the second end of the 8th resistance R8
It is connect with the second control terminal Ctrl2；
Tertiary voltage input terminal is connect with the first voltage output end VO1, and the 4th voltage input end is for providing negative gal
Horse owner's voltage AVEE.
In the third specific embodiment of electrifying timing sequence control unit shown in Fig. 5, Q1 and Q3 are NPN type triode,
Q2 is PMOS tube, and Q4 is NMOS tube, and but not limited to this.
The third specific embodiment of present invention electrifying timing sequence control unit as shown in Figure 5 at work,
Since R2 exists, when VDDI is powered on, there are certain pressure differences between the base stage of Q1 and the emitter of Q1, pass through adjusting
The ratio of the resistance value of the resistance value and R2 of R1, VDDI, which is powered on, to make Q1 be connected；When Q1 conducting, the grid of Q2 passes through R3
Ground connection, when AVDD is powered on, Q2 is opened, then AVDD is exported by VO1 to tertiary voltage input terminal；When AVDD is powered on, due to R6
In the presence of there are certain pressure differences between the base stage of Q3 and the emitter of Q3, by the ratio for adjusting the resistance value of R5 and the resistance value of R6
Value, AVDD, which is powered on, to make Q3 be connected；When Q3 conducting, the grid of Q4 is grounded by R7, and when AVEE is powered on, Q4 is opened,
Then AVEE is exported by VO2；
The third specific embodiment of present invention electrifying timing sequence control unit as shown in Figure 5 at work, when VDDI not on
When electric, Q1 is disconnected, and the current potential of the source electrode of the current potential and Q2 of the grid of Q2 is equal, then Q2 is disconnected, therefore AVDD can not be powered on, only
Have in the case where VDDI is powered on, AVDD can just be powered on；When AVDD is not powered on, Q3 is disconnected, the current potential of the grid of Q4 and Q4's
The current potential of source electrode is equal, then Q4 is disconnected, therefore AVEE can not be powered on, only in the case where AVDD is powered on, in AVEE ability
Electricity.
The embodiment of the present invention guarantees the accuracy of electrifying timing sequence by circuit design, by setting to the periphery IC power supply circuit
Meter, to guarantee that IC is not in abnormal current at work, avoids blank screen to control the electrifying timing sequence of VDDI/AVDD/AVEE
It is bad.
Power-on time sequence control method described in the embodiment of the present invention, it is described applied to above-mentioned electrifying timing sequence control unit
Power-on time sequence control method includes:
2n-1 control circuit is under the control for the 2n-1 voltage that 2n-1 voltage input end inputs, the n-th control of control
It holds and is connected between the n-th reference voltage terminal；
The 2n control circuit is under the control for the 2n voltage that 2n voltage input end inputs, in n-th control
When end between n-th reference voltage terminal with being connected to, control is connected between the 2n voltage input end and the n-th voltage output end
Connection；
N is positive integer, and n is the positive integer less than or equal to N.
Display module described in the embodiment of the present invention includes above-mentioned electrifying timing sequence control unit.
Display module provided by the embodiment of the present invention can be mobile phone, tablet computer, television set, display, notebook
Any products or components having a display function such as computer, Digital Frame, navigator.
The above is a preferred embodiment of the present invention, it is noted that for those skilled in the art
For, without departing from the principles of the present invention, it can also make several improvements and retouch, these improvements and modifications
It should be regarded as protection scope of the present invention.
Claims (10)
1. a kind of electrifying timing sequence control unit, which is characterized in that including N number of power-on time sequence control circuit；N is positive integer；On n-th
Electric sequential control circuit includes 2n-1 control circuit and 2n control circuit；N is the positive integer less than or equal to N；
The 2n-1 control circuit is used under the control for the 2n-1 voltage that 2n-1 voltage input end inputs, control n-th
It is connected between control terminal and the n-th reference voltage terminal；
The 2n control circuit is used under the control for the 2n voltage that 2n voltage input end inputs, in n-th control
When end between n-th reference voltage terminal with being connected to, control is connected between the 2n voltage input end and the n-th voltage output end
Connection.
2. electrifying timing sequence control unit as described in claim 1, which is characterized in that N is greater than 1；N-th voltage output end with
The connection of 2n+1 voltage input end.
3. electrifying timing sequence control unit as described in claim 1, which is characterized in that N is greater than 1, and first voltage input terminal is used for
Operating voltage is provided for logical integrated circuit, second voltage input terminal is for providing positive gamma principal voltage, tertiary voltage input terminal
It is connect with first voltage output end, the 4th voltage input end is for providing negative gamma principal voltage；Alternatively,
N is equal to 1, and first voltage input terminal is used to provide operating voltage for logical integrated circuit, and second voltage input terminal is for mentioning
For positive gamma principal voltage；Alternatively,
N is equal to 1, and first voltage input terminal is for providing positive gamma principal voltage, and second voltage input terminal is for providing negative gamma master
Voltage.
4. electrifying timing sequence control unit as claimed in claim 1 or 2, which is characterized in that the 2n-1 control circuit includes
2n-1 controls transistor, 4n-3 resistance and 4n-2 resistance；
The control electrode of the 2n-1 control transistor is connect by the 4n-3 resistance with the 2n-1 voltage input end,
First pole of the 2n-1 control transistor is connect with n-th control terminal, the second pole of the 2n-1 control transistor
It is connect with n-th reference voltage terminal；
The first end of the 4n-2 resistance is connect with the control electrode of 2n-1 control transistor, the 4n-2 resistance
Second end is connect with n-th reference voltage terminal.
5. electrifying timing sequence control unit as claimed in claim 4, which is characterized in that the 2n-1 voltage is greater than described n-th
N-th reference voltage of reference voltage terminal input, the 2n-1 control transistor is n-type transistor；Alternatively,
The 2n-1 voltage is less than or equal to the n-th reference voltage of n-th reference voltage terminal input, the 2n-1 control
Transistor is p-type transistor.
6. electrifying timing sequence control unit as claimed in claim 4, which is characterized in that the 2n-1 control circuit further includes
4n-1 resistance；
First pole of the 2n-1 control transistor is connect by the 4n-1 resistance with n-th control terminal.
7. electrifying timing sequence control unit as claimed in claim 1 or 2, which is characterized in that the 2n control circuit includes the
2n controls transistor and 4n resistance；
The control electrode of the 2n control transistor is connect with n-th control terminal, the first pole of the 2n control transistor
It is connect with the 2n voltage input end, the second pole of the 2n control transistor is connect with n-th voltage output end；
The first end of the 4n resistance is connect with the 2n voltage input end, the second end of the 4n resistance and described the
The connection of n control terminal.
8. electrifying timing sequence control unit as claimed in claim 7, which is characterized in that the 2n voltage is less than n-th base
N-th reference voltage of quasi- voltage end input, the 2n control transistor is n-type transistor；Alternatively,
The 2n voltage is greater than or equal to the n-th reference voltage of n-th reference voltage terminal input, and the 2n controls crystal
Pipe is p-type transistor.
9. a kind of power-on time sequence control method, which is characterized in that be applied to as described in any claim in claim 1 to 8
Electrifying timing sequence control unit, the power-on time sequence control method includes:
2n-1 control circuit under the control for the 2n-1 voltage that 2n-1 voltage input end inputs, control the n-th control terminal with
It is connected between n-th reference voltage terminal；
The 2n control circuit under the control for the 2n voltage that 2n voltage input end inputs, n-th control terminal with
When being connected between n-th reference voltage terminal, the company between the 2n voltage input end and the n-th voltage output end is connected in control
It connects；
N is positive integer, and n is the positive integer less than or equal to N.
10. a kind of display module, which is characterized in that including the electrifying timing sequence as described in any claim in claim 1 to 8
Control unit.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910242628.5A CN109935190A (en) | 2019-03-28 | 2019-03-28 | Electrifying timing sequence control unit, power-on time sequence control method and display module |
| PCT/CN2020/080907 WO2020192656A1 (en) | 2019-03-28 | 2020-03-24 | Power-on timing control unit, power-on timing control method and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910242628.5A CN109935190A (en) | 2019-03-28 | 2019-03-28 | Electrifying timing sequence control unit, power-on time sequence control method and display module |
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| CN109935190A true CN109935190A (en) | 2019-06-25 |
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| CN201910242628.5A Pending CN109935190A (en) | 2019-03-28 | 2019-03-28 | Electrifying timing sequence control unit, power-on time sequence control method and display module |
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| CN (1) | CN109935190A (en) |
| WO (1) | WO2020192656A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020192656A1 (en) * | 2019-03-28 | 2020-10-01 | 京东方科技集团股份有限公司 | Power-on timing control unit, power-on timing control method and display device |
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